CN108365066A - Light emitting diode and preparation method thereof - Google Patents
Light emitting diode and preparation method thereof Download PDFInfo
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- CN108365066A CN108365066A CN201810358160.1A CN201810358160A CN108365066A CN 108365066 A CN108365066 A CN 108365066A CN 201810358160 A CN201810358160 A CN 201810358160A CN 108365066 A CN108365066 A CN 108365066A
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- 238000002360 preparation method Methods 0.000 title abstract description 5
- 239000004065 semiconductor Substances 0.000 claims abstract description 137
- 239000000463 material Substances 0.000 claims abstract description 30
- 239000012535 impurity Substances 0.000 claims description 26
- 230000004888 barrier function Effects 0.000 claims description 17
- 230000001788 irregular Effects 0.000 claims description 13
- 229910052782 aluminium Inorganic materials 0.000 claims description 11
- 239000004411 aluminium Substances 0.000 claims description 10
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 9
- 230000008859 change Effects 0.000 claims description 2
- 229910016920 AlzGa1−z Inorganic materials 0.000 claims 1
- 239000011148 porous material Substances 0.000 abstract description 8
- 239000010410 layer Substances 0.000 description 228
- 238000003475 lamination Methods 0.000 description 32
- 239000000758 substrate Substances 0.000 description 32
- 230000000694 effects Effects 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 229910002704 AlGaN Inorganic materials 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
- 238000009826 distribution Methods 0.000 description 4
- 229910052733 gallium Inorganic materials 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 230000001427 coherent effect Effects 0.000 description 3
- 239000004615 ingredient Substances 0.000 description 3
- 239000011777 magnesium Substances 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- 229910052749 magnesium Inorganic materials 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 230000035899 viability Effects 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- AZDRQVAHHNSJOQ-UHFFFAOYSA-N alumane Chemical compound [AlH3] AZDRQVAHHNSJOQ-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 230000008033 biological extinction Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 230000005622 photoelectricity Effects 0.000 description 1
- 238000004321 preservation Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000036632 reaction speed Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000004576 sand Substances 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The present invention discloses a kind of light emitting diode and preparation method thereof.The light emitting diode includes the first semiconductor layer, the active layer on the first semiconductor layer, the second semiconductor layer on active layer, and the semiconductor contact layer positioned at the second semiconductor layer.Second semiconductor layer includes the first sublevel and the second sublevel being formed on the first sublevel, wherein the material of the second sublevel includes AlxGa1‑xN(0<x<1), and the surface of the second sublevel includes the pore space structure being randomly distributed.
Description
The present invention is Chinese invention patent application (application number：201310049983.3 the applying date：On February 08th, 2013,
Denomination of invention：Light emitting diode and preparation method thereof) divisional application.
Technical field
The present invention relates to a kind of light emitting diodes and preparation method thereof, special more particularly, to the photoelectricity for improving light emitting diode
Property.
Background technology
Light emitting diode (light-emitting diode for solid-state lighting device；LED) there is low, the low hair that consumes energy
The good photoelectric characteristics such as the optical wavelength stabilization that heat, operation lifetime are long, shockproof, small, reaction speed is fast and export, therefore send out
Optical diode is widely used on various lighting uses.When light emitting diode is in the case of conducting, pass through light-emitting diodes
The electric current of pipe is referred to as forward operation electric current (If), and the voltage at light emitting diode both ends is measured then under by forward operation electric current
It is called forward voltage (Vf).
The advantages of light emitting diode, is low power consuming, but in daily life with greater need for be enough light.In addition to
Except light emitting diode used in increasing, it can also increase the operation electric current of light emitting diode to promote each light emitting diode
Luminous intensity.But when increasing the forward current of light emitting diode, while the product of forward voltage and forward current can be caused
Increase, it is related to increase the energy for being consumed into thermal energy.In order to allow light emitting diode to be used under the situation of low power consuming, again
Simultaneously allow light emitting diode that can maintain enough luminous intensities, reduce light emitting diode forward voltage avoid forward voltage with
The product of forward current is excessive, and excessive energy is consumed into thermal energy, becomes promote light emitting diode to be applied extensively important
Research direction.
Light emitting diode above-mentioned can combine connection to form a light-emitting device, in light-emitting device with other elements
Element contains secondary carrier with circuit, bonds light emitting diode on secondary carrier and making the substrate of light emitting diode and time carry
The solder of circuit electrical connection on body, and it is electrically connected the electric connection structure of the electrode and time carrier circuit of light emitting diode.Its
In, above-mentioned secondary carrier can be that lead frame or large scale inlay substrate, to facilitate the circuit of light-emitting device to plan and improve it
The heat dissipation effect of light emitting diode.
Invention content
To solve the above problems, the present invention provides a kind of light emitting diode, it includes the first semiconductor layer, one to be located at first
The active layer of semiconductor layer, the second semiconductor layer on active layer and positioned at the half of the second semiconductor layer
Conductor contact layer.Second semiconductor layer includes the first sublevel and the second sublevel for being formed on the first sublevel, wherein second
The material of sublevel includes AlxGa1-xN (0<x<1), and the surface of the second sublevel includes the pore space structure being randomly distributed.
The present invention discloses a kind of production method of light emitting diode, including providing a substrate, forms one first semiconductor layer
On substrate, an active layer is subsequently formed in the first semiconductor layer, then be epitaxially formed comprising AlxGa1-xN(0<x<1)
One second semiconductor layer is on active layer；Wherein, the surface of the second semiconductor layer includes the pore space structure of irregular distribution.
Description of the drawings
Fig. 1 show the embodiment of the first light emitting diode lamination disclosed in this invention；
Fig. 2 show the embodiment of the second semiconductor layer disclosed in this invention；
Fig. 3 show the embodiment of the second light emitting diode lamination disclosed in this invention；
Fig. 4 show the embodiment of third light emitting diode lamination disclosed in this invention.
Main element symbol description
100、200、300:Light emitting diode lamination
102:Substrate
104:Superlattice layer
106:First semiconductor layer
108:Strained layer
110:Active layer
112:Electronic barrier layer
114:Second semiconductor layer
1141:First sublevel
1142:First sublevel
1143:Second sublevel
1144:Third sublevel
1146:Second sublevel
116、118:Semiconductor contact layer
120:Oxidic, transparent, conductive layers
Specific implementation mode
Fig. 1 is the sectional view of the first light emitting diode lamination 100 according to a first embodiment of the present invention, the first light-emitting diodes
Pipe lamination 100 include substrate 102, superlattice layer 104, the first semiconductor layer 106, active layer 110, the second semiconductor layer 114,
Semiconductor contact layer 116 and oxidic, transparent, conductive layers 120.The material of substrate 102 may include having Ga, As, Si, C, P, Al, N,
Zn, O, Li et al. element or these elements combination but be not limited to these elements, substrate 102 can be electrically-conductive backing plate, insulating properties
Substrate or composite substrate, electrically-conductive backing plate therein can be metal substrates, such as include the substrate of aluminium or silicon；And it insulate
Substrate can be the ceramic substrate that sapphire (Sapphire) substrate either has both heat conduction and insulation；Or it is composite base
Plate, such as change current distribution to reach to solve current crowding (current in conjunction with conductive material and insulating materials
Crowding) the phenomenon that, improves the reflecting effect on substrate to reduce the situation of internal extinction.In addition, substrate 102 can also
It is patterned patterned substrate on surface.There is superlattice layer 104 between substrate 102 and the first semiconductor layer 106, and surpass
Lattice layer 104 be in order to reduce between substrate 102 and the first semiconductor layer 106 because stress caused by differences between lattice constant and
The buffer layer used, to avoid because stress between the two causes epitaxial structure to be destroyed or built on the sand.And at other
In embodiment, is further included between substrate 102 and the first semiconductor layer 106 and (be not illustrated in figure as the adhesion coating of connection purposes
In), to strengthen the combination between substrate 102 and the first semiconductor layer 106.When the first semiconductor layer 106 is p-type semiconductor,
Second semiconductor layer 114 is different electrical n-type semiconductor；Conversely, when the first semiconductor layer 106 is n-type semiconductor, second
Semiconductor layer 114 is different electrical p-type semiconductor, wherein the first semiconductor layer 106 and the second semiconductor layer 114 can be used as beam
Tie up layer.Active layer 110 between the first semiconductor layer 106 and the second semiconductor layer 114, can be single layer structure either by
Multiple well layer and the multiple quantum well layer structure of barrier layer composition are to send out the light of specific wavelength.In the present embodiment, active
Layer 110 sends out blue light of the dominant wavelength between 440~470nm, and is the light of a non-coherent property.
It is divided into the first sublevel 1141 and the second sublevel on the first sublevel 1141 in the second semiconductor layer 114
1143, and semiconductor contact layer 116 is covered on the second sublevel 1143, wherein the composition of the second semiconductor layer 114 includes
III-V material, and the material of the second sublevel 1143 is AlxGa1-xN, wherein 0<x<1.It is abutting the second sublevel 1143 and is partly leading
One side between body contact layer 116 is irregular surface, as shown in Figure 1, and having on this irregular surface irregular
Pore space structure.These irregular surfaces and the hole of irregular distribution are formed by Al with extensional modexGa1-xN is formed
The second sublevel 1143 when be formed simultaneously, these holes are dispersed in irregular table above-mentioned with the kenel that irregular and depth differs
On face.In this present embodiment, these are because epitaxial growth mode forms AlxGa1-xN and simultaneously caused by pore space structure not only divide
Cloth also includes multiple hexagonal hole constructions extended downwardly, wherein at least a hexagonal hole can be extended to as constraint on surface
The inside (not being illustrated in figure) of second semiconductor layer 114 of layer.
It is oxidic, transparent, conductive layers 120 on semiconductor contact layer 116, then has on oxidic, transparent, conductive layers 120
One electrode layer (is not illustrated in figure).Material used in oxidic, transparent, conductive layers 120 can be ITO；Semiconductor contact layer 116
Material include material that energy gap is less than the second semiconductor layer, such as AlGaN or InGaN passes through heavily doped carrier
Mode can reduce the energy gap of semiconductor contact layer 116 so that semiconductor contact layer 116 is in oxidic, transparent, conductive layers 120 and second
Good Ohmic contact (Ohmic contact) is formed between semiconductor layer 114.
In the present embodiment, the first semiconductor layer 106 has the first lattice constant, is located on the first semiconductor layer 106
Active layer 110 has the second lattice constant, and the second semiconductor layer 114 on active layer 110 has third lattice normal
Number.Because the second lattice constant is more than the first lattice constant, active layer 110 is caused to be come from the first semiconductor layer 106 outward
Stress so that extension is poor quality.In order to improve the stress suffered by active layer 110, by selecting different material to make the
The third lattice constant that two semiconductor layers 114 have is less than the first lattice constant, to form inside stress to active layer 110,
So that the inside of the first light emitting diode lamination 100 is reached stress equilibrium, promotes extension quality.In other words, the first semiconductor layer
106 the first lattice constants having are normal between the second lattice constant and the third lattice of the second semiconductor layer 114 of active layer 110
Between number, to form good extension quality, the forward voltage (V when operation of the first light emitting diode lamination 100 is reducedf)。
In the present embodiment, it includes multiple dense with different impurities to be located at the second semiconductor layer 114 on active layer 110
Degree but electrically identical sublevel, as shown in Figure 2.In these multiple sublevels, the first sublevel 1142 is closest to active layer 110, and
Quadratic-layer 1146 is then located on the first sublevel 1142, and third sublevel 1144 is located at the first sublevel 1142 and the second sublevel 1146
Between.Wherein the second sublevel 1146 is closest to semiconductor contact layer 116, and in the second sublevel 1146 closest to semiconductor contact
It include the pore space structure of irregular distribution on the outer surface of layer 116.The material packet of first sublevel 1142 and the second sublevel 1146
Containing aluminium, wherein the first sublevel 1142 and the second sublevel 1146 include AlyGa1-yN, wherein 0<y<0.3；In another embodiment,
There are different lattice constants for active layer 110 and the semiconductor contact layer 116 of the second semiconductor layer of fit adjacent 114, such as when
When active layer 110 is with 116 lattice constant bigger of semiconductor contact layer, just select smaller y values between 0~0.1 so that the
One sublevel 1142 and the second sublevel 1146 have larger lattice constant, with stress opposite between two laminations of reduction.These
Although still possessed impurity concentration differs electric conductivity having the same sublevel, the third that wherein third sublevel 1144 has
The second impurity concentration that the first impurity concentration and the second sublevel 1146 that impurity concentration has between the first sublevel 1142 have
Between.In the present embodiment, the first impurity concentration is about 5*1018㎝3, third impurity concentration be about 3*1019㎝3, the second impurity
Concentration is about 1*1020㎝3.In addition, the thickness of three sublevels also differs, the thickness of third sublevel 1144 is more than the first sublevel
1142 and second sublevel 1146 thickness.In another embodiment, third sublevel 1144 is made of the material without containing aluminium component,
And the first sublevel 1142 and the second sublevel 1146 include the ingredient of aluminium.
As shown in figure 3, the second light emitting diode of another embodiment of the present invention lamination 200 includes substrate 102, superlattice layer
104, the first semiconductor layer 106, strained layer 108, active layer 110, the second semiconductor layer 114, electronic barrier layer 112, semiconductor
Contact layer 116 and oxidic, transparent, conductive layers 120.In the present embodiment, the second semiconductor layer 106 is reduced by superlattice layer 104
Because lattice constant mismatches the stress to be formed between substrate 102, affected by force when avoiding being subsequently formed semiconductor laminated
And it causes to deform.When active layer 110 is multiple quantum trap, the barrier layer closest to the second semiconductor layer 114 includes nitridation
Indium gallium, that is, closest to the barrier layer of the first sublevel 1142 include InGaN.
In the present embodiment, a strained layer 108 is first formed on the first semiconductor layer 106 before forming multiple quantum trap,
And the material of strained layer 108 is equally made of the material of iii-v with active layer 110 in the present embodiment, but strained layer 108
Impurity concentration be less than active layer 110, with reduce in active layer 110 between multiple quantum trap and the first semiconductor layer 106 due to
Lattice constant difference causes the stress of difference row and generation, to promote the extension quality of active layer 110.In the present embodiment, active layer
110 send out blue light of the dominant wavelength between 440~470nm, and are the light of a non-coherent property.And it the first half is led in the present embodiment
Body layer 106, active layer 110, the second semiconductor layer 114 and strained layer 108 material to be selected from include Al, In, Ga and N
The III-V material of equal elements forms different laminations, such as the lamination or AlGaN and InGaN groups of InGaN and GaN compositions
At lamination so that differences between lattice constant between lamination in a predetermined range, with reach reduce lamination between stress
Effect.Although the material of strained layer 108 is equally formed with III-V material with active layer 110, ingredient and the activity of composition
The ingredient of layer 110 is different so that the lattice constant of strained layer 108 between active layer 110 and the first semiconductor layer 106,
To improve the extension quality of extension lamination of the growth on the first semiconductor layer 106, and improve luminous efficiency.
In the present embodiment, the first semiconductor layer 106 is n-type semiconductor, and the second semiconductor layer 114 is p-type, in activity
Layer 110 and second forms electronic barrier layer 112 between semiconductor layer 114, to avoid the first semiconductor layer 106 toward active layer 110
Mobile electronics overflows to the place that the second semiconductor layer 114 causes electronics other than active layer 110 and combines and reduce to shine and imitate
Rate.Reach this effect, it is necessary to allow the impurity concentration of electronic barrier layer 112 to be higher than the impurity concentration of the second semiconductor layer 114,
Second impurity concentration possessed by the second sublevel 1146 for either being included higher than the second semiconductor layer 114, and electronic blocking
The material of layer 112 can be, for example, Al comprising III-V materialzGa1-zN, wherein 0.15<z<0.4, it can be by increasing Al's
Content is to increase the effect of blocking electronics.
In figure 3, the second semiconductor layer 114 can more include multiple times being made of AlGaN with different Al concentration
Layer, these sublevels also have different lattice constants.And wherein the lattice constant of the second semiconductor layer 114 is between electronic barrier layer
Between 112 and the lattice constant of active layer 110, and the lattice constant of active layer 110 is more than electronic barrier layer 112 and the second half
Conductor layer 114 110 is in direct contact the second larger semiconductor layer 114 of differences between lattice constant in addition to can avoid active layer, more can be with
It is answered caused by when excessive with 114 differences between lattice constant of the second semiconductor layer by the improvement script of electronic barrier layer 112 active layer 110
Power.And the multiple sublevels with different lattice constants for including in the second semiconductor layer 114 and adjacent electronic barrier layer 112 it
Between stress be also unlikely to excessive, therefore can reach improve extension quality so that reduce the second light emitting diode lamination 200
Forward voltage (Vf).
Fig. 4 is the sectional view of third light emitting diode lamination 300 according to another embodiment of the present invention, third luminous two
Pole pipe lamination 300 has the structure similar with the second light emitting diode lamination 200 in Fig. 3, but substrate 102, the first semiconductor
Layer 106 and superlattice layer 104 have larger area compared with other layers so that other each layers only cover the first semiconductor layer
The area of 106 parts.And in third light emitting diode lamination 300, semiconductor contact layer 118 is formed in the second semiconductor layer 114
On, and at least cover on the area of the first semiconductor layer 106, it subsequently can more form electrode layer and (not be illustrated in figure
In) on semiconductor contact layer 118.
The flow for the light emitting diode lamination 100 that embodiment makes according to the present invention is first to provide a substrate 102, is then existed
It is formed before the first semiconductor layer 106, lattice is selected according to the first semiconductor layer 106 and the difference of the lattice constant of substrate 102
The material of constant between is formed in as superlattice layer 104 on substrate 102, is selection in an embodiment of the present invention
The material of iii-v makes the first semiconductor layer 106 and superlattice layer 104, by the way that superlattice layer 104 is added to slow down substrate
102 and the first stress between semiconductor layer 106.The first semiconductor layer 106 is re-formed on superlattice layer 104, then shape
For Viability layer 110 on the first semiconductor layer 106, active layer 110 therein can also be multiple quantum trap structure.Then exist
It is Al to be formed on active layer 110 comprising materialxGa1-xThe second semiconductor layer 114 of N, and wherein 0<x<1.Followed by formation one
Semiconductor contact layer 116 is on the second semiconductor layer 114 and an oxidic, transparent, conductive layers 120 are in semiconductor contact layer 116
On.Wherein, the second semiconductor layer 114 includes Al closest to the side of semiconductor contact layer 116xGa1-xN(0<x<1) material
Material, and have between the second semiconductor layer 114 and semiconductor contact layer 116 irregular plane and in the plane irregular
Pore space structure, these irregular pore space structures are to be formed simultaneously when forming the second semiconductor layer 114 with extensional mode, and wrap
Construction containing hexagonal hole, wherein at least a hexagonal hole extend to the second semiconductor layer 114 (not being illustrated in figure).This reality
It applies in example, active layer 110 sends out blue light of the dominant wavelength between 440~470nm, and is the light of a non-coherent property.
And as shown in the structure chart of Fig. 2, the second semiconductor layer 114 includes the first sublevel 1142, the second sublevel 1146 and the
Three sublevels 1144, formed the second semiconductor layer 114 the step of comprising with a predetermined amount of flow be passed through the gas containing Ga and N and
Organic metal gas containing aluminium is to form AlGaN, wherein the technological process for being passed through the organic metal gas containing aluminium is in ring
Between 900~1100 DEG C of border temperature, the organic metal gas of 30~300sccm is passed through with the condition of 300~500Torr of pressure limit
Body, and the organic metal gas containing aluminium can be the trimethyl aluminium ((CH containing aluminium3)3Al, TMAl).And it is as previously described, the
One sublevel 1142, the second sublevel 1146 are different from the impurity concentration of third sublevel 1144, therefore when forming the second sublevel 1146
The gas concentration that the gas concentration with impurity being passed through is passed through when being greater than to form the first sublevel 1142, is then forming
The gas concentration with impurity being passed through further is improved when third sublevel 1144 so that impurity is dense possessed by each sublevel
It spends toward the direction far from active layer 110 and increases.In an embodiment of the present invention, the second semiconductor layer 114 is p-type semiconductor,
Two luxuriant magnesium (Mg (C are passed through when therefore forming the second semiconductor layer 1145H5)2, Magnesocene) and miscellaneous as adulterating to provide magnesium
Matter.
Then semiconductor contact layer 116 and oxidic, transparent, conductive layers 120 are formed on the second semiconductor layer 114, wherein
The material of oxidic, transparent, conductive layers 120 is ITO, can be used as window layers and increases light extraction.Then on oxidic, transparent, conductive layers 120
Electrode layer (not being illustrated in figure) is formed, and when substrate 102 is conductivity type material, it can be on substrate 102 relative to growth half
The other side of conductor lamination forms an electrode layer (not being illustrated in figure)；Either first remove substrate 102 and then by conductive base
Plate is combined with superlattice layer 104, and forms electrode layer on the other side of electrically-conductive backing plate.
In Fig. 3, the difference of light emitting diode lamination 100 is to form second in second light emitting diode lamination 200 and Fig. 1
Before the active layer 110 of light emitting diode lamination 200, strained layer 108 is initially formed on the first semiconductor layer 106, then shape
It can be because of the less extension for grow up of the differences between lattice constant between strained layer 108 and active layer 110 when Viability layer 110
Quality preservation is good.Another difference is to be initially formed electronic barrier layer 112 after forming active layer 110 to re-form the second semiconductor
Layer 114 so that electronic barrier layer 112 is between active layer 110 and the second semiconductor layer 114, and wherein electronic barrier layer 112
Material can be AlyGa1-yN and 0.15<y<0.4.As previously mentioned, the addition by electronic barrier layer 112 makes active layer
110 lattice constant is close with the second semiconductor layer 114, and the stress reduced between extension lamination is preferably reached by the quality of extension
To the result for reducing light emitting diode lamination forward voltage.
Third light emitting diode lamination 300 in Fig. 4 is then 200 formation of the second light emitting diode lamination in figure 3
Afterwards, then etch luminous lamination until exposed portion the first semiconductor layer 106.Then then at the first semiconductor layer of the part of exposing
Semiconductor contact layer 118 is formed on 106 so that semiconductor contact layer 118 is at least covered in the first semiconductor layer 106 of part
On.Then the oxidic, transparent, conductive layers 120 of third light emitting diode lamination 300 in Fig. 4 and semiconductor contact layer 118 it
On be respectively formed two electrode layers (not being illustrated in figure).
Above-described embodiment is only that the principle of the present invention and its effect is illustrated, and is not intended to limit the present invention.It is any
Persond having ordinary knowledge in the technical field of the present invention can without prejudice to the present invention technical principle and spirit in the case of,
It modifies and changes to above-described embodiment.Therefore listed by the scope of the present invention claim as mentioned.
Claims (11)
1. a kind of light emitting diode, which is characterized in that include：
First semiconductor layer；
Active layer is located at first semiconductor layer；And
Second semiconductor layer is located on the active layer, including the first sublevel and the second sublevel on first sublevel,
Wherein the material of second sublevel includes AlxGa1-xN(0<x<1), wherein first sublevel has the first impurity concentration, this second
Sublevel has the second impurity concentration, first sublevel and the second sublevel electric conductivity having the same, and second impurity is dense
Degree is more than first impurity concentration.
Also include semiconductor contact layer 2. light emitting diode as described in claim 1, the semiconductor contact layer be located at this second
Semiconductor layer, wherein second semiconductor layer include that electric conductivity is p-type.
3. light emitting diode as described in claim 1, wherein second semiconductor layer also include third sublevel, be located at this first
Between sublevel and second sublevel, wherein the third sublevel has electric conductivity identical with second sublevel；And the wherein third
Sublevel has a third impurity concentration, and the third impurity concentration between first impurity concentration and second impurity concentration it
Between.
4. light emitting diode as described in claim 1, wherein second semiconductor layer also include third sublevel, be located at this first
Between sublevel and second sublevel, the thickness of the third sublevel is more than first sublevel and second sublevel.
5. light emitting diode as claimed in claim 4, wherein the third sublevel are without containing aluminium component and first sublevel contains
Aluminium component.
6. light emitting diode as described in claim 1 includes also electronic barrier layer, between the active layer and second semiconductor
Between layer, wherein the material of the electronic barrier layer includes AlzGa1-zN(0.15<z<0.4)。
7. light emitting diode as described in claim 1, wherein the first sublevel includes AlyGa1-yN, wherein 0<y<0.3.
8. light emitting diode as described in claim 1, wherein 0<x<0.3.
9. light emitting diode as described in claim 1 also includes strained layer between the first semiconductor layer and active layer, this is answered
Change layer includes III-V material.
10. the impurity that light emitting diode as claimed in claim 9, the wherein impurity concentration of the strained layer are less than the active layer is dense
Degree.
11. light emitting diode as claimed in claim 2, wherein it is seen in section, second semiconductor layer and the semiconductor interface
There is irregular plane between contact layer.
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| CN103985802A (en) | 2014-08-13 |
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