CN103985802B - Light emitting diode and preparation method thereof - Google Patents
Light emitting diode and preparation method thereof Download PDFInfo
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- CN103985802B CN103985802B CN201310049983.3A CN201310049983A CN103985802B CN 103985802 B CN103985802 B CN 103985802B CN 201310049983 A CN201310049983 A CN 201310049983A CN 103985802 B CN103985802 B CN 103985802B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
Abstract
The present invention discloses a kind of light emitting diode and preparation method thereof.The light emitting diode includes the first semiconductor layer, the active layer on the first semiconductor layer, the second semiconductor layer on active layer, and the semiconductor contact layer positioned at the second semiconductor layer.Second semiconductor layer includes the first sublevel and the second sublevel being formed on the first sublevel, wherein the material of the second sublevel includes AlxGa1‑xN(0<x<1), and the second sublevel surface include irregular distribution pore space structure.
Description
Technical field
It is special more particularly, to the photoelectricity for improving light emitting diode the present invention relates to a kind of light emitting diode and preparation method thereof
Property.
Background technology
Light emitting diode (light-emitting diode for solid-state lighting device；LED) there is low, the low hair that consumes energy
The good photoelectric characteristics such as the optical wavelength stabilization that heat, operation lifetime are long, shockproof, small, reaction speed is fast and export, therefore send out
Optical diode is widely used on various lighting uses.When light emitting diode is in the case of conducting, pass through light-emitting diodes
The electric current of pipe is referred to as forward operation electric current (If), and the voltage at light emitting diode both ends is measured then under by forward operation electric current
It is called forward voltage (Vf).
The advantages of light emitting diode, is low power consuming, but in daily life with greater need for be enough lights.Except
Outside light emitting diode used in increase, it can also increase the operation electric current of light emitting diode to lift each light emitting diode
Luminous intensity.But when increasing the forward current of light emitting diode, while the product of forward voltage and forward current can be caused
Increase, it is related to add the energy for being consumed into thermal energy.In order to allow light emitting diode to be used under the situation of low power consuming, again
At the same time allow light emitting diode to maintain enough luminous intensities, reduce light emitting diode forward voltage avoid forward voltage with
The product of forward current is excessive, and excessive energy is consumed into thermal energy, becomes promote light emitting diode to be employed extensively important
Research direction.
Foregoing light emitting diode can combine connection to form a light-emitting device with other elements, in light-emitting device
Element contains the secondary carrier with circuit, bonds light emitting diode on secondary carrier and making the substrate of light emitting diode and time carry
The solder that circuit on body is electrically connected, and it is electrically connected the electrode and the electric connection structure of time carrier circuit of light emitting diode.Its
In, above-mentioned secondary carrier can be that lead frame or large scale inlay substrate, to facilitate the circuit of light-emitting device to plan and improve it
The heat dissipation effect of light emitting diode.
The content of the invention
To solve the above problems, the present invention provides a kind of light emitting diode, it includes the first semiconductor layer, one to be located at first
The active layer of semiconductor layer, the second semiconductor layer on active layer and half positioned at the second semiconductor layer
Conductor contact layer.Second semiconductor layer includes the first sublevel and the second sublevel being formed on the first sublevel, wherein second
The material of sublevel includes AlxGa1-xN (0<x<1), and the second sublevel surface include irregular distribution pore space structure.
The present invention discloses a kind of production method of light emitting diode, comprising a substrate is provided, forms one first semiconductor layer
On substrate, an active layer is subsequently formed in the first semiconductor layer, then be epitaxially formed comprising AlxGa1-xN(0<x<1)
One second semiconductor layer is on active layer；Wherein, the surface of the second semiconductor layer includes the pore space structure of irregular distribution.
Brief description of the drawings
Fig. 1 show the embodiment of the first light emitting diode lamination disclosed in this invention；
Fig. 2 show the embodiment of the second semiconductor layer disclosed in this invention；
Fig. 3 show the embodiment of the second light emitting diode lamination disclosed in this invention；
Fig. 4 show the embodiment of the 3rd light emitting diode lamination disclosed in this invention.
Main element symbol description
100、200、300:Light emitting diode lamination
102:Substrate
104:Superlattice layer
106:First semiconductor layer
108:Strained layer
110:Active layer
112:Electronic barrier layer
114:Second semiconductor layer
1141:First sublevel
1142:First sublevel
1143:Second sublevel
1144:Third time layer
1146:Second sublevel
116、118:Semiconductor contact layer
120:Oxidic, transparent, conductive layers
Embodiment
Fig. 1 is the sectional view of the first light emitting diode lamination 100 according to a first embodiment of the present invention, the first light-emitting diodes
Pipe lamination 100 include substrate 102, superlattice layer 104, the first semiconductor layer 106, active layer 110, the second semiconductor layer 114,
Semiconductor contact layer 116 and oxidic, transparent, conductive layers 120.The material of substrate 102 can include Ga, As, Si, C, P, Al, N,、
Zn, O, Li et al. element or these elements combination but be not limited to these elements, substrate 102 can be electrically-conductive backing plate, insulating properties
Substrate or composite base plate, electrically-conductive backing plate therein can be metal substrate, such as include the substrate of aluminium or silicon；And insulate
Substrate can be the ceramic substrate that sapphire (Sapphire) substrate either has heat conduction and insulation concurrently；Or it is composite base
Plate, such as with reference to conductive material and insulating materials current crowding (current is solved to reach change CURRENT DISTRIBUTION
Crowding phenomenon) improves the reflecting effect on substrate to reduce the situation of internal extinction.In addition, substrate 102 can also
It is the patterned substrate on surface with figure.There is superlattice layer 104 between 102 and first semiconductor layer 106 of substrate, and surpass
Lattice layer 104 be in order to reduce between 102 and first semiconductor layer 106 of substrate because stress caused by differences between lattice constant and
The cushion used, to avoid because stress between the two causes epitaxial structure to be destroyed or built on the sand.And at other
In embodiment, further included between 102 and first semiconductor layer 106 of substrate and (be not illustrated in figure as the adhesion coating for linking purposes
In), to strengthen the combination between 102 and first semiconductor layer 106 of substrate.When the first semiconductor layer 106 is p-type semiconductor,
Second semiconductor layer 114 is different electrical n-type semiconductor；Conversely, when the first semiconductor layer 106 is n-type semiconductor, second
Semiconductor layer 114 is different electrical p-type semiconductor, wherein the first semiconductor layer 106 and the second semiconductor layer 114 can be used as beam
Tie up layer.Active layer 110 between the first semiconductor layer 106 and the second semiconductor layer 114, can be single layer structure either by
Multiple well layer and the multiple quantum well layer structure of barrier layer composition are to send the light of specific wavelength.In the present embodiment, it is active
Layer 110 sends blue light of the dominant wavelength between 440 ~ 470nm, and is the light of a non-coherent property.
It is divided into the first sublevel 1141 and the second sublevel on the first sublevel 1141 in the second semiconductor layer 114
1143, and semiconductor contact layer 116 is covered on the second sublevel 1143, wherein the composition of the second semiconductor layer 114 includes
III-V material, and the material of the second sublevel 1143 is AlxGa1-xN, wherein 0<x<1.In adjacent second sublevel 1143 with partly leading
One side between body contact layer 116 is irregular surface, as shown in Figure 1, and having on this irregular surface irregular
Pore space structure.These irregular surfaces and the hole of irregular distribution, are to be formed with extensional mode by AlxGa1-xN is formed
The second sublevel 1143 when formed at the same time, these holes are dispersed in foregoing irregular table with the kenel that irregular and depth differs
On face.In this present embodiment, these are because epitaxial growth mode forms AlxGa1-xN and at the same time caused by pore space structure not only divide
Cloth is on surface, and also comprising multiple hexagonal holes constructions extended downwardly, wherein at least a hexagonal hole can be extended to as constraint
The inside (not being illustrated in figure) of second semiconductor layer 114 of layer.
It is oxidic, transparent, conductive layers 120 on semiconductor contact layer 116, then has on oxidic, transparent, conductive layers 120
One electrode layer (is not illustrated in figure).Material used in oxidic, transparent, conductive layers 120 can be ITO；Semiconductor contact layer 116
Material include the material that energy gap is less than the second semiconductor layer, such as AlGaN or InGaN, passes through heavily doped carrier
Mode, can reduce the energy gap of semiconductor contact layer 116 so that semiconductor contact layer 116 is in oxidic, transparent, conductive layers 120 and second
Good Ohmic contact (Ohmic contact) is formed between semiconductor layer 114.
In the present embodiment, the first semiconductor layer 106 has the first lattice constant, on the first semiconductor layer 106
Active layer 110 has the second lattice constant, and the second semiconductor layer 114 on active layer 110 is normal with the 3rd lattice
Number.Because the second lattice constant is more than the first lattice constant, active layer 110 is caused to be come from the first semiconductor layer 106 outside
Stress so that extension is poor quality.In order to improve the stress suffered by active layer 110, by selecting different materials to make
The 3rd lattice constant that two semiconductor layers 114 have is less than the first lattice constant, to form inside stress to active layer 110,
The inside of the first light emitting diode lamination 100 is reached stress equilibrium, lift extension quality.In other words, the first semiconductor layer
106 the first lattice constants having are normal between the second lattice constant and the 3rd lattice of the second semiconductor layer 114 of active layer 110
Between number, to form good extension quality, the forward voltage (V during operation of the first light emitting diode lamination 100 is reducedf)。
In the present embodiment, the second semiconductor layer 114 on active layer 110 includes multiple dense with different impurities
Degree but electrically identical sublevel, as shown in Figure 2.In these multiple sublevels, the first sublevel 1142 is closest to active layer 110, and
Quadratic-layer 1146 is then located on the first sublevel 1142, and third time layer 1144 is located at the first sublevel 1142 and the second sublevel 1146
Between.Wherein the second sublevel 1146 is closest to semiconductor contact layer 116, and in the second sublevel 1146 closest to semiconductor contact
Include the pore space structure of irregular distribution on the outer surface of layer 116.The material bag of first sublevel 1142 and the second sublevel 1146
Containing aluminium, wherein the first sublevel 1142 and the second sublevel 1146 include AlyGa1-yN, wherein 0<y<0.3；In another embodiment,
There are different lattice constants for active layer 110 and the semiconductor contact layer 116 of the second semiconductor layer of fit adjacent 114, such as when
When active layer 110 is with 116 lattice constant bigger of semiconductor contact layer, the y values of smaller are just selected between 0 ~ 0.1 so that the
One sublevel 1142 and the second sublevel 1146 have larger lattice constant, the opposite stress between two laminations of reduction.These
Though sublevel with identical electric conductivity possessed by impurity concentration differ, wherein third time layer 1144 have the 3rd
Impurity concentration between the first sublevel 1142 with the first impurity concentration and the second sublevel 1146 with the second impurity concentration
Between.In the present embodiment, the first impurity concentration is about 5*1018㎝3, the 3rd impurity concentration be about 3*1019㎝3, the second impurity
Concentration is about 1*1020㎝3.In addition, the thickness of three sublevels also differs, the thickness of third time layer 1144 is more than the first sublevel
1142 and second sublevel 1146 thickness.In another embodiment, third time layer 1144 is made of the material for not containing aluminium component,
And the first sublevel 1142 and the second sublevel 1146 include the component of aluminium.
As shown in figure 3, the second light emitting diode of another embodiment of the present invention lamination 200 includes substrate 102, superlattice layer
104th, the first semiconductor layer 106, strained layer 108, active layer 110, the second semiconductor layer 114, electronic barrier layer 112, semiconductor
Contact layer 116 and oxidic, transparent, conductive layers 120.In the present embodiment, the second semiconductor layer 106 is reduced by superlattice layer 104
Because lattice constant mismatches the stress to be formed between substrate 102, affected by force when avoiding being subsequently formed semiconductor laminated
And cause to deform.When active layer 110 is multiple quantum trap, the barrier layer closest to the second semiconductor layer 114 includes nitridation
Indium gallium, that is, include InGaN closest to the barrier layer of the first sublevel 1142.
In the present embodiment, a strained layer 108 is first formed on the first semiconductor layer 106 before forming multiple quantum trap,
And the material of strained layer 108 is equally made of with active layer 110 material of iii-v in the present embodiment, but strained layer 108
Impurity concentration be less than active layer 110, with reduce in active layer 110 between multiple quantum trap and the first semiconductor layer 106 due to
The stress that lattice constant difference causes difference to arrange and produces, to lift the extension quality of active layer 110.In the present embodiment, active layer
110 send blue light of the dominant wavelength between 440 ~ 470nm, and are the light of a non-coherent property.And the first half led in the present embodiment
Body layer 106, active layer 110, the material of the second semiconductor layer 114 and strained layer 108 are selected from and include Al, In, Ga and N
III-V material Deng element forms different laminations, such as the lamination or AlGaN and InGaN groups of InGaN and GaN compositions
Into lamination so that differences between lattice constant between lamination reduces stress between lamination in a predetermined scope, to reach
Effect.Although the material of strained layer 108 is equally formed with active layer 110 with III-V material, component and the activity of composition
The component of layer 110 is different so that the lattice constant of strained layer 108 between 110 and first semiconductor layer 106 of active layer,
To improve the extension quality of extension lamination of the growth on the first semiconductor layer 106, and improve luminous efficiency.
In the present embodiment, the first semiconductor layer 106 is n-type semiconductor, and the second semiconductor layer 114 is p-type, in activity
Layer 110 and second forms electronic barrier layer 112 between semiconductor layer 114, to avoid the first semiconductor layer 106 toward active layer 110
Mobile electronics overflows to the place that the second semiconductor layer 114 causes electronics beyond active layer 110 and combines and reduce to shine and imitate
Rate.Reach this effect, it is necessary to allow the impurity concentration of electronic barrier layer 112 to be higher than the impurity concentration of the second semiconductor layer 114,
Second impurity concentration possessed by the second sublevel 1146 either included higher than the second semiconductor layer 114, and electronic blocking
The material of layer 112 can be, for example, Al comprising III-V materialzGa1-zN, wherein 0.15<z<0.4, can be by increasing Al's
Content stops the effect of electronics to increase.
In figure 3, the second semiconductor layer 114 can more include multiple times formed with different Al concentration and by AlGaN
Layer, these sublevels also have different lattice constants.And wherein the lattice constant of the second semiconductor layer 114 is between electronic barrier layer
Between 112 and the lattice constant of active layer 110, and the lattice constant of active layer 110 is more than electronic barrier layer 112 and the second half
Conductor layer 114, more can be with except active layer 110 can be avoided directly to contact the second larger semiconductor layer 114 of differences between lattice constant
Answered caused by when improving script active layer 110 and excessive 114 differences between lattice constant of the second semiconductor layer by electronic barrier layer 112
Power.And the multiple sublevels with different lattice constants included in the second semiconductor layer 114 and adjacent electronic barrier layer 112 it
Between stress be also unlikely to excessive, therefore can reach improve extension quality so that reduce the second light emitting diode lamination 200
Forward voltage (Vf).
Fig. 4 is the sectional view of the 3rd light emitting diode lamination 300 according to another embodiment of the present invention, and the 3rd shines two
Pole pipe lamination 300 has a structure similar with the second light emitting diode lamination 200 in Fig. 3, but substrate 102, the first semiconductor
Layer 106 and superlattice layer 104 have larger area compared with other layers so that other each layers only cover the first semiconductor layer
The area of 106 parts.And in the 3rd light emitting diode lamination 300, semiconductor contact layer 118 is formed at the second semiconductor layer 114
On, and at least cover on the area of the first semiconductor layer 106, it subsequently can more form electrode layer and (not be illustrated in figure
In) on semiconductor contact layer 118.
The flow of the light emitting diode lamination 100 made according to the embodiment of the present invention is first to provide a substrate 102, is then existed
Formed before the first semiconductor layer 106, lattice is selected according to the first semiconductor layer 106 and the difference of the lattice constant of substrate 102
The material of constant between is formed on substrate 102 as superlattice layer 104, is selection in an embodiment of the present invention
The material of iii-v makes the first semiconductor layer 106 and superlattice layer 104, by adding superlattice layer 104 to slow down substrate
102 and the first stress between semiconductor layer 106.The first semiconductor layer 106 is re-formed on superlattice layer 104, then shape
For Viability layer 110 on the first semiconductor layer 106, active layer 110 therein can also be multiple quantum trap structure.Then exist
It is Al to be formed on active layer 110 comprising materialxGa1-xThe second semiconductor layer 114 of N, and wherein 0<x<1.Followed by formation one
Semiconductor contact layer 116 is on the second semiconductor layer 114, and an oxidic, transparent, conductive layers 120 are in semiconductor contact layer 116
On.Wherein, the second semiconductor layer 114 includes Al closest to the side of semiconductor contact layer 116xGa1-xN(0<x<1) material
Material, and have between the second semiconductor layer 114 and semiconductor contact layer 116 irregular plane and in the plane irregular
Pore space structure, these irregular pore space structures are formed at the same time when being and forming the second semiconductor layer 114 with extensional mode, and are wrapped
Construction containing hexagonal hole, wherein at least a hexagonal hole extend to the second semiconductor layer 114 (not being illustrated in figure).This reality
Apply in example, active layer 110 sends blue light of the dominant wavelength between 440 ~ 470nm, and is the light of a non-coherent property.
And as shown in the structure chart of Fig. 2, the second semiconductor layer 114 includes the first sublevel 1142, the second sublevel 1146 and the
Three sublevels 1144, formed the second semiconductor layer 114 the step of comprising with a predetermined amount of flow be passed through the gas containing Ga and N and
Organic metal gas containing aluminium are to form AlGaN, wherein the technological process for being passed through the organic metal gas containing aluminium is in ring
Between 900 ~ 1100 DEG C of border temperature, the organic metal gas of 30 ~ 300sccm are passed through with the condition of 300 ~ 500Torr of pressure limit,
And the organic metal gas containing aluminium can be the trimethyl aluminium ((CH containing aluminium3)3Al, TMAl).And as previously described, first
Sublevel 1142, the second sublevel 1146 are different from the impurity concentration of third time layer 1144, therefore are forming the second sublevel 1146 when institute
The gas concentration that the gas concentration with impurity being passed through is passed through when being greater than to form the first sublevel 1142, is then forming the
The gas concentration with impurity being passed through further is improved during three sublevels 1144 so that impurity concentration possessed by each sublevel
Increase toward the direction away from active layer 110.In an embodiment of the present invention, the second semiconductor layer 114 is p-type semiconductor, because
This is passed through two luxuriant magnesium (Mg (C when forming the second semiconductor layer 1145H5)2, Magnesocene) and to provide magnesium as impurity.
Then semiconductor contact layer 116 and oxidic, transparent, conductive layers 120 are formed on the second semiconductor layer 114, wherein
The material of oxidic, transparent, conductive layers 120 is ITO, can increase light extraction as window layers.Then on oxidic, transparent, conductive layers 120
Electrode layer (not being illustrated in figure) is formed, and when substrate 102 is conductivity type material, can be on substrate 102 relative to growth half
The opposite side of conductor lamination forms an electrode layer (not being illustrated in figure)；Either first remove substrate 102 and then by conductive base
Plate is combined with superlattice layer 104, and forms electrode layer on the opposite side of electrically-conductive backing plate.
In Fig. 3, the difference of light emitting diode lamination 100 is to form second in second light emitting diode lamination 200 and Fig. 1
Before the active layer 110 of light emitting diode lamination 200, strained layer 108 is initially formed on the first semiconductor layer 106, then shape
Can be because of the less extension for grow up of the differences between lattice constant between strained layer 108 and active layer 110 during Viability layer 110
Quality preservation is good.Another difference is to be initially formed electronic barrier layer 112 after active layer 110 is formed to re-form the second semiconductor
Layer 114 so that electronic barrier layer 112 is between 110 and second semiconductor layer 114 of active layer, and wherein electronic barrier layer 112
Material can be AlyGa1-yN and 0.15<y<0.4.As it was previously stated, the addition active layer for passing through electronic barrier layer 112
110 lattice constant is close with the second semiconductor layer 114, and the stress reduced between extension lamination is preferably reached by the quality of extension
To the result for reducing light emitting diode lamination forward voltage.
The 3rd light emitting diode lamination 300 in Fig. 4 is then 200 formation of the second light emitting diode lamination in figure 3
Afterwards, then luminous lamination is etched until the first semiconductor layer 106 of exposed portion.Then then at the first semiconductor layer of part exposed
Semiconductor contact layer 118 is formed on 106 so that semiconductor contact layer 118 is at least covered in the first semiconductor layer 106 of part
On.Then the oxidic, transparent, conductive layers 120 of the 3rd light emitting diode lamination 300 in Fig. 4 and semiconductor contact layer 118 it
It is upper to form two electrode layers (not being illustrated in figure) respectively.
Above-described embodiment is only that the principle of the present invention and its effect is illustrated, not for the limitation present invention.It is any
Persond having ordinary knowledge in the technical field of the present invention can without prejudice to the present invention technical principle and spirit in the case of,
Modify and change to above-described embodiment.Therefore the scope of the present invention is as mentioned listed by claim.
Claims (19)
1. a kind of light emitting diode, comprising：
First semiconductor layer；
Active layer, positioned at first semiconductor layer；
Second semiconductor layer, on the active layer, comprising the first sublevel and be formed on first sublevel second
Layer, wherein the material of second sublevel includes AlxGa1-xN(0<x<1) and the surface of second sublevel includes multiple irregular points
The pore space structure of cloth, the pore space structure of those irregular distributions include multiple hexagonal holes, and wherein second semiconductor layer includes
Electric conductivity is p-type；And
Semiconductor contact layer, positioned at second semiconductor layer.
2. light emitting diode as claimed in claim 1, wherein first sublevel have the first impurity concentration, second sublevel tool
There is the second impurity concentration, which has identical electric conductivity with second sublevel, and second impurity concentration is more than
First impurity concentration.
3. light emitting diode as claimed in claim 2, wherein second semiconductor layer also include third time layer, positioned at this first
Between sublevel and second sublevel, wherein the third time layer has the electric conductivity identical with second sublevel；And the wherein the 3rd
Sublevel has the 3rd impurity concentration, and the 3rd impurity concentration between first impurity concentration and second impurity concentration it
Between.
4. light emitting diode as claimed in claim 3, the wherein thickness of the third time layer be more than first sublevel and this
Quadratic-layer, and the third time layer does not contain aluminium component and first sublevel contains aluminium component.
5. light emitting diode as claimed in claim 2, also comprising electronic barrier layer, between the active layer and second semiconductor
Between layer, wherein the material of the electronic barrier layer includes AlzGa1-zN(0.15<z<0.4), and the electronic barrier layer impurity it is dense
Degree is higher than second impurity concentration.
6. light emitting diode as claimed in claim 1, the wherein at least one hexagonal hole is extended in second semiconductor layer
Portion.
7. a kind of production method of light emitting diode, comprising：
One substrate is provided；
One first semiconductor layer is formed on the substrate；
An active layer is formed in first semiconductor layer；And
It is epitaxially formed and includes AlxGa1-xN(0<x<1) one second semiconductor layer is on the active layer, wherein second semiconductor
The surface of layer includes the pore space structure of multiple irregular distributions；The step of wherein forming second semiconductor layer is also comprising shape at the same time
Into the pore space structure of the irregular distribution；The pore space structure of those irregular distributions includes multiple hexagonal holes.
8. the production method of light emitting diode as claimed in claim 7, wherein the step of forming second semiconductor layer is also wrapped
Containing being passed through the organic metal gas containing aluminium into an organometallic vapor deposition reactor with a predetermined amount of flow.
9. the production method of light emitting diode as claimed in claim 8, wherein, the predetermined amount of flow is between 30~300sccm.
10. the pressure of the production method of light emitting diode as claimed in claim 8, wherein the organometallic vapor deposition reactor
Power is between 300~500torr.
11. the temperature of the production method of light emitting diode as claimed in claim 8, wherein the organometallic vapor deposition reactor
Degree is between 900~1100 DEG C.
12. the production method of light emitting diode as claimed in claim 7, the wherein at least one hexagonal hole extend to this second
Inside semiconductor layer.
13. a kind of light emitting diode, comprising：
First semiconductor layer；
Active layer, positioned at first semiconductor layer；
Second semiconductor layer, on the active layer, comprising the first sublevel and be formed on first sublevel second
Layer, wherein the material of second sublevel includes AlxGa1-xN(0<x<1) and the surface of second sublevel includes multiple irregular points
The pore space structure of cloth；And
Semiconductor contact layer, positioned at second semiconductor layer, the wherein pore space structure of those irregular distributions includes multiple
Hexagonal hole, and at least one hexagonal hole is extended to inside second semiconductor layer.
14. light emitting diode as claimed in claim 13, wherein second semiconductor layer are p-type comprising electric conductivity.
15. light emitting diode as claimed in claim 13, wherein first sublevel have the first impurity concentration, second sublevel
With the second impurity concentration, which has identical electric conductivity with second sublevel, and second impurity concentration is big
In first impurity concentration.
16. light emitting diode as claimed in claim 15, wherein second semiconductor layer also include third time layer, positioned at this
Between one sublevel and second sublevel, wherein the third time layer has the electric conductivity identical with second sublevel；And wherein this
Three sublevels have the 3rd impurity concentration, and the 3rd impurity concentration is between first impurity concentration and second impurity concentration
Between.
17. light emitting diode as claimed in claim 16, the wherein thickness of the third time layer are more than first sublevel and should
Second sublevel, and the third time layer does not contain aluminium component and first sublevel contains aluminium component.
18. light emitting diode as claimed in claim 15, also comprising electronic barrier layer, the second half led with this between the active layer
Between body layer, wherein the material of the electronic barrier layer includes AlzGa1-zN(0.15<z<0.4), and the electronic barrier layer impurity
Concentration is higher than second impurity concentration.
19. a kind of light emitting diode, comprising：
First semiconductor layer；
Active layer, positioned at first semiconductor layer；
Second semiconductor layer, on the active layer, comprising the first sublevel and be formed on first sublevel second
Layer, wherein the material of second sublevel includes AlxGa1-xN(0<x<1) and the surface of second sublevel includes multiple irregular points
The pore space structure of cloth, wherein first sublevel have the first impurity concentration, which has the second impurity concentration, this first
Sublevel has identical electric conductivity with second sublevel, and second impurity concentration is more than first impurity concentration, wherein should
Second semiconductor layer is p-type comprising electric conductivity；And
Semiconductor contact layer, positioned at second semiconductor layer.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810358160.1A CN108365066B (en) | 2013-02-08 | 2013-02-08 | Light emitting diode and manufacturing method thereof |
| CN201310049983.3A CN103985802B (en) | 2013-02-08 | 2013-02-08 | Light emitting diode and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310049983.3A CN103985802B (en) | 2013-02-08 | 2013-02-08 | Light emitting diode and preparation method thereof |
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| CN201810358160.1A Division CN108365066B (en) | 2013-02-08 | 2013-02-08 | Light emitting diode and manufacturing method thereof |
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| Publication Number | Publication Date |
|---|---|
| CN103985802A CN103985802A (en) | 2014-08-13 |
| CN103985802B true CN103985802B (en) | 2018-05-15 |
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| CN201810358160.1A Active CN108365066B (en) | 2013-02-08 | 2013-02-08 | Light emitting diode and manufacturing method thereof |
| CN201310049983.3A Active CN103985802B (en) | 2013-02-08 | 2013-02-08 | Light emitting diode and preparation method thereof |
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| US8013320B2 (en) * | 2006-03-03 | 2011-09-06 | Panasonic Corporation | Nitride semiconductor device and method for fabricating the same |
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| KR101459752B1 (en) * | 2007-06-22 | 2014-11-13 | 엘지이노텍 주식회사 | Semiconductor light emitting device and fabrication method thereof |
| JP5533791B2 (en) * | 2011-06-20 | 2014-06-25 | 豊田合成株式会社 | Group III nitride semiconductor light emitting device manufacturing method |
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| TW201145572A (en) * | 2010-03-05 | 2011-12-16 | Showa Denko Kk | Method for producing semiconductor light emitting device and semiconductor light emitting device, lamp, electronic device, machinery equipment |
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| CN108365066A (en) | 2018-08-03 |
| CN108365066B (en) | 2020-06-02 |
| CN103985802A (en) | 2014-08-13 |
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