CN108335675A - 显示面板 - Google Patents

显示面板 Download PDF

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Publication number
CN108335675A
CN108335675A CN201810128004.6A CN201810128004A CN108335675A CN 108335675 A CN108335675 A CN 108335675A CN 201810128004 A CN201810128004 A CN 201810128004A CN 108335675 A CN108335675 A CN 108335675A
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sub
switch
pixel
source electrode
electric capacity
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CN108335675B (zh
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许文曲
任珂锐
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AU Optronics Corp
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AU Optronics Corp
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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275Details of drivers for data electrodes
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    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
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    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
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    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种显示面板。像素阵列包括多个第一子像素、耦接这些第一子像素的第一源极线、与这些第一子像素显示同色光的多个第二子像素以及耦接这些第二子像素的第二源极线。多工器电路包括耦接于第一源极线与源极驱动器之间的第一开关以及耦接于第二源极线与源极驱动器之间的第二开关。第一补偿电容耦接于第一源极线与参考电压之间,其中第一补偿电容的电容值相关于第一开关的截止时间点。第二补偿电容耦接于第二源极线与参考电压之间,其中第二补偿电容的电容值相关于第二开关的截止时间点,其中第一开关的截止时间点不同于第二开关的截止时间点。

Description

显示面板
技术领域
本发明涉及一种显示技术,且特别涉及一种显示面板。
背景技术
在现在的显示器技术中,源极驱动器通过多工器电路将像素电压传送至像素,以减少源极驱动器中的数据通道的数目是种常见的手段。
然而若是多工器中对于所驱动的子像素的比例超过1:4,就会影响所传送的像素电压,使得多工器所驱动的显示同色光的子像素的电压不一致,进而因此造成显示面板的亮暗线现象发生。
发明内容
本发明的实施例提供一种显示面板,利用补偿电容可以抑制显示面板的亮暗线现象的发生。
本发明的一实施例中的显示面板包括像素阵列、多工器电路、第一补偿电容以及第二补偿电容。像素阵列包括多个第一子像素、耦接这些第一子像素的第一源极线、与这些第一子像素显示同色光的多个第二子像素以及耦接这些第二子像素的第二源极线。多工器电路包括耦接于第一源极线与源极驱动器之间的第一开关以及耦接于第二源极线与源极驱动器之间的第二开关。第一补偿电容耦接于第一源极线与参考电压之间,其中第一补偿电容的电容值相关于第一开关的截止时间点。第二补偿电容耦接于第二源极线与参考电压之间,其中第二补偿电容的电容值相关于第二开关的截止时间点,其中第一开关的截止时间点不同于第二开关的截止时间点。
基于上述,本发明的实施例中的显示面板将使用同组多工器并且显示同色的子像素的补偿电容大小设计为不相同,子像素所对应的补偿电容的电容值大小与对应的多工器的开启顺序相反,因此可以抑制显示面板的亮暗线现象的发生。
为让本发明的上述特征和优点能更明显易懂,下文特举实施例,并配合附图作详细说明如下。
附图说明
图1为依据本发明一实施例的显示面板的结构示意图。
图2为依据本发明一实施例的子像素的电路结构示意图。
图3为依据本发明一实施例的子像素电路结构的动作波形示意图。
图4为依据本发明一实施例的显示面板的部分结构示意图。
图5为不具有补偿电容的子像素电路结构的电压随时间变化的示意图。
图6A与图6B分别为依据本发明一实施例的发出相同色光的两个子像素电路结构的示意图。
附图标记说明:
100:显示面板
110:像素阵列
112:第一源极线
114:第二源极线
116:栅极线
120:多工器电路
122:第一开关单元
124:第二开关单元
130:第一补偿电容单元
140:第二补偿电容单元
150:源极驱动器
C1:第一电容
Ccomp1、Ccomp2:电容值
Cdata1、Cdata1:等效电容
Cp1、Cp2、Cp3:第一补偿电容
Cp4、Cp5、Cp6:第二补偿电容
DATA:数据电压
EM:发光信号
LED:发光二极管
MUX1、MUX2、MUX3、MUX4、MUX5、MUX6:开关信号
mux1、mux2、mux3:第一开关
mux4、mux5、mux6:第二开关
OFF:断开状态期间
ON:水平扫描期间
PX:像素
R1、G1、B1:第一子像素
R2、G2、B2:第二子像素
SCAN:扫描信号
t1、t2、t3、t4、t5、t6:使能期间
T1:第一晶体管
T2:第二晶体管
T3:第三晶体管
tc1、tc2、tc3:第一补偿时间
tc4、tc5、tc6:第二补偿时间
tp1、tp2、tp3、tp4、tp5、tp6:截止时间点
V1、V2:电压变化曲线
VCOM:共同电压
VDD:系统电压
XDD:显示数据
具体实施方式
图1为依据本发明一实施例的显示面板的结构示意图。请参照图1,显示面板100包括像素阵列110、多工器电路120、第一补偿电容单元130、第二补偿电容单元140,显示面板100还包括源极驱动器150。在本实施例中,显示面板100是包括源极驱动器150,但在其他实施例中,源极驱动器150可以配置于耦接显示面板100的电路板(例如柔性电路板(FPC))上。
像素阵列110包括成阵列排列的多个像素PX、多条第一源极线112与多条第二源极线114,以及多条栅极线116,并且图1所示仅作为示例,但实际上像素PX、第一源极线112、第二源极线114及栅极线116的数目并不以此为限,亦即像素PX、第一源极线112、第二源极线114及栅极线116的数目是2以上的整数。其中,各个像素PX耦接对应的源极线(如112或114所示)及对应的栅极线116,以接收对应的扫描信号SCAN,其中每个像素PX还包括多个子像素,例如左边的像素PX包括多个第一子像素R1、G1与B1,右边的像素PX包括多个第二子像素R2、G2与B2,用以分别显示红色、绿色与蓝色的色光。第一源极线112耦接这些第一子像素R1、G1与B1,第二源极线114耦接这些第二子像素R2、G2与B2。在本实施例中,每个像素PX的子像素数目为三个,但在其他实施例中每个像素的子像素数目并不以此为限。
具体来说,子像素R1与子像素R2用以显示相同的红色色光,子像素G1与子像素G2用以显示相同的绿色色光,子像素B1与子像素B2用以显示相同的蓝色色光。相同的色光例如是所发射色光的中心波长(颜色)与亮度相同,也就是说用以显示相同色光的子像素的发光元件实质上相同,例如子像素R1与子像素R2的发光元件实质上相同。
第一补偿电容单元130耦接于第一源极线112与参考电压(例如共同电压VCOM)之间,第二补偿电容单元140耦接于第二源极线114与参考电压(例如共同电压VCOM)之间。在此,第一补偿电容单元130与第二补偿电容单元140可以被配置于像素阵列110之外,例如第一补偿电容单元130与第二补偿电容单元140可以被配置于像素阵列110中相较于源极驱动器150的另一侧。第一补偿电容单元130包括第一补偿电容Cp1、Cp2、Cp3,分别耦接第一子像素R1、G1与B1,第二补偿电容单元140包括第二补偿电容Cp4、Cp5、Cp6,分别耦接第二子像素R2、G2与B2。在本实施例中,第一补偿电容Cp1、Cp2、Cp3及第二补偿电容Cp4、Cp5、Cp6用以针对各个子像素(如R1、G1、B1、R2、G2、B2)的补偿时间的不同作电压性的补偿(其于稍后说明),换言之,对应于同色的子像素(如第一子像素G1及第二子像素G2)的第一补偿电容(如Cp2)的电容值与第二补偿电容(如Cp5)的电容值彼此不相同。
多工器电路120包括第一开关单元122及第二开关单元124。第一开关单元122耦接于第一源极线112的第一端,第一补偿电容单元130耦接于第一源极线112的第二端,第二开关单元124耦接于第二源极线114的第一端,并且第二补偿电容单元140耦接于第二源极线114的第二端。
在本实施例中,多工器电路120耦接于像素阵列110与源极驱动器150之间,源极驱动器150例如耦接时序控制器(在此未示出),以依据时序控制器所提供的显示数据XDD产生数据电压DATA,多工器电路120将数据电压DATA传送至像素阵列110。具体来说,第一开关单元122耦接于第一源极线112与源极驱动器150之间,第二开关单元124耦接于第二源极线114与源极驱动器150之间。第一开关单元122包括多个第一开关mux1、mux2以及mux3,分别通过第一源极线112耦接在第一子像素R1、G1和B1以及源极驱动器150之间,也就是说,第一开关mux1可以将源极驱动器150所产生的数据电压DATA传送至第一子像素R1以驱动第一子像素R1,第一开关mux2可以将数据电压DATA传送至第一子像素G1以驱动第一子像素G1,第一开关mux3可以将数据电压DATA传送至第一子像素B1以驱动第一子像素B1。另一方面,第二开关单元124也包括多个第二开关mux4、mux5以及mux6,其作用与第一开关mux1、mux2和mux3相似,用以分别驱动第二子像素R2、G2与B2,其中第一开关mux1、mux2、mux3及第二开关mux4、mux5、mux6共同耦接至源极驱动器150,以接收同一数据电压DATA,亦即第一开关mux1、mux2、mux3及第二开关mux4、mux5、mux6在同一时间最多导通其中之一。
在本实施例中,上述的第一开关mux1、mux2、mux3及第二开关mux4、mux5、mux6是以开关晶体管的方式实施,例如是使用P通道晶体管(PMOS),然而本发明并不受限于此,在其他的实施例中,这些开关也可以通过N通道晶体管(NMOS)的方式实施或者是互补晶体管(CMOS),本技术领域中技术人员可依据上述实施方式以及通常知识而依照实际需求作适当调整。在此不再赘述。
在本实施例中,发出同色光的子像素的第一补偿电容的电容值与第二补偿电容的电容值会与所对应的开关的截止时间有关,举例来说,第一补偿电容Cp1与第二补偿电容Cp4分别对应于发出同色光的第一子像素R1与第二子像素R2,而且第一补偿电容Cp1的电容值相关于所对应的第一开关mux1的截止时间点,第二补偿电容Cp4的电容值相关于第二开关mux4的截止时间点,其中第一开关mux1的截止时间点不同于第二开关mux4的截止时间点,因此第一补偿电容Cp1的电容值与第二补偿电容Cp4的电容值不相同。以此类推,分别对应于第一子像素G1与第二子像素G2的第一补偿电容Cp2的电容值与第二补偿电容Cp5的电容值不相同,分别对应于第一子像素B1与第二子像素B2的第一补偿电容Cp3的电容值与第二补偿电容Cp6的电容值也不相同。具体来说,本发明实施例中对应于发出同色光的子像素的第一补偿电容的电容值与第二补偿电容的电容值之间的大小关系与第一开关单元122和第二开关单元124中开关(如mux1~mux6)的断开(截止)顺序相反,以下将会详细阐述。
图2为依据本发明一实施例的子像素的电路结构示意图。请参照图1及图2,图2的子像素电路结构可适用在显示面板100的任一子像素,例如第一子像素R1、G1、B1及第二子像素R2、G2、B2中的任一者。在本实施例中,第一子像素R1、G1、B1与第二子像素R2、G2、B2分别包括第一晶体管T1、第二晶体管T2、第三晶体管T3、第一电容C1以及发光二极管LED。在本实施例中,发光二极管LED为有机发光二极管或者是微发光二极管(uLED),第一晶体管T1、第二晶体管T2与第三晶体管T3以P通道晶体管作为示例,然而本发明并不限制于此,在某些实施例中,第一晶体管T1、第二晶体管T2与第三晶体管T3可以是N通道晶体管(NMOS),发光二极管LED可以是有机发光二极管(OLED)、无机的发光二极管(LED)或是其他固态发光元件,本技术领域中技术人员可依据实施方式以及通常知识而依照实际需求作适当调整。
在本实施例中,第一晶体管T1的源极端耦接第一电压,第一电容C1耦接于第二电压与第一晶体管T1的栅极端之间,其中第一电压及第二电压的其中之一为第一源极线112或第二源极线114所传送的数据电压DATA,第一电压及第二电压的其中另一为不同于共同电压VCOM的系统电压VDD。在本实施例中,第一电压是数据电压DATA,第二电压是系统电压VDD。
在一实施例中,第一晶体管T1提供驱动电流给发光二极管LED。第二晶体管T2的源极端耦接第一晶体管T1的漏极端,第二晶体管T2的漏极端耦接第一晶体管T1的栅极端,第二晶体管T2的栅极端则用以接收扫描信号SCAN,并且第二晶体管T2受控于扫描信号SCAN以导通或断开。第三晶体管T3具有耦接第一晶体管T1的漏极端的源极端,并且第三晶体管T3的栅极端接收发光信号EM,以受控于发光信号EM以导通或断开。发光二极管LED耦接于第三晶体管T3的漏极端与共同电压VCOM之间,并依据第三晶体管T3的导通或断开状态来决定是否接收来自第一晶体管T1的驱动电流而发光。
图3为依据本发明一实施例的子像素电路结构的动作波形示意图。请参照图1、图2及图3,在子像素R1、G1、B1、R2、B2与G2中,第二晶体管T2受控于扫描信号SCAN以导通或断开,多工器电路120中的多个开关mux1、mux2、mux3、mux4、mux5以及mux6分别接收开关信号MUX1、MUX2、MUX3、MUX4、MUX5以及MUX6以导通或断开,子像素R1、G1、B1、R2、B2与G2则根据所接收的数据电压DATA进行显示。
在本实施例中,在断开状态期间OFF中,扫描信号SCAN为禁能电平(例如高电平),此时第二晶体管T2为断开状态,而在水平扫描期间ON中,扫描信号SCAN为使能电平(例如低电平),此时第二晶体管T2为导通状态,并且开关mux1、mux2、mux3、mux4、mux5以及mux6于水平扫描期间ON内按序导通。详细来说,开关信号MUX1、MUX2、MUX3、MUX4、MUX5以及MUX6会按序使能(如使能期间t1、t2、t3、t4、t5与t6所示),使得多工器电路120中的开关mux1、mux2、mux3、mux4、mux5以及mux6按序在水平扫描期间ON内被导通,让子像素R1、G1、B1、R2、B2与G2分别接收所对应的数据电压DATA。
在本实施例中,假设子像素的写入顺序为G1、G2、R1、R2、B1,最后是B2。在扫描信号SCAN使能的时候(亦即水平扫描期间ON),对应于子像素G1的第一开关mux2首先在使能期间t2内被导通,使得子像素G1接收要显示的数据电压DATA。在经过使能期间t2后,在截止时间点tp2第一开关mux2被关闭。接着,对应于子像素G2的第二开关mux5在使能期间t5内被导通,在截止时间点tp5被关闭,之后以此类推,第一开关mux1、第二开关mux4、第一开关mux3与第二开关mux6先后在使能期间t1、t4、t3与t6被导通,并且在截止时间点tp1、tp4、tp3与tp6被断开。也就是说,对应于同色光的子像素的第一开关与第二开关的截止时间点不相同,而在本实施例中,第一开关mux1、mux2、mux3的截止时间与第二开关mux4、mux5、mux6的截止时间全部不相同。
如上所述,第一开关mux1、mux2、mux3的截止时间点tp1、tp2、tp3早于对应的第二开关mux4、mux5、mux6的截止时间点tp4、tp5、tp6,因此第一源极线112对第一子像素R1、G1、B1进行充电的第一补偿时间tc1、tc2、tc3会分别大于第二源极线114对第二子像素R2、G2、B2的第二补偿时间tc4、tc5、tc6,其中第一补偿时间tc1、tc2、tc3分别为截止时间点tp1、tp2、tp3至水平扫描期间ON的截止时间点(亦即扫描信号SCAN中对应的上升沿的时间点),第二补偿时间tp4、tp5、tp6为截止时间点tp4、tp5、tp6至水平扫描期间ON的截止时间点。
图4为依据本发明一实施例的显示面板的部分结构示意图。进一步来说,图4为显示面板100的部分结构示意图,为了说明方便,图4仅示出与子像素G1与子像素G2相关的部分,其余子像素的部分则忽略,但显示同色光的子像素之间的关系可以此类推,在此不再赘述。以下请同步参照图1至图4。
在本实施例中,第一开关mux2在截止时间点tp2被断开后,在第一补偿时间tc2中,子像素G1中的第一电容C1仍因为第一源极线112的等效电容(例如图4所示的Cdata1)中存在的电荷而继续被充电;第二开关mux5在截止时间点tp5被断开后,子像素G2中的第一电容C1同样因为第二源极线114的等效电容(例如图4所示的Cdata2)中存在的电荷而在第二补偿时间tc5中继续被充电。
图5为不具有补偿电容的子像素电路结构的电压随时间变化的示意图。请参照图4及图5,在没有补偿电容的显示面板中,亦即没有图1中的第一补偿电容单元130及第二补偿电容单元140,第一开关mux2在截止时间点tp2被断开后,子像素G1中的第一电容C1在第一补偿时间tc2中继续被充电,其电压变化曲线如曲线V1所示;子像素G2中的第一电容C1在第一补偿时间tc5中的电压变化曲线如曲线V2所示,由于截止时间点tp2早于截止时间点tp5,因此子像素G1与子像素G2各自的第一电容C1被充电的时间长短不同(第一补偿时间tc2大于第二补偿时间tc5),因此两者之间存在电压差ΔVG,此电压差ΔVG会造成子像素G1与子像素G2显示的色光之间有偏差,亦即同色光的亮度有差异。
再回到图1,本实施例的第一补偿电容Cp1、Cp2或Cp3的电容值相关于第一开关mux1、mux2、mux3的截止时间点tp1、tp2、tp3,第二补偿电容Cp4、Cp5或Cp6的电容值相关于第二开关mux4、mux5、mux6的截止时间点tp4、tp5、tp6。并且,第一开关mux1、mux2、mux3的截止时间点tp1、tp2、tp3分别早于第二开关mux4、mux5、mux6的截止时间点tp4、tp5、tp6,因此第一补偿电容Cp1、Cp2及Cp3的电容值分别小于第二补偿电容Cp4、Cp5及Cp6中对应者的电容值,以平衡补偿时间(亦即数据电压DATA写入后的充电时间)不同所造成的差异。
具体来说,如图4的实施例所示,第一开关mux2所对应的截止时间点tp2会早于第二开关mux5所对应的截止时间点tp5,并且第一补偿电容Cp2的电容值Ccomp1被设计为小于第二补偿电容Cp5的电容值Ccomp2。在一实施例中,电容值Ccomp1可设计为1fF(femtofarad),电容值Ccomp2可设计为400fF。另外需说明的是,在一实施例中,属于同一像素PX的子像素的补偿电容的电容值可以相同,例如子像素R1与B1所对应的第一补偿电容Cp1与Cp3可以设计为同一电容值Ccomp1,而子像素R2与B2所对应的第二补偿电容Cp4与Cp6可以设计为同一电容值Ccomp2。在另一实施例中,属于同像素PX的子像素的补偿电容的电容值可以不相同,本发明并不限制于此。
图6A与图6B分别为依据本发明一实施例的发出相同色光的两个子像素电路结构的示意图。请参照图6A与图6B,图6A例如为子像素G1的电路结构的示意图,图6B例如为子像素G2的电路结构的示意图。在第一补偿时间tc2中,子像素G1的第一晶体管T1与第二晶体管T2为导通状态,子像素G1的第三晶体管T3为断开状态,此时第一补偿电容Cp2进行放电,而充电的电流I1会通过第一晶体管T1与第二晶体管T2达到电容C1的一端。同样地,在第二补偿时间tc5中,子像素G2的第一晶体管T1与第二晶体管T2为导通状态,子像素G2的第三晶体管T3为断开状态,此时第二补偿电容Cp5进行放电,使充电的电流I2通过第一晶体管T1与第二晶体管T2达到电容C1的一端。并且,第二补偿时间tc5较短于第一补偿时间tc2。但是,为了使子像素G1及G2的电容C1具有相同的充电效果,亦即在相同灰阶值的条件下存储相同的电荷,第二补偿电容Cp5的电容值Ccomp2可以设计为大于第一补偿电容Cp2的电容值Ccomp1,使得电流I2会大于电流I1,借此让子像素G2的电容C1的充电效果与子像素G1的电容C1的充电效果相近或相同。
综上所述,本发明的一实施例中的显示面板通过耦至源极线的补偿电容,对显示同色耦接同一多工器电路的子像素进行电压性补偿,其中补偿电容的电容值大小与显示同色的子像素的补偿时间相关,亦即较早开启的多工器所对应的补偿电容会小于较晚开启的多工器所对应的补偿电容,因此可以抑制显示面板的亮暗线现象的发生。
虽然本发明已以实施例公开如上,然其并非用以限定本发明,任何所属技术领域中技术人员,在不脱离本发明的构思和范围内,当可作些许的变动与润饰,故本发明的保护范围当视权利要求所界定者为准。

Claims (9)

1.一种显示面板,包括:
一像素阵列,包括:
多个第一子像素;
一第一源极线,耦接所述多个第一子像素;
多个第二子像素,与所述多个第一子像素显示同色光;以及
一第二源极线,耦接所述多个第二子像素;
一多工器电路,包括:
一第一开关,耦接于该第一源极线与一源极驱动器之间;以及
一第二开关,耦接于该第二源极线与该源极驱动器之间;
一第一补偿电容,耦接于该第一源极线与一参考电压之间,其中该第一补偿电容的电容值相关于该第一开关的截止时间点;
一第二补偿电容,耦接于该第二源极线与该参考电压之间,其中该第二补偿电容的电容值相关于该第二开关的截止时间点,其中该第一开关的截止时间点不同于该第二开关的截止时间点。
2.如权利要求1所述的显示面板,其中该第一开关及该第二开关于一水平扫描期间内按序导通。
3.如权利要求2所述的显示面板,其中在该水平扫描期间,该第一开关的一截止时间点早于该第二开关的一截止时间点,并且该第一补偿电容的电容值小于该第二补偿电容的电容值。
4.如权利要求3所述的显示面板,其中该第一源极线对所述多个第一子像素的一第一补偿时间大于该第二源极线对所述多个第二子像素的一第二补偿时间,以致于该第一补偿电容的电容值小于该第二补偿电容的电容值。
5.如权利要求4所述的显示面板,其中该第一补偿时间为该第一开关的该截止时间点至该水平扫描期间的一截止时间点,该第二补偿时间为该第二开关的截止时间点至该水平扫描期间的该截止时间点。
6.如权利要求1所述的显示面板,其中该第一开关耦接于该第一源极线的第一端,该第一补偿电容耦接于该第一源极线的第二端,该第二开关耦接于该第二源极线的第一端,并且该第二补偿电容耦接于该第二源极线的第二端。
7.如权利要求1所述的显示面板,其中所述多个第一子像素及所述多个第二子像素分别包括:
一第一晶体管,具有耦接一第一电压的一源极端、一栅极端、及一漏极端;
一第一电容,耦接于一第二电压与该第一晶体管的该栅极端之间;
一第二晶体管,具有耦接该第一晶体管的该漏极端的一源极端、接收一扫描信号的一栅极端、及耦接该第一晶体管的该栅极端的一漏极端;
一第三晶体管,具有耦接该第一晶体管的该漏极端的一源极端、接收一发光信号的一栅极端、及一漏极端;以及
一有机发光二极管,耦接于该第三晶体管的该漏极端与一共同电压之间;
其中,该第一电压及该第二电压的其中之一为该第一源极线或该第二源极线所传送的一数据电压,该第一电压及该第二电压的其中另一为不同于该共同电压的一系统电压。
8.如权利要求1所述的显示面板,其中该参考电压为一共同电压。
9.如权利要求1所述的显示面板,其中该源极驱动器配置于耦接该显示面板的一电路板上。
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