CN108281376A - 一种半导体器件的制备方法 - Google Patents

一种半导体器件的制备方法 Download PDF

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CN108281376A
CN108281376A CN201810058543.7A CN201810058543A CN108281376A CN 108281376 A CN108281376 A CN 108281376A CN 201810058543 A CN201810058543 A CN 201810058543A CN 108281376 A CN108281376 A CN 108281376A
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semiconductor devices
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季莲
叶赛
周剑秋
丁超
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Nanjing Tech University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/184Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
    • H01L31/1844Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIIBV compounds, e.g. GaAs, InP comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68345Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/544Solar cells from Group III-V materials
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Condensed Matter Physics & Semiconductors (AREA)
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Abstract

本发明公开了一种半导体器件的制备方法,包括:(1)提供一衬底;(2)在衬底上添加一层二维材料层;(3)在二维材料层上沉积缓冲层;(4)在缓冲层上沉积半导体器件结构;(5)在半导体器件结构上沉积金属Ni层;(6)用热释放胶带将二维材料以上的结构从二维材料层上取下,包括缓冲层、半导体器件结构和金属Ni层;(7)在缓冲层下表面蒸镀背电极;(8)通过加热取下热释放胶带;(9)用腐蚀的方法去除金属Ni层;(10)在半导体器件结构上表面蒸镀正面电极。本发明工艺简单,且衬底可以多次循环利用,降低太阳电池等半导体器件的生产成本。

Description

一种半导体器件的制备方法
技术领域
本发明涉及半导体器件技术领域,尤其涉及一种半导体器件的制备方法。
背景技术
一直以来,制约太阳能电池大规模应用的主要瓶颈是较低的光电转换效率和过高的成本,高效低能耗的太阳电池必然是未来发展的趋势。III-V化合物半导体太阳电池凭借着近乎完美的晶体质量和成熟的工艺条件,多年一直保持着多项太阳电池效率的记录。单结GaAs太阳电池最高转换效率达到28.2%,基于GaAs和InP材料的四结叠层太阳电池更实现了46%的光电转换效率。但是,由于高昂的制造成本,该类太阳电池目前仅应用于空间技术中。
要降低III-V化合物半导体太阳电池成本,一种方法是采用衬底剥离技术去除衬底,使其循环利用。III-V化合物半导体太阳电池一般采用金属有机物化学气相沉积或分子束外延的方法在GaAs(或InP)衬底上沉积电池材料,由于高的吸收系数电池材料的厚度仅为几微米,而衬底厚度为却是几百微米,如果能将衬底剥离下来重复利用,则电池成本可以大大降低。但是衬底剥离的工艺复杂,且剥离下来的衬底需要再次加工才能循环利用。同样其他在衬底上外延生长的半导体器件也存在以上问题,衬底很难剥离,也无法循环利用。
发明内容
发明目的:本发明针对现有技术存在的问题,提供一种半导体器件的制备方法,可以在沉积完半导体材料(例如太阳电池)后直接将其从衬底上取下来,工艺简单,且衬底可以多次循环利用,降低生产成本。
技术方案:本发明所述的半导体器件的制备方法包括:
(1)提供一衬底;
(2)在衬底上添加一层二维材料层;
(3)在二维材料层上沉积缓冲层;
(4)在缓冲层上沉积半导体器件结构;
(5)在半导体器件结构上沉积金属Ni层;
(6)用热释放胶带将二维材料以上的结构从二维材料层上取下,包括缓冲层、半导体器件结构和金属Ni层;
(7)在缓冲层下表面蒸镀背电极;
(8)通过加热取下热释放胶带;
(9)用腐蚀的方法去除金属Ni层;
(10)在半导体器件结构上表面蒸镀正面电极。
其中,所述衬底的材料与半导体器件的材料一致。
进一步的,所述沉积的方法为金属有机物化学气相沉积或分子束外延。所述蒸镀的方法为磁控溅射或电子束蒸发。
进一步的,所述二维材料优选为石墨烯,可以为单原子层、双原子层和三原子层中的任一种。
有益效果:本发明与现有技术相比,其显著优点是:
(1)本发明制备出的太阳电池等半导体器件厚度可以小于十微米,携带轻便且柔性可弯曲使用,拓展了太阳电池的应用范围。
(2)取下的衬底可循环利用,减少太阳电池等半导体器件所需要的材料成本,为太阳电池等半导体器件的大规模应用提供可靠的方案和技术保证。
附图说明
图1是本发明的一个实施例的流程示意图;
图2是本发明的另一实施例的流程示意图。
具体实施方式
实施例1
本实施例提供了一种太阳电池的制备方法,太阳电池为半导体器件中的一种,如图1所示,包括步骤:提供一衬底10,材料为GaAs,首先在衬底10上增加一层石墨烯11,所述石墨烯为单原子层。然后在石墨烯11上沉积缓冲层12,沉积方法为金属有机物化学气相沉积或分子束外延,缓冲层12材料为P-GaAs。再然后在缓冲层12上沉积太阳电池结构21,包括P-GaInP背场层13、P-GaAs基区14、N-GaAs发射区15、N-GaInP窗口层16、N-GaAs接触层17。接着在接触层17上蒸镀金属Ni 18,蒸镀的方法为磁控溅射或电子束蒸发。接下来用热释放胶带把石墨烯11以上部分取下,包括缓冲层12、太阳电池结构21、金属Ni层18。在缓冲层12的下表面蒸镀背电极19,电极材料为Ti/Pt/Au。用加热的方法去除热释放胶带。用腐蚀的方法去除金属Ni 18。在接触层17上蒸镀正面电极20,电极20材料为AuGe/Ni/Au,且电极为指状图形。用腐蚀的方法去除没有被正面电极20覆盖的接触层17,得到太阳电池。其中,石墨烯也可以为其他二维材料,只要小于一定厚度且有好的稳定性,另外,石墨烯还可以替换为双原子层或三原子层。
实施例2
本实施例提供了另外一种太阳电池的制备方法,同样如图1所示,包括步骤:提供一衬底10,材料为InP,首先在衬底10上增加一层石墨烯11,所述石墨烯为单原子层。然后在石墨烯11上沉积缓冲层12,沉积方法为金属有机物化学气相沉积或分子束外延,缓冲层12材料为P-InP。再然后在缓冲层12上沉积太阳电池结构21,包括P-InP背场层13、P-InGaAs基区14、N-InGaAs发射区15、N-InP窗口层16、N-InGaAs接触层17。接着在接触层17上蒸镀金属Ni 18,蒸镀的方法为磁控溅射或电子束蒸发。接下来用热释放胶带把石墨烯11以上部分取下,包括缓冲层12、太阳电池结构21、金属Ni层18。在缓冲层12的下表面蒸镀背电极19,电极材料为Pb/Zn/Pb/Zu。用加热的方法去除热释放胶带。用腐蚀的方法去除金属Ni 18。在接触层17上蒸镀正面电极20,电极20材料为Ni/AuGe/Ni/Au,且电极为指状图形。用腐蚀的方法去除没有被正面电极20覆盖的接触层17,得到太阳电池。其中,石墨烯也可以为替他二维材料,只要小于一定厚度且有好的稳定性,另外,石墨烯还可以替换为双原子层或三原子层。
实施例3
本实施例提供了一种发光二极管制备方法,发光二极管为半导体器件的一种,如图2所示,包括步骤:首先在衬底10上增加一层石墨烯11,所述衬底为GaAs,所述石墨烯为单原子层石墨烯。然后在石墨烯11上沉积缓冲层12,材料为P-GaAs,沉积方法为金属有机物化学气相沉积或分子束外延。再然后在缓冲层12上沉积发光二极管结构40,包括P-GaAs层31、N-GaAs层32。接着在N-GaAs层32上蒸镀金属Ni 18,蒸镀的方法为磁控溅射或电子束蒸发。接下来用热释放胶带把石墨烯11以上部分取下,包括缓冲层12、P-GaAs层31、N-GaAs层32、金属Ni层18。在缓冲层12的背面蒸镀背电极19,电极材料为Ti/Pt/Au。用加热的方法去除热释放胶带。用腐蚀的方法去除金属Ni 18。在N-GaAs层32上蒸镀正面图形化电极20,电极材料为AuGe/Ni/Au。
以上实施例只是部分示例,任何在衬底上外延生长的半导体器件,都可以采用本发明发明方法制备。

Claims (6)

1.一种半导体器件的制备方法,其特征在于该方法包括:
(1)提供一衬底;
(2)在衬底上添加一层二维材料层;
(3)在二维材料层上沉积缓冲层;
(4)在缓冲层上沉积半导体器件结构;
(5)在半导体器件结构上沉积金属Ni层;
(6)用热释放胶带将二维材料以上的结构从二维材料层上取下,包括缓冲层、半导体器件结构和金属Ni层;
(7)在缓冲层下表面蒸镀背电极;
(8)通过加热取下热释放胶带;
(9)用腐蚀的方法去除金属Ni层;
(10)在半导体器件结构上表面蒸镀正面电极。
2.根据权利要求1所述的半导体器件的制备方法,其特征在于:所述衬底的材料与半导体器件的材料一致。
3.根据权利要求1所述的半导体器件的制备方法,其特征在于:所述沉积的方法为金属有机物化学气相沉积或分子束外延。
4.根据权利要求1所述的半导体器件的制备方法,其特征在于:所述蒸镀的方法为磁控溅射或电子束蒸发。
5.根据权利要求1所述的半导体器件的制备方法,其特征在于:所述二维材料为石墨烯。
6.根据权利要求5所述的半导体器件的制备方法,其特征在于:所述石墨烯为单原子层、双原子层和三原子层中的任一种。
CN201810058543.7A 2018-01-22 2018-01-22 一种半导体器件的制备方法 Pending CN108281376A (zh)

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