CN108214110A - A kind of silicon polished edge processing technology - Google Patents
A kind of silicon polished edge processing technology Download PDFInfo
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- CN108214110A CN108214110A CN201611159340.4A CN201611159340A CN108214110A CN 108214110 A CN108214110 A CN 108214110A CN 201611159340 A CN201611159340 A CN 201611159340A CN 108214110 A CN108214110 A CN 108214110A
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- polishing
- single side
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- edge
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B1/00—Processes of grinding or polishing; Use of auxiliary equipment in connection with such processes
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- Mechanical Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
The invention discloses a kind of silicon polished edge processing technologys.The processing technology includes the following steps:(1) single side rough polishing is carried out to the silicon chip after caustic corrosion or acid corrosion using single side polishing machine;(2) silicon chip edge is processed by shot blasting using edge polisher;(3) polishing and fine polishing in being carried out using single side polishing machine.The present invention provides a kind of technology paths and processing flow for improving silicon polished edge quality, can effectively promote silicon polished edge quality, obtain the high quality silicon polished silicon wafer that edge is not damaged, is more suitable for extension processing.
Description
Technical field
The present invention relates to a kind of silicon polished edge processing technologys.
Background technology
Silicon materials are the main substrate materials for manufacturing super large-scale integration, with the rapid development of semicon industry,
It is also higher and higher to the required precision of substrate material, it is particularly more and more stringenter to silicon polished rim condition requirement.For
Especially 8 inches and 12 inches of 6 inches of diameter or more it is silicon polished for, generally add man-hour requirement to silicon chip edge in substrate
It is polished, with the defects of not the generating skid wire or extension fault at silicon chip edge that ensure to be delayed outside, so as to improve epitaxial wafer
Or device yield.The edge polishing of silicon chip is generally completed in independent equipment, using the method for chemically mechanical polishing, is used
Polishing fluid and polishing cloth realize CMP process under certain temperature and the process conditions of rotating speed.Edge finishing process
Silicon chip edge roughness can be improved, eliminate edge damage caused by chamfering process roughing.
In traditional edge polishing processing process, edge polishing is usually first carried out, then carry out single side rough polishing successively
The characteristics of light, middle polishing, fine polishing, the flow is that side throwing process is placed on before single-sided polishing process, due to single side rough polishing
When head pressure it is larger, rotating speed is higher, and used polishing cloth is harder, and during polishing, polishing cloth bears to come from head
Weight and generate compressive deformation, when rotational trajectory phase of the polishing cloth with rotational trajectory and the silicon chip of deep bid under head drive
When reverse, Slope Facies mutual friction that silicon chip edge and polishing cloth are formed due to deformation, edge is worn so as to roughening, and opposite side is thrown
Silicon chip edge afterwards causes secondary damage, as shown in Figure 2.Silicon polished easily being damaged when extension is processed of marginal existence damage
Injury generates extension stacking fault defects, reduces epitaxial wafer or device yield, influences product quality.Fig. 3 show the side delayed outside
Edge defect.
Invention content
The purpose of the present invention is to provide a kind of silicon polished edge processing technologys, reduce single side rough polishing photoreduction process to passing through
Silicon chip edge damage after edge polishing, improves extension processing and device process yield.
To achieve the above object, the present invention uses following technical scheme:
A kind of silicon polished edge processing technology, it includes the following steps:
(1) single side rough polishing is carried out to the silicon chip after caustic corrosion or acid corrosion using single side polishing machine;
(2) silicon chip edge is processed by shot blasting using edge polisher;
(3) polishing and fine polishing in being carried out using single side polishing machine.
One of preferred embodiment as the present invention, the Rockwell hardness of the polishing cloth used in the step (1) is 70-
90, the polishing speed of single side rough polishing is 0.5-1.5 microns of removal per minute, and single side rough polishing removal amount is 5-30 microns.
One of preferred embodiment as the present invention, between step (1) and step (2) and in step (2) and step
(3) increase cleaning step between, the polishing fluid on silicon chip is remained in, and to silicon chip after washing single side rough polishing or edge polishing
It is dried.
One of preferred embodiment as the present invention, the step (3) is middle to use single side polishing machine to the silicon after edge polishing
Piece carries out polishing and fine polishing in single side, and the Rockwell hardness that polishing cloth is used when being polished in single side is 50-85, in single side
The polishing speed of polishing is 0.2-0.8 microns of removal per minute, and it is 0.5-5 microns that removal amount is polished in single side.
The advantage of the invention is that:
The present invention provides a kind of technology paths and processing flow for improving silicon polished edge quality, can effectively be promoted
Silicon polished edge quality obtains the high quality silicon polished silicon wafer that edge is not damaged, is more suitable for extension processing.
Description of the drawings
Fig. 1 is the process flow chart that the present invention uses.
Fig. 2 is the silicon polished edge damage after conventional process flow processing.
Fig. 3 is that there are the silicon polished by outer the defects of delaying generation of edge damage.
Fig. 4 is the silicon polished edge pattern processed using technological process proposed by the present invention.
Wherein, the means of testing of Fig. 2-Fig. 4 is:Metallographic microscope, amplification factor are 100 times.
Specific embodiment
Below in conjunction with drawings and examples, the present invention will be further described, but protection scope of the present invention be not limited to
Lower specific embodiment.
Embodiment
Process 8 cun of heavily doped As, the chamfering number of degrees are 11 degree silicon polished.
In single side rough polishing process, polishing fluid is alkaline silicon dioxide micelle suspension, dilutes 20 times, polishes flow quantity
For 10L/min, used polishing cloth is that Rockwell hardness is 80, polish pressure 300g/cm2, the big disk rotating speed of single side rough polishing machine
For 25rpm, the polishing speed of single side rough polishing is 0.8 micron of removal per minute, and the total removal amount of single side rough polishing is 15 microns.It is single
After the rough polishing of face, silicon chip is cleaned using SC-1 and ultrasonic wave, and is dried using drying mode.In edge polishing work
Sequence, the Rockwell hardness for using edge polishing cloth are 60, and the pH value of polishing fluid is 11.After edge polishing, reuse SC-1 and
Ultrasonic wave cleans silicon chip, and is dried using drying mode.The polishing process in single side, polishing fluid are alkaline dioxy
SiClx micelle suspension dilutes 20 times, and polishing flow quantity is 10L/min, and used polishing cloth Rockwell hardness is 60, polishing pressure
Power is 200g/cm2, it is 25rpm that the big disk rotating speed of machine is thrown in single side, and the polishing speed polished in single side is micro- for removal 0.4 per minute
Meter, it is 3 microns that total removal amount is polished in single side.The use of polishing fluid is alkalescent in fine polishing process, polish pressure is
100g/cm2, the big disk rotating speed of single side precision polisher is 25rpm.
As shown in figure 4, the silicon polished edge that the present embodiment is processed is not damaged.
Claims (6)
1. a kind of silicon polished edge processing technology, which is characterized in that it includes the following steps:
(1) single side rough polishing is carried out to the silicon chip after caustic corrosion or acid corrosion using single side polishing machine;
(2) silicon chip edge is processed by shot blasting using edge polisher;
(3) polishing and fine polishing in being carried out using single side polishing machine.
2. silicon polished edge processing technology according to claim 1, which is characterized in that in the step (1), single side
The polishing speed of rough polishing is 0.5-1.5 microns of removal per minute, and single side rough polishing removal amount is 5-30 microns.
3. silicon polished edge processing technology according to claim 1, which is characterized in that in the step (1), single side
The Rockwell hardness of used polishing cloth is 70-90 during rough polishing.
4. silicon polished edge processing technology according to claim 1, which is characterized in that step (1) and step (2) it
Between and between step (2) and step (3) increase cleaning step, remained in after washing single side rough polishing or edge polishing
Polishing fluid on silicon chip, and silicon chip is dried.
5. silicon polished edge processing technology according to claim 1, which is characterized in that in the step (3), in single side
The polishing speed of polishing is 0.2-0.8 microns of removal per minute, and it is 0.5-5 microns that removal amount is polished in single side.
6. silicon polished edge processing technology according to claim 1, which is characterized in that in the step (3), single side
The Rockwell hardness of used polishing cloth is 50-85 during middle polishing.
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CN201611159340.4A CN108214110A (en) | 2016-12-14 | 2016-12-14 | A kind of silicon polished edge processing technology |
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CN201611159340.4A CN108214110A (en) | 2016-12-14 | 2016-12-14 | A kind of silicon polished edge processing technology |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109855931A (en) * | 2018-12-20 | 2019-06-07 | 河钢股份有限公司 | A kind of preparation method of austenitic alloy EBSD sample |
CN111251163A (en) * | 2018-11-30 | 2020-06-09 | 有研半导体材料有限公司 | Processing method for polished silicon wafer with hydrophilic surface |
CN115229565A (en) * | 2022-07-12 | 2022-10-25 | 中环领先半导体材料有限公司 | Edge polishing method for improving silicon wafer edge slip line |
CN117245458A (en) * | 2023-11-16 | 2023-12-19 | 山东有研艾斯半导体材料有限公司 | Silicon wafer middle polishing method, silicon wafer and preparation method thereof |
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JP2000015566A (en) * | 1998-06-30 | 2000-01-18 | Mitsubishi Materials Silicon Corp | Both surface polishing device for semiconductor wafer |
CN1424746A (en) * | 2001-12-06 | 2003-06-18 | 瓦克硅电子股份公司 | Silicon semiconductor crystal wafers and manufacturing method for multiple semiconductor crystal wafers |
CN101434047A (en) * | 2007-11-15 | 2009-05-20 | 硅电子股份公司 | Method for producing a semiconductor wafer with a polished edge |
CN101656195A (en) * | 2008-08-22 | 2010-02-24 | 北京有色金属研究总院 | Method for manufacturing large-diameter silicon wafer |
CN101791779A (en) * | 2009-12-03 | 2010-08-04 | 北京有色金属研究总院 | Semiconductor silicon wafer manufacture process |
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2016
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2000015566A (en) * | 1998-06-30 | 2000-01-18 | Mitsubishi Materials Silicon Corp | Both surface polishing device for semiconductor wafer |
CN1424746A (en) * | 2001-12-06 | 2003-06-18 | 瓦克硅电子股份公司 | Silicon semiconductor crystal wafers and manufacturing method for multiple semiconductor crystal wafers |
CN101434047A (en) * | 2007-11-15 | 2009-05-20 | 硅电子股份公司 | Method for producing a semiconductor wafer with a polished edge |
CN101656195A (en) * | 2008-08-22 | 2010-02-24 | 北京有色金属研究总院 | Method for manufacturing large-diameter silicon wafer |
CN101791779A (en) * | 2009-12-03 | 2010-08-04 | 北京有色金属研究总院 | Semiconductor silicon wafer manufacture process |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
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CN111251163A (en) * | 2018-11-30 | 2020-06-09 | 有研半导体材料有限公司 | Processing method for polished silicon wafer with hydrophilic surface |
CN111251163B (en) * | 2018-11-30 | 2021-04-30 | 有研半导体材料有限公司 | Processing method for polished silicon wafer with hydrophilic surface |
CN109855931A (en) * | 2018-12-20 | 2019-06-07 | 河钢股份有限公司 | A kind of preparation method of austenitic alloy EBSD sample |
CN115229565A (en) * | 2022-07-12 | 2022-10-25 | 中环领先半导体材料有限公司 | Edge polishing method for improving silicon wafer edge slip line |
CN117245458A (en) * | 2023-11-16 | 2023-12-19 | 山东有研艾斯半导体材料有限公司 | Silicon wafer middle polishing method, silicon wafer and preparation method thereof |
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Application publication date: 20180629 |