CN108183091A - 一种封装结构及其工艺方法 - Google Patents

一种封装结构及其工艺方法 Download PDF

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CN108183091A
CN108183091A CN201711456338.8A CN201711456338A CN108183091A CN 108183091 A CN108183091 A CN 108183091A CN 201711456338 A CN201711456338 A CN 201711456338A CN 108183091 A CN108183091 A CN 108183091A
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chip
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张江华
沈锦新
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JCET Group Co Ltd
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Jiangsu Changjiang Electronics Technology Co Ltd
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    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/49Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions wire-like arrangements or pins or rods
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
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    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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Abstract

本发明涉及的一种封装结构及其工艺方法,一种封装结构包括金属线路、芯片、焊线;芯片周围设置有金属线路,所述金属线路包括上部结构和下部结构,所述下部结构呈柱状,所述上部结构呈蘑菇形状;在载板表面贴覆光阻膜,然后曝光显影,将需要电镀的区域暴露开口,然后电镀金属线路,再去除光阻膜,装片、焊线、包封,最后去除载板、打印切割。本发明利用单次贴膜和电镀形成具有蘑菇形状的线路,缩小半导体封装结构的尺寸,提高线路和塑封料之间的结合性能。

Description

一种封装结构及其工艺方法
技术领域
本发明涉及半导体封装技术领域,尤其涉及一种封装结构及其工艺方法。
背景技术
随着电子产品如手机、笔记本电脑等朝着小型化、便携式、超薄化、多媒体以及满足大众化所需要的低成本方向发展,传统以引线框架作为承载件的半导体的封装的型态种类虽然繁多,但是传统的引线框往往因为厚度的限制,无法进一步的缩小封装件的整体高度。
因此发展出一种无承载板的半导体封装结构,该封装结构首先在一承载板上电镀一层金属形成超薄的线路,然后在线路上设置芯片并进行焊线连接,再进行包封形成封装胶体,最后移除承载板将线路露出,可以在露出表面刷上焊锡材料形成焊锡接点和外界PCB板电性连接。该封装结构较传统框架结构厚度超薄,但是此结构的金属层较薄,焊线的时候焊点处容易对金属层造成损伤。外金属层没有任何支撑,仅靠塑封料包封,若塑封料和金属层结合不好,金属层容易翘起与塑封料剥离,影响产品良率和可靠性。
发明内容
本发明的目的在于克服上述不足,提供一种封装结构及其工艺方法,缩小半导体封装结构的尺寸,提高线路和塑封料之间的结合性能。
本发明的目的是这样实现的:
根据本发明的一方面,提供一种封装结构,包括金属线路、芯片、焊线;芯片周围设置有金属线路,所述金属线路包括上部结构和下部结构,所述下部结构呈柱状,所述上部结构呈蘑菇形状。
其中,所述芯片通过焊线与金属线路连接。
一种封装结构,所述金属线路的上部结构与下部结构材质相同,材质可以是镍、金、铜、银中的一种。
一种封装结构,所述金属线路的上部结构与下部结构材质不同,两者材质的组合可以是镍与金、镍与铜。
一种封装结构,所述芯片内凹进封装结构,且封装结构底部露出芯片背面。
一种封装结构,所述芯片下方设置基岛。
本发明的另一方面,提供一种封装结构的工艺方法,包括以下步骤:
准备载板;
将载板的表面贴覆光阻膜;
然后曝光显影,将需要电镀的区域暴露开口;
接着在光阻膜暴露开口部分电镀金属线路的下部结构,在光阻膜开口中的下部结构是规则形状;
然后在下部结构的上方电镀上部结构,当电镀的高度超过光阻膜的厚度时,上部结构形成蘑菇形状;
接着去除载板表面的光阻膜,在载板的正面贴装芯片,然后通过焊线电性连接金属线路和芯片;
然后包封整个结构,包封后去除载板,最后打印、切割。
其中,所述载板可以是两面带铜层的金属板,也可以是玻璃纤维板或者有机材料板。
一种封装结构的工艺方法,包封后用蚀刻或剥离的方法去除载板。
一种封装结构的工艺方法,将芯片倒装。
与现有技术相比,本发明的有益效果是:
1、金属线路由电镀形成,金属线路具有上部结构和下部结构,上部结构形成蘑菇形状,可以在保证降低半导体封装结构的厚度的同时,增加金属线路与塑封料之间的结合性。
2、电镀贴膜仅需一次,不需要常规的电镀研磨平整的工艺步骤,简化工艺以及降低生产成本,且金属线路可以灵活设计,不限制线路密度,可适合多种类型的封装结构。
附图说明
图1为本发明实施例1的结构示意图。
图2为本发明实施例2的结构示意图。
图3为本发明实施例3的结构示意图。
图4为本发明实施例4的结构示意图。
图5为本发明实施例1的工艺流程示意图。
其中:
载板1、光阻膜2、开口3、下部结构4、上部结构5、芯片6、焊线7、基岛8、金属线路9。
具体实施方式
实施例1:
参见图1,本发明涉及的一种封装结构及其工艺方法,封装结构包括金属线路9、芯片6、焊线7;芯片6周围设置有金属线路9,所述金属线路9包括上部结构5和下部结构4,所述下部结构4呈柱状,所述上部结构5呈蘑菇形状。
所述金属线路的上部结构与下部结构材质相同,材质可以是镍、金、铜、银中的一种。
所述金属线路的上部结构与下部结构材质不同,两者材质的组合可以是镍与金、镍与铜。
参见图5,本发明涉及的一种封装结构及其工艺方法,其工艺方法包括以下步骤:
准备载板1,可以是两面带铜层的金属板,也可以是玻璃纤维板或者有机材料板;
将载板的板表面贴覆光阻膜2;
然后曝光显影,将需要电镀的区域暴露开口3;
接着在光阻膜2暴露开口3部分电镀金属线路9的下部结构4,在光阻膜2开口3中的下部结构4是规则的柱状结构;
然后在下部结构4的上方电镀上部结构5,当电镀的高度超过光阻膜的厚度时,上部结构5形成蘑菇形状,可以借由控制电镀时间以及控制不同材质的电镀液的导电度或者电流密度来调整电镀的速度,以便控制上部结构5形成蘑菇头的成长高度和宽度;
接着去除载板1表面的光阻膜2,在载板1正面贴装芯片6,然后通过焊线7电性连接金属线路9和芯片6;
然后包封整个结构,包封后用蚀刻或剥离的方法去除载板1,最后打印、切割。
实施例2:
参见图2,本发明涉及的一种封装结构及其工艺方法,芯片6内凹进封装结构,且封装结构底部露出芯片6背面,其余结构和工艺方法与实施例1相同。
实施例3:
参见图3,本发明涉及的一种封装结构及其工艺方法,在芯片6下方设置基岛8,其余结构和工艺方法与实施例1相同。
实施例4:
参见图4,本发明涉及的一种封装结构及其工艺方法,将芯片6倒装,其余结构和工艺方法与实施例1相同。
以上仅是本发明的具体应用范例,对本发明的保护范围不构成任何限制。凡采用等同变换或者等效替换而形成的技术方案,均落在本发明权利保护范围之内。

Claims (9)

1.一种封装结构,其特征在于:它包括金属线路、芯片、焊线;芯片周围设置有金属线路,所述金属线路包括上部结构和下部结构,所述下部结构呈柱状,所述上部结构呈蘑菇形状。
2.根据权利要求1所述的一种封装结构,其特征在于:所述金属线路的上部结构与下部结构材质相同,材质可以是镍、金、铜、银中的一种。
3.根据权利要求1所述的一种封装结构,其特征在于:所述金属线路的上部结构与下部结构材质不同,两者材质的组合可以是镍与金、镍与铜。
4.根据权利要求1所述的一种封装结构,其特征在于:所述芯片内凹进封装结构,且封装结构底部露出芯片背面。
5.根据权利要求1所述的一种封装结构及其工艺方法,其特征在于:所述芯片下方设置基岛。
6.一种权利要求1所述的封装结构的工艺方法,其特征在于包括以下步骤:
准备载板;
将载板的表面贴覆光阻膜;
然后曝光显影,将需要电镀的区域暴露开口;
接着在光阻膜暴露开口部分电镀金属线路的下部结构,在光阻膜开口中的下部结构是规则形状;
然后在下部结构的上方电镀上部结构,当电镀的高度超过光阻膜的厚度时,上部结构形成蘑菇形状;
接着去除载板表面的光阻膜,在载板的正面贴装芯片,然后通过焊线电性连接金属线路和芯片;
然后包封整个结构,包封后去除载板,最后打印、切割。
7.根据权利要求6所述的一种封装结构的工艺方法,其特征在于:所述载板,可以是两面带铜层的金属板,也可以是玻璃纤维板或者有机材料板。
8.根据权利要求6所述的一种封装结构的工艺方法,其特征在于:包封后用蚀刻或剥离的方法去除载板。
9.根据权利要求6所述的一种封装结构的工艺方法,其特征在于:将芯片倒装。
CN201711456338.8A 2017-12-28 2017-12-28 一种封装结构及其工艺方法 Pending CN108183091A (zh)

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CN111863639A (zh) * 2020-07-09 2020-10-30 上海芯琰实业有限公司 一种芯片的封装方法
CN111863638A (zh) * 2020-07-09 2020-10-30 上海芯琰实业有限公司 一种半导体芯片上表面感应区外露的封装方法
CN111863637A (zh) * 2020-07-09 2020-10-30 上海芯琰实业有限公司 一种半导体芯片的封装方法

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CN201838582U (zh) * 2010-09-30 2011-05-18 江苏长电科技股份有限公司 集成电路或分立器件金属脚上大下小引线框结构
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CN203300631U (zh) * 2012-05-10 2013-11-20 瑞萨电子株式会社 半导体器件
CN105097727A (zh) * 2015-06-23 2015-11-25 苏州日月新半导体有限公司 半导体封装结构及其封装方法
CN207834270U (zh) * 2017-12-28 2018-09-07 江苏长电科技股份有限公司 一种封装结构

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CN111863638A (zh) * 2020-07-09 2020-10-30 上海芯琰实业有限公司 一种半导体芯片上表面感应区外露的封装方法
CN111863637A (zh) * 2020-07-09 2020-10-30 上海芯琰实业有限公司 一种半导体芯片的封装方法

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