CN107994073A - Lift the low on-state voltage drop IGBT of latch-up immunity - Google Patents
Lift the low on-state voltage drop IGBT of latch-up immunity Download PDFInfo
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- 230000036039 immunity Effects 0.000 title claims abstract description 19
- 230000001413 cellular effect Effects 0.000 claims abstract description 70
- 239000004065 semiconductor Substances 0.000 claims description 20
- 239000002184 metal Substances 0.000 claims description 18
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 238000007667 floating Methods 0.000 claims description 15
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 11
- 238000009413 insulation Methods 0.000 claims description 6
- 238000010276 construction Methods 0.000 claims description 3
- 229920005591 polysilicon Polymers 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 1
- 239000010931 gold Substances 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 230000001172 regenerating effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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Abstract
The present invention relates to a kind of IGBT device, especially a kind of low pass state IGBT for lifting latch-up immunity, belongs to the technical field of IGBT device.The carrier guide body of the first conduction type is additionally provided with the first conduction type drift region, the carrier guide body includes first conduction type the first carrier guide layer immediately below cellular groove and first conduction type the second carrier guide layer below the second conduction type base region；First conduction type the second carrier guide layer is symmetric below the second conduction type base region, the top of first conduction type the second carrier guide layer is contacted with the outer wall of the second conduction type base region and adjacent cellular groove, and the lower end of first conduction type the second carrier guide layer is contacted with first conduction type the first carrier guide layer.The present invention is compact-sized, can improve the latch-up immunity of IGBT in the case where not influencing IGBT normal work characteristics, realize low on-state voltage drop, securely and reliably.
Description
Technical field
The present invention relates to a kind of IGBT device, especially a kind of low pass state IGBT for lifting latch-up immunity, belongs to IGBT
The technical field of device.
Background technology
IGBT is a kind of device representative in power semiconductor, with driving is easy, control is simple, switchs
The advantages that frequency is high, electric conduction forces down, on state current is big, loss is small, is the key core component automatically controlled with power conversion,
And breech lock problem is to influence the one of the major reasons of IGBT reliabilities.
As depicted in figs. 1 and 2, it is basic IGBT structure and its equivalent circuit, it can be seen from Fig. 1 that with N-type IGBT structure
Contain the crystalline substance of four layer of three knot for the N-P-N-P being made of N+ launch sites 3, p-type base 7, N-type drift region 8 and P+ collector areas 9
Brake tube structure.Explain that the mechanism of breech lock occurs for IGBT by the equivalent circuit of Fig. 2：When IGBT is worked normally, parasitic thyristor
It will not open, this is because the shorted emitter structure that N+ launch sites 3 and p-type base 7 are formed under running current ensure that
The emitter junction of upper strata NPN pipes does not occur to turn on (In1>>IP1>>IP2), IGBT electric currents are controlled be subject to grid voltage, are had full
And characteristic；When the current density of IGBT is excessive, excessive hole current flows through the 7 (electric current of p-type base of the lower section of N+ launch sites 3
Ip2), which produces pressure drop on p-type base path resistor Rp-body, and p-type base 7 and N+ can be made if pressure drop is sufficiently large
The PN junction positively biased that launch site 3 is formed, the NPN pipes on upper strata turn on into amplification region work, and drive the PNP pipe of lower floor, and PNP pipe is opened
Positive feedback is formed to upper strata NPN pipes in turn again after opening, Regenerative feedback effect enables IGBT grids to lose the control to electric current
Power, electric current increase rapidly, after electric current increases to a certain extent, may burn IGBT device overheat, therefore, latch phenomenon limit
The maximum trouble free service electric current of IGBT is made.
IGBT occur breech lock critical condition be：α NPN+ α PNP >=1, wherein, α NPN and α PNP are upper strata NPN pipes respectively
With the latch-up opened base current gain, to suppress parasitic thyristor it can be seen from the condition of lower floor PNP pipe, just must
Palpus reduction upper strata NPN pipes open base current gain with lower floor's PNP pipe, since lower floor's PNP pipe of wide base is in the normal works of IGBT
As when need conduct on state current, the conduction voltage drop of IGBT can be increased by reducing its current gain, and upper strata NPN is usually not involved in
The conduction of IGBT conducting state electric currents, it is therefore desirable to reduce the current gain of upper strata NPN pipes.
At present, it is the doping concentration in increase p-type base using Prevention method, to reduce the p-type base 7 of the lower section of N+ areas 3
Path resistor, to prevent N+ launch sites 3/P types base 7 from binding up one's hair raw positively biased, but this method is likely to increase the threshold value electricity of IGBT
Press and reduce reversely pressure-resistant.
To sum up, existing conventional IGBT device has higher on-state voltage drop and low latch-up immunity, especially in height
Pressure further develops in application, being unfavorable for IGBT in high pressure, high reliability, low-power consumption.
The content of the invention
The purpose of the present invention is overcome the deficiencies in the prior art, there is provided a kind of low pass state for lifting latch-up immunity
Pressure drop IGBT, its is compact-sized, in the case where not influencing IGBT normal work characteristics, can improve the latch-up immunity of IGBT,
Realize low on-state voltage drop, securely and reliably.
According to technical solution provided by the invention, the low on-state voltage drop IGBT of the lifting latch-up immunity, including partly lead
Structure base board and include the first conduction type drift region positioned at the cellular region at the semiconductor substrate center, the semiconductor substrate
And the second conduction type base region positioned at the first conduction type drift region internal upper part；
The cellular region includes some cellular grooves, and the cellular groove is located in the second conduction type base region, and cellular
The depth of groove is stretched into the first conduction type drift region below the second conduction type base region；Between adjacent cellular groove
First conduction type source region is set in two conduction type base regions, and the first conduction type source region connects with the side wall of corresponding cellular groove
Touch, trench gate structure is set in cellular groove；Emitter structure is set on the first conduction type drift region；
The carrier guide body of the first conduction type, the carrier are additionally provided with the first conduction type drift region
Guide body is including first conduction type the first carrier guide layer immediately below cellular groove and positioned at the second conductive-type
First conduction type the second carrier guide layer below type base；
First conduction type the second carrier guide layer is symmetric below the second conduction type base region, and first is conductive
The top of type the second carrier guide layer is contacted with the outer wall of the second conduction type base region and adjacent cellular groove, and first leads
The lower end of electric the second carrier of type guide layer is contacted with first conduction type the first carrier guide layer.
IGBT device horizontal direction and from close to grid center be directed toward gate edge direction on, the first conduction type
The impurity doping concentration of first carrier guide layer gradually reduces.
First the second carrier of conduction type guide layer is in inverted trapezoidal, and first conduction type the second carrier guide layer is equal
Even doping or non-uniform doping；
When first the second carrier of conduction type guide layer is non-uniform doping, in the transverse direction of IGBT device, first leads
Electric the second carrier of type guide layer includes the subregion of n different levels of doping, on the direction away from trench gate, subregion
Doping concentration gradually reduce.
The second conduction type floating area is also set up immediately below the cellular groove, the second conduction type floating area is located at
The top of first conduction type the first carrier guide layer, the outer wall of the second conduction type floating area and cellular groove slot bottom and
First the second carrier of conduction type guide layer contacts.
Also set up the second conduction type emitter in the second conduction type base region between adjacent cellular groove, described second
Conduction type emitter includes second the first launch site of conduction type and under first launch site of the second conduction type
Second the second launch site of conduction type of side；
Emitter structure includes emitter metal, the emitter metal and the first conduction type source region, the second conductive-type
First conduction type source contact of the first launch site of type Ohmic contact, second the first launch site of conduction type and both sides, second
The width of the second launch site of conduction type is more than the width of second the first launch site of conduction type.
The trench gate structure includes insulation gate oxide and the filling being covered on cellular trench wall and bottom wall
Grid polycrystalline silicon in the cellular groove, the grid polycrystalline silicon by the side wall of insulate gate oxide and cellular groove,
Bottom wall is dielectrically separated from；Grid polycrystalline silicon is dielectrically separated from by insulating medium layer and emitter structure.
Further include the collector structure for being arranged at semiconductor-based back, the collector structure for transparent anode structure or
Short-circuit anode construction.
The semiconductor substrate further includes the first conduction type field cut-off immediately below the first conduction type drift region
Layer, sets the second conduction type collecting zone, in second conductive-type in the underface of the first conduction type field cutoff layer
Collector electrode metal, the collector electrode metal and the second conduction type collecting zone Ohmic contact are set on type collecting zone, and first is conductive
Type field cutoff layer is between the first conduction type drift layer and the second conduction type collecting zone, and the first conduction type field is cut
Only layer abuts the first conduction type drift layer, the second conduction type collecting zone.
It is conductive for N-type power IGBT device, first in both described " first conduction type " and " the second conduction type "
Type refers to N-type, and the second conduction type is p-type；For p-type power IGBT device, the first conduction type and the second conduction type institute
The type of finger and N-type semiconductor device contrast.
Advantages of the present invention：Second conduction type base region sets the second conduction type emitter, the transmitting of the second conduction type
Second the first launch site of conduction type of body and emitter metal Ohmic contact, low-resistance is provided by the second conduction type emitter
Path, since the second conduction type emitter is distributed in the second conduction type base region in inverted T-shaped, efficiently avoid threshold value electricity
Pressure reduces with breakdown voltage and improves latch-up immunity.In the lower section of cellular groove, first the first carrier of conduction type is set
Guide layer, is guided grid low-side current to area of grid both ends using built-in field, while is existed in the second conduction type base region
First conduction type the second carrier guide layer of the inverted trapezoidal distribution that lower section introduces, the guiding of first the first carrier of conduction type
Layer, first conduction type the second carrier guide layer with the first conduction type drift region due to having certain concentration difference, it is certainly
Building electric field in the horizontal can guide carrier so that the current density below the first conduction type source region reduces, more
By electric current, from area of grid to the second conduction type emitter, lower section guides in big degree, and first the second carrier of conduction type draws
Conducting shell also helps holding high voltage in the discontinuous distribution of the second conduction type base region central lower, has avoided carrier and has drawn
Breakdown voltage caused by the high concentration of conducting shell declines.In addition, first the first carrier of conduction type guide layer, the first conduction type
Second carrier guide layer also has the function that carrier accumulation layer, and having largely reduces conduction voltage drop, securely and reliably.
Brief description of the drawings
Fig. 1 is the structure sectional view of existing IGBT device.
Fig. 2 is the equivalent circuit diagram of existing IGBT device.
Fig. 3 is the structure diagram of the present invention.
Fig. 4 is the schematic diagram that the second carrier of N-type guide layer of the present invention uses non-uniform doping.
Fig. 5 is the schematic diagram that the present invention sets p-type floating area.
Description of reference numerals：1- emitter metals, 2- insulating medium layers, 3-N+ source regions, 4-P+ contact zones, 5- gate polycrystallines
Silicon, 6- insulation gate oxide, 7-P types base, 8- types drift region, 9-P+ collecting zones, 10- collector electrode metals, the cut-off of 11-N types field
Layer, the first launch site of 12-P types, the second launch site of 13-P types, the second carrier of 14-N types guide layer, the first carrier of 15-N types
Guide layer and 16-P type floatings area.
Embodiment
With reference to specific drawings and examples, the invention will be further described.
As shown in Figure 2：In order in the case where not influencing IGBT normal work characteristics, improve the anti-breech lock energy of IGBT
Power, realizes low on-state voltage drop, and by taking N-type IGBT device as an example, the present invention includes semiconductor substrate and positioned at described semiconductor-based
The cellular region at plate center, the semiconductor substrate include N-type drift region 8 and the p-type positioned at 8 internal upper part of N-type drift region
Base 7；
The cellular region includes some cellular grooves, and the cellular groove is located in p-type base 7, and the depth of cellular groove
Degree is stretched into the N-type drift region 8 of the lower section of p-type base 7；N+ source regions 3, N+ sources are set in the p-type base 7 between adjacent cellular groove
Area 3 is contacted with the side wall of corresponding cellular groove, and trench gate structure is set in cellular groove；Transmitting is set in N-type drift region 8
Pole structure；
The carrier guide body of N-type is additionally provided with the N-type drift region 8, the carrier guide body is included positioned at member
The first carrier of N-type guide layer 15 immediately below born of the same parents' groove and N-type the second carrier guide layer positioned at the lower section of p-type base 7
14；
The second carrier of N-type guide layer 14 is symmetric below p-type base 7, the second carrier of N-type guide layer 14
Top is contacted with the outer wall of p-type base 7 and adjacent cellular groove, lower end and the N-type first of the second carrier of N-type guide layer 14
Carrier guide layer 15 contacts.
Specifically, semiconductor substrate can use common semi-conducting material, and such as silicon, can specifically carry out as needed
Selection, the upper surface of N-type drift region 8 are the upper surface of whole semiconductor substrate, and p-type base 7 is located in N-type drift region 8, generally
Ground, p-type base 7 extend vertically downward from the upper surface of N-type drift region 8, and p-type base 7 is formed two layers up and down with N-type drift region 8
Distribution.
Semiconductor substrate is performed etching using the art common technological means, to obtain cellular groove, cellular
The upper surface of the slave N-type drift region 8 of groove extends vertically downward, and the slot bottom of cellular groove is located at the lower section of p-type base 7, so that,
Between p-type base 7 in cellular region is spaced in adjacent cellular groove, p-type base 7 is contacted with the external wall of upper portion of cellular groove.
On the section of the IGBT device, N+ source regions 3 are symmetrically distributed in p-type base 7, the N+ source regions in p-type base 7
3 are not in contact with each other, and N+ source regions 3 are contacted with close to the outer wall of cellular groove, and trench gate structure is set in cellular groove, passes through trench gate
The grid of IGBT device can be formed.The emitter of IGBT device can be formed by emitter structure.
On the section of the IGBT device, carrier guide body is N conduction types, the first carrier of N-type guide layer 15
Positioned at the underface of cellular groove, the first carrier of N-type guide layer 15 is in strip in the N-type drift region 8, the first current-carrying of N-type
The length of sub- guide layer 15 is more than the width of cellular groove, i.e. the end of the first carrier of N-type guide layer 15 is located at p-type base 7
Lower section, there are the overlapping of space between the first carrier of N-type guide layer 15 and p-type base 7.The second carrier of N-type guide layer 14
The lower section of p-type base 7 is symmetrically distributed in, is not in contact with each other between two the second carrier of N-type guide layers 14 of the lower section of p-type base 7.
The upper end of the second carrier of N-type guide layer 14 is contacted with 7 lower surface of p-type base, the side of the second carrier of N-type guide layer 14 with
The outer wall contact of neighbouring cellular groove, the lower surface of p-type base 7 specifically refer to p-type base 7 and be located in N-type drift region 8 and neighbour
One side surface of nearly cellular groove slot bottom.
Further, IGBT device horizontal direction and from close to grid center be directed toward gate edge direction on, N-type
The impurity doping concentration of first carrier guide layer 15 gradually reduces.In the embodiment of the present invention, grid center is cellular groove
Center, gate edge is the sidewall direction of cellular groove.
Further, the second carrier of N-type guide layer 14 is in inverted trapezoidal, and the second carrier of N-type guide layer 14 is uniformly to mix
Miscellaneous or non-uniform doping；
When the second carrier of N-type guide layer 14 is non-uniform doping, in the transverse direction of IGBT device, the second carrier of N-type
Guide layer 15 includes the subregion of n different levels of doping, and on the direction away from trench gate, the doping concentration of subregion is gradual
Reduce.
In Fig. 2, the second carrier of N-type guide layer 14 is the situation using Uniform Doped, and in Fig. 3, the second carrier of N-type draws
Conducting shell 14 uses the situation of non-uniform doping.The second carrier of N-type guide layer 14 in inverted trapezoidal, in particular to, the second current-carrying of N-type
The width that sub- guide layer 14 contacts one end with p-type base 7 draws more than the second carrier of N-type guide layer 14 with the first carrier of N-type
The width of conducting shell 15.When the subregion of the n different levels of doping of use of the second carrier of N-type guide layer 15, n >=3, in IGBT
On the longitudinal direction of device, the doping concentration per sub-regions is identical；The doping concentration of different subregions is different, the second carrier of N-type
The side that guide layer 15 is contacted with cellular groove outer wall be close to trench gate direction, the second carrier of N-type guide layer 15 it is another
Side is the direction away from trench gate.
As shown in figure 5, also setting up p-type floating area 16 immediately below the cellular groove, p-type floating area 16 is located at N-type
The top of first carrier guide layer 15, p-type floating area 16 and the outer wall and the second carrier of N-type of cellular groove slot bottom guide
Layer 14 contacts.
In the embodiment of the present invention, p-type floating area 16 can inject to be formed by low energy, and cellular ditch is wrapped up in p-type floating area 16
The outer wall of groove slot bottom, and p-type floating area 16 is contacted with the second carrier of N-type guide layer 14, can be improved by p-type floating area 16
It is pressure-resistant, the electric field of cellular channel bottom is reduced, reduces feedback capacity.
In addition, also set up p-type emitter in p-type base 7, the p-type emitter include the first launch site of p-type 12 and
Positioned at the second launch site of p-type 13 of the lower section of the first launch site of p-type 2；
Emitter structure includes emitter metal 1, the emitter metal 1 and N+ source regions 3,12 Europe of the first launch site of p-type
Nurse contacts, and the first launch site of p-type 12 is contacted with the N+ source regions 3 of both sides, and the width of the second launch site of p-type 13 is sent out more than p-type first
Penetrate the width in area 12.
In the embodiment of the present invention, p-type emitter is located in p-type base 7, and the first launch site of p-type 12 is in vertical distribution, p-type
Second launch site 13 is laterally distributed, and the first launch site of p-type 12 extends vertically downward from the upper surface of N-type drift region 8, p-type
The width of two launch sites 13 is more than the width of the first launch site of p-type 12, between the first launch site of p-type 12 and the second launch site of p-type 13
Inverted T-type structure is formed, therefore, there are space to overlap for the N+ source regions 3 of the second launch site of p-type 13 and 12 both sides of the first launch site of p-type.
The first launch site of p-type 12, the second launch site of p-type 13 doping concentration be more than p-type base 7 doping concentration, emitter metal 1 with
N+ source regions 3,12 Ohmic contact of the first launch site of p-type, so as to form the emitter of IGBT device.
When it is implemented, the trench gate structure includes the insulation gate oxidation being covered on cellular trench wall and bottom wall
Layer 6 and the grid polycrystalline silicon 5 being filled in the cellular groove, the grid polycrystalline silicon 5 pass through gate oxide 6 and the member of insulating
Side wall, the bottom wall of born of the same parents' groove are dielectrically separated from；Grid polycrystalline silicon 5 is dielectrically separated from by insulating medium layer 2 with emitter structure.
In the embodiment of the present invention, insulation gate oxide 6 can use thermal oxide growth or other modes to be arranged on cellular ditch
In groove, insulation gate oxide 6 covers the side wall and bottom wall of cellular groove, and grid polycrystalline silicon 5 is filled in cellular groove, grid
Polysilicon 5 is dielectrically separated from by insulating medium layer 2 and emitter metal 1, and insulating medium layer 2 is generally covered in the groove of cellular groove
Mouthful, insulating medium layer 2 is supported on the upper surface of N-type drift region 8.
In addition, in order to form complete IGBT device, the collector structure for being arranged at semiconductor-based back is further included,
The collector structure is transparent anode structure or short-circuit anode construction.
Specifically, the semiconductor substrate further includes the N-type field cutoff layer 11 immediately below N-type drift region 8, described
The underface of N-type field cutoff layer 11 sets P+ collecting zones 9, and collector electrode metal 10, the current collection are set on the P+ collecting zones 9
Pole metal 10 and 9 Ohmic contact of P+ collecting zones, N-type field cutoff layer 11 is between N-type drift layer 8 and P+ collecting zones 9, and N-type
Field cutoff layer 11 abuts N-type drift layer 8, P+ collecting zones 9.In the embodiment of the present invention, pass through collector electrode metal 10, P+ collecting zones 9
The collector of IGBT device can be formed.
P-type base 7 of the present invention sets p-type emitter, the first launch site of p-type 12 and 1 Europe of emitter metal of p-type emitter
Nurse contacts, and low resistance path is provided by p-type emitter, since p-type emitter is distributed in p-shaped base 7 in inverted T-shaped, effectively
Avoiding threshold voltage and breakdown voltage reduces and improves latch-up immunity.N-type first is set to carry in the lower section of cellular groove
Sub- guide layer 15 is flowed, is guided grid low-side current to area of grid both ends using built-in field, while in p-shaped base 7 under
The second carrier of N-type guide layer 14 of the inverted trapezoidal distribution just introduced, the first carrier of N-type guide layer 15, the second carrier of N-type
Due to having certain concentration difference with N-type drift region 8, its built-in field in the horizontal can draw carrier guide layer 14
Lead so that the current density of the lower section of N+ source regions 3 reduces, and by electric current, from area of grid to p-type emitter, lower section is drawn to a greater extent
Lead.In addition, the first carrier of N-type guide layer 15, the second carrier of N-type guide layer 14 also have the function that carrier accumulation layer,
Having largely reduces conduction voltage drop, securely and reliably.
Claims (8)
1. a kind of low on-state voltage drop IGBT for lifting latch-up immunity, including semiconductor substrate and positioned at the semiconductor substrate
The cellular region at center, the semiconductor substrate include the first conduction type drift region and positioned at the described first conductive 6 types drifts
Move the second conduction type base region of area's internal upper part；
The cellular region includes some cellular grooves, and the cellular groove is located in the second conduction type base region, and cellular groove
Depth stretch into the first conduction type drift region below the second conduction type base region；Second between adjacent cellular groove leads
First conduction type source region is set in electric type base, the first conduction type source region is contacted with the side wall of corresponding cellular groove,
Trench gate structure is set in cellular groove；Emitter structure is set on the first conduction type drift region；It is characterized in that：
The carrier guide body of the first conduction type, the carrier guiding are additionally provided with the first conduction type drift region
Body is including first conduction type the first carrier guide layer immediately below cellular groove and positioned at the second conduction type base
First conduction type the second carrier guide layer below area；
First conduction type the second carrier guide layer is symmetric below the second conduction type base region, the first conduction type
The top of second carrier guide layer is contacted with the outer wall of the second conduction type base region and adjacent cellular groove, the first conductive-type
The lower end of type the second carrier guide layer is contacted with first conduction type the first carrier guide layer.
2. the low on-state voltage drop IGBT of lifting latch-up immunity according to claim 1, it is characterized in that：In IGBT device
Horizontal direction and from close to grid center be directed toward gate edge direction on, first conduction type the first carrier guide layer it is miscellaneous
Matter doping concentration gradually reduces.
3. the low on-state voltage drop IGBT of lifting latch-up immunity according to claim 1, it is characterized in that：First conduction type
Second carrier guide layer is in inverted trapezoidal, and first the second carrier of conduction type guide layer is Uniform Doped or non-uniform doping；
When first the second carrier of conduction type guide layer is non-uniform doping, in the transverse direction of IGBT device, the first conductive-type
The second carrier of type guide layer includes the subregion of n different levels of doping, and on the direction away from trench gate, subregion is mixed
Miscellaneous concentration gradually reduces.
4. the low on-state voltage drop IGBT of the lifting latch-up immunity according to claim 1 or 2 or 3, it is characterized in that：Described
The second conduction type floating area is also set up immediately below cellular groove, the second conduction type floating area is located at the first conduction type
The top of one carrier guide layer, the outer wall and the first conduction type of the second conduction type floating area and cellular groove slot bottom the
Two carrier guide layers contact.
5. the low on-state voltage drop IGBT of lifting latch-up immunity according to claim 1, it is characterized in that：In adjacent cellular ditch
Also set up the second conduction type emitter in the second conduction type base region between groove, the second conduction type emitter includes the
Two the first launch sites of conduction type and the second conduction type second below first launch site of the second conduction type
Launch site；
Emitter structure includes emitter metal, the emitter metal and the first conduction type source region, the second conduction type the
First conduction type source contact of one launch site Ohmic contact, second the first launch site of conduction type and both sides, second is conductive
The width of the second launch site of type is more than the width of second the first launch site of conduction type.
6. the low on-state voltage drop IGBT of lifting latch-up immunity according to claim 1, it is characterized in that：The trench gate knot
Structure includes the insulation gate oxide being covered on cellular trench wall and bottom wall and the grid being filled in the cellular groove
Pole polysilicon, the grid polycrystalline silicon are dielectrically separated from by side wall, the bottom wall of insulate gate oxide and cellular groove；Gate polycrystalline
Silicon is dielectrically separated from by insulating medium layer and emitter structure.
7. the low on-state voltage drop IGBT of lifting latch-up immunity according to claim 1, it is characterized in that：Further include and be arranged at
The collector structure of semiconductor-based back, the collector structure are transparent anode structure or short-circuit anode construction.
8. the low on-state voltage drop IGBT of lifting latch-up immunity according to claim 1, it is characterized in that：It is described semiconductor-based
Plate further includes the first conduction type field cutoff layer immediately below the first conduction type drift region, in first conduction type
The underface of field cutoff layer sets the second conduction type collecting zone, and collector gold is set on the second conduction type collecting zone
Belong to, the collector electrode metal and the second conduction type collecting zone Ohmic contact, the first conduction type field cutoff layer are led positioned at first
Between electric type drift layer and the second conduction type collecting zone, and the first conduction type field cutoff layer abuts the drift of the first conduction type
Move layer, the second conduction type collecting zone.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108767003A (en) * | 2018-08-29 | 2018-11-06 | 江苏中科君芯科技有限公司 | The IGBT device of high latch-up immunity |
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| CN105633139A (en) * | 2016-03-23 | 2016-06-01 | 无锡新洁能股份有限公司 | IGBT device with carrier storage structure and manufacturing method of IGBT device |
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| US20170271487A1 (en) * | 2016-03-18 | 2017-09-21 | Infineon Technologies Americas Corp. | Bipolar Semiconductor Device with Sub-Cathode Enhancement Regions |
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