CN107993430A - A kind of method for improving concentrator Ethernet PHY chip stability - Google Patents

A kind of method for improving concentrator Ethernet PHY chip stability Download PDF

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Publication number
CN107993430A
CN107993430A CN201711272086.3A CN201711272086A CN107993430A CN 107993430 A CN107993430 A CN 107993430A CN 201711272086 A CN201711272086 A CN 201711272086A CN 107993430 A CN107993430 A CN 107993430A
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phy chip
register
connection status
value
current ink
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CN107993430B (en
Inventor
衡泽超
宁晨光
宋忠强
赵长收
贾凯
刘亮
王强
王福斌
王春城
薛坤
郑宝毅
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Integrated Electronic Systems Lab Co Ltd
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    • G—PHYSICS
    • G08—SIGNALLING
    • G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
    • G08C25/00—Arrangements for preventing or correcting errors; Monitoring arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/08—Configuration management of networks or network elements
    • H04L41/0803—Configuration setting
    • H04L41/0813—Configuration setting characterised by the conditions triggering a change of settings
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
    • H04L43/0805—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability
    • H04L43/0811—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability by checking connectivity

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Environmental & Geological Engineering (AREA)
  • Computer And Data Communications (AREA)
  • Communication Control (AREA)
  • Small-Scale Networks (AREA)

Abstract

The present invention relates to it is a kind of improve concentrator Ethernet PHY chip stability method, 1, configure concentrator main control chip mac controller parameter；The 2nd, cycle inspection function is set, with the value of the connection status register of frequency f inquiry PHY chips, the form judged using slippage judges the connection status of current ink；The 3rd, if the connection status of current ink goes to step 2 to disconnect；If the connection status of current ink is access, the parameter value of each work register of PHY chip is checked；If the 4, the connection status of current ink is access and PHY chip reseting mark is 1, Ethernet operating mode is renegotiated；Otherwise, 2 are gone to step.The present invention improves the accuracy of judgement, ensure that main control chip to the controlling in real time of PHY chip working condition, improve response speed of the main control chip when PHY chip is abnormal, ensure that the reliability of communication, improve main control chip work efficiency.

Description

A kind of method for improving concentrator Ethernet PHY chip stability
Technical field
The invention belongs to power information acquisition system technical field, more particularly to concentrator is under complicated electromagnetic environment A kind of method for improving concentrator Ethernet PHY chip stability.
Background technology
Continuous with electric power information transformation promotes, and usage amount of the concentrator in centralized meter-reading system is constantly increasing It is long.Ethernet is widely used as a kind of efficient communication mode in concentrator.Since concentrator is in real work In residing environment it is complicated and changeable, majority is all in high-intensity magnetic field, the environment of high electrostatic.Pass of the PHY chip as ethernet communication Key core component, how at the scene steady operation under such complicated electromagnetic environment, directly determines the communication of ethernet communication Quality.
At present, the entrance of interference signal is typically avoided by the measure for the protective device for increasing hardware, to improve The stability of PHY chip.But greater risk existing for such a measure is, once protective device fails, PHY chip will be complete In strongly disturbing environment, at this time if the good method and measure of neither one in software, it is possible to cause PHY Chip operation is disorderly, influences the normal communication of Ethernet.
The content of the invention
For above-mentioned technical problem, the present invention provides a kind of method for improving concentrator Ethernet PHY chip stability, Comprise the following steps：
Step 1, when concentrator is run into the start of line, first configure concentrator main control chip mac controller parameter；
Step 2, set cycle inspection function, and the value of the connection status register of PHY chip is inquired about with fixed frequency f, The form judged using slippage judges the connection status of current ink；
If step 3, the connection status of current ink go to step 2 to disconnect；If the connection status of current ink is Access, in order to avoid PHY chip operation irregularity occurs under external electromagnetic environment interference, to each work register of PHY chip Parameter value checked；
If step 4, the connection status of current ink are access and PHY chip reseting mark is 1, PHY chip is represented Just carried out resetting operation recently, it is necessary to which to Ethernet operating mode, (including traffic rate be 10M or 100M, logical again Letter pattern is half-duplex or full duplex) renegotiated；Otherwise, 2 are gone to step.
Preferably, the parameter of the mac controller of the configuration concentrator main control chip described in step 1 comprises the following steps：
1.1st, all pins to communicate to main control chip with PHY chip carry out functional configuration, that is, configure main control chip GPIO pins；
1.2nd, the operating mode between the mac controller interface and PHY chip interface of main control chip is configured, main bag Include negotiation mode, media interface form, communication test mode；
1.3rd, each work register of PHY chip is configured, including register number, register type and register Configuration parameter.It is different according to the model of the PHY chip of selection, the register number of required configuration, register type and post The configuration parameter of storage can slightly have difference.
Preferably, the form judged using slippage described in step 2 judges that the connection status of current ink includes following step Suddenly：
2.1st, judge whether the value of the register is effective, if invalid, directly exits, wait next polling period weight It is new to perform step 2, turn if effectively in next step；Effective condition be the value of the register in a zone of reasonableness, according to The difference of PHY chip producer model, this rational value range, which has, different defines mode；
2.2nd, the register value obtained by step 2.1 judges that the connection status of current ink is access or disconnection；
2.3rd, the form judged using slippage rejects interference signal.Due to the electromagnetic field environment of external complex, have It may influence whether the normal work of PHY chip, therefore the connection status judged in step 2.2 is likely to be one and does Disturb signal, if directly use can produce connection erroneous judgement risk, in order to avoid it is this erroneous judgement application layer code is caused it is unfavorable Influence, devise the method that a slippage judges herein, in the case where suitably reducing detection efficiency, increase the standard that link judges True property and stability.
Preferably, the form judged using slippage described in step 2.3 is carried out rejecting to interference signal and comprises the following steps：
2.3.1 the slippage array Arry [N] containing N number of element, is created, 0 is defined and represents link disconnection, 1, which represents link, connects Enter, the value range of [N] is to be less than 30 more than 0, and the accuracy of the bigger judgement of value of [N] is higher but efficiency can be lower；
If 2.3.2, the link connection state judged in step 2.2 is access, slippage array Arry is slided into 1 [N], otherwise slides into slippage array Arry [N] 0；
2.3.3, judge the element number in slippage array Arry [N] whether reached [N] it is a, if it is not, then directly exit, Next polling period is waited to re-execute step 2, if then going to step 2.3.4；
2.3.4 the element value whether all 0 or all 1 in current slippage array Arry [N], is judged, if then Judge current ink enter stable state and according to data value be 0 either 1 determine current ink state for access or disconnection；If Otherwise judge that current ink is in transient process, the connection status of current ink judges that result is invalid, then goes to step 2.
Preferably, the value range of the frequency f of the fixation described in step 2 is：0Hz<f<=100Hz.
Preferably, the parameter value of each work register to PHY chip described in step 3, which carries out verification, includes following step Suddenly：
3.1st, the parameter value of each work register is read, and the parameter value of reading and write-in value originally are contrasted；
If the 3.2, the parameter value read and write-in value originally are inconsistent, it is abnormal to judge that PHY chip occurs, to PHY After chip carries out reset operation, each work register of PHY chip is configured again, including register number, register The configuration parameter of type and register, juxtaposition PHY chip reseting mark are 1, go to step 4；
If the parameter value read is consistent with write-in value originally, 4 are directly gone to step.
Preferably, Ethernet operating mode renegotiate comprising the following steps described in step 4：
4.1st, using the Ethernet operating mode auto-negotiation functionality of PHY chip, make PHY chip start automatically with distal end Ethernet interface consults the operating mode of both sides；
Whether the 4.2nd, auto-negotiation completes relevant register in continuous-query PHY chip in time T, judge to consult complete Into if negotiation, which does not complete, goes to step 4.3, if consulting to complete to go to step 4.4；
4.3rd, there is link in PHY chip carries out auto negotiation process in order to prevent to disconnect suddenly, cause invalid association Business waits, and the form judged again using slippage herein judges the connection status of current ink, if off-state, then directly Exit negotiation, go to step 2；
If access state, judge whether the current time for waiting negotiation to complete alreadys exceed the defined time, if having surpassed Maximum latency is crossed, then directly exits this and consults, goes to step 2；If not less than maximum latency, 4.2 continuation are gone to step Wait and consult to complete；
4.4th, after the completion of renegotiating, PHY chip negotiation result is obtained, including：Traffic rate, half-duplex/full-duplex mode, Negotiation result value is configured in the mac controller of main control chip, and restarts mac controller and completes to consult configuration.
Preferably, the value range of the time T described in step 4.2 is：T is more than or equal to 0 second, less than 120 seconds.
Beneficial effects of the present invention：
1st, the form judged by using slippage judges the connection status of current ink, avoids and is judged using acquisition single-point The risk of the erroneous judgement brought, improves the accuracy of judgement.
2nd, under link access state, PHY chip configuration register parameter value is checked by the cycle, avoids PHY chip Due to be subject to external disturbance, cause internal register data perturbation and occurring for situation that main control chip is not learnt, ensure that master Control chip to control the real-time of PHY chip working condition, while improve response of the main control chip in PHY chip operation irregularity Speed.
3rd, when PHY chip resets, by way of increasing Ethernet operating mode and renegotiating, it ensure that communication Reliability.
4th, during PHY chip is renegotiated, by increasing the judgement to link connection state, once judge to work as Before be connected as "off" state, then directly exit negotiations process, wait link to re-start negotiation again after accessing again, improve The work efficiency of main control chip.
Brief description of the drawings
Fig. 1 is the logical procedure diagram of the present invention.
Embodiment
Below in conjunction with the accompanying drawings, embodiments of the present invention are illustrated.
It is the logical procedure diagram of the present invention as shown in Figure 1, a kind of side for improving concentrator Ethernet PHY chip stability Method, comprises the following steps：
Step 1, when concentrator is run into the start of line, first configure concentrator main control chip mac controller parameter； Comprise the following steps that：
1.1st, all pins to communicate to main control chip with PHY chip carry out functional configuration；
1.2nd, the operating mode between the mac controller interface and PHY chip interface of main control chip is configured, main bag Include negotiation mode, media interface form, communication test mode；
1.3rd, each work register of PHY chip is configured, including register number, register type and register Configuration parameter.
Step 2, set cycle inspection function, and the value of the connection status register of PHY chip is inquired about with fixed frequency f, The form judged using slippage judges the connection status of current ink, and the value range of f is：0Hz<f<=100Hz；Specific steps It is as follows：
2.1st, judge whether the value of the register is effective, if invalid, directly exits, wait next polling period weight It is new to perform step 2, turn if effectively in next step；
2.2nd, the register value obtained by step 2.1 judges that the connection status of current ink is access or disconnection；
2.3rd, the form judged using slippage rejects interference signal, comprises the following steps that：
2.3.1 the slippage array Arry [N] containing N number of element, is created, 0 is defined and represents link disconnection, 1, which represents link, connects Enter, the value range of [N] is to be less than 30 more than 0；
If 2.3.2, the link connection state judged in step 2.2 is access, slippage array Arry is slided into 1 [N], otherwise slides into slippage array Arry [N] 0；
2.3.3, judge the element number in slippage array Arry [N] whether reached [N] it is a, if it is not, then directly exit, Next polling period is waited to re-execute step 2, if then going to step 2.3.4；
2.3.4 the element value whether all 0 or all 1 in current slippage array Arry [N], is judged, if then Judge current ink enter stable state and according to data value be 0 either 1 determine current ink state for access or disconnection；If Otherwise judge that current ink is in transient process, the connection status of current ink judges that result is invalid, then goes to step 2.
If step 3, the connection status of current ink go to step 2 to disconnect；If the connection status of current ink is Access, checks the parameter value of each work register of PHY chip；Comprise the following steps that：
3.1st, the parameter value of each work register is read, and the parameter value of reading and write-in value originally are contrasted；
The 3.2nd, if the parameter value read and write-in value originally are inconsistent, after carrying out reset operation to PHY chip, again Each work register of PHY chip is configured, includes the configuration parameter of register number, register type and register, Juxtaposition PHY chip reseting mark is 1, goes to step 4；
If the parameter value read is consistent with write-in value originally, 4 are directly gone to step.
If step 4, the connection status of current ink are access and PHY chip reseting mark is 1, again to ether Net operating mode is renegotiated；Otherwise, 2 are gone to step；Comprise the following steps that：
4.1st, using the Ethernet operating mode auto-negotiation functionality of PHY chip, make PHY chip start automatically with distal end Ethernet interface consults the operating mode of both sides；
Whether the 4.2nd, auto-negotiation completes relevant register in continuous-query PHY chip in time T, judge to consult complete Into if negotiation, which does not complete, goes to step 4.3, if consulting to complete to go to step 4.4；The value range of T is：T be more than or equal to 0 second, it is small In 120 seconds；
4.3rd, the form judged again using slippage judges the connection status of current ink, if off-state, then directly Connect and exit negotiation, go to step 2；
If access state, judge whether the current time for waiting negotiation to complete alreadys exceed the defined time, if having surpassed Maximum latency is crossed, then directly exits this and consults, goes to step 2；If not less than maximum latency, 4.2 continuation are gone to step Wait and consult to complete；
4.4th, after the completion of renegotiating, PHY chip negotiation result is obtained, including：Traffic rate, half-duplex/full-duplex mode, Negotiation result value is configured in the mac controller of main control chip, and restarts mac controller and completes to consult configuration.

Claims (8)

  1. A kind of 1. method for improving concentrator Ethernet PHY chip stability, it is characterised in that comprise the following steps：
    Step 1, configure concentrator main control chip mac controller parameter；
    Step 2, set cycle inspection function, with the value of the connection status register of fixed frequency f inquiry PHY chips, uses The form that slippage judges judges the connection status of current ink；
    If step 3, the connection status of current ink go to step 2 to disconnect；If the connection status of current ink is to connect Enter, the parameter value of each work register of PHY chip is checked；
    If step 4, the connection status of current ink are access and PHY chip reseting mark is 1, to Ethernet Working mould Formula is renegotiated；Otherwise, 2 are gone to step.
  2. A kind of 2. method for improving concentrator Ethernet PHY chip stability according to claim 1, it is characterised in that The parameter of the mac controller of configuration concentrator main control chip described in step 1 comprises the following steps：
    1.1st, all pins to communicate to main control chip with PHY chip carry out functional configuration；
    1.2nd, the operating mode between the mac controller interface and PHY chip interface of main control chip is configured, including consults mould Formula, media interface form, communication test mode；
    1.3rd, each work register of PHY chip is configured, including register number, register type and register are matched somebody with somebody Put parameter.
  3. A kind of 3. method for improving concentrator Ethernet PHY chip stability according to claim 1, it is characterised in that The form judged using slippage described in step 2 judges that the connection status of current ink comprises the following steps：
    2.1st, judge whether the value of the register is effective, if invalid, directly exits, wait next polling period to hold again Row step 2, turns in next step if effectively；
    2.2nd, the register value obtained by step 2.1 judges that the connection status of current ink is access or disconnection；
    2.3rd, the form judged using slippage rejects interference signal.
  4. A kind of 4. method for improving concentrator Ethernet PHY chip stability according to claim 3, it is characterised in that The form judged using slippage described in step 2.3 is carried out rejecting to interference signal and comprised the following steps：
    2.3.1 the slippage array Arry [N] containing N number of element, is created, 0 is defined and represents link disconnection, 1 represents link access, The value range of [N] is to be less than 30 more than 0；
    If 2.3.2, the link connection state judged in step 2.2 is access, slippage array Arry [N] is slided into 1, it is no Then slippage array Arry [N] is slided into 0；
    2.3.3, judge the element number in slippage array Arry [N] whether reached [N] it is a, if it is not, then directly exiting, waiting Next polling period re-executes step 2, if then going to step 2.3.4；
    2.3.4 the element value whether all 0 or all 1 in current slippage array Arry [N], is judged, if then judging Current ink enter stable state and according to data value be 0 either 1 determine current ink state for access or disconnect；If otherwise Judge that current ink is in transient process, the connection status of current ink judges that result is invalid, then goes to step 2.
  5. A kind of 5. method for improving concentrator Ethernet PHY chip stability according to claim 1, it is characterised in that The value range of the frequency f of fixation described in step 2 is：0Hz<f<=100Hz.
  6. 6. according to claim 1-5 any one of them it is a kind of improve concentrator Ethernet PHY chip stability method, its It is characterized in that, the parameter value of each work register to PHY chip described in step 3 carries out verification and comprises the following steps：
    3.1st, the parameter value of each work register is read, and the parameter value of reading and write-in value originally are contrasted；
    If the 3.2, the parameter value read and write-in value originally are inconsistent, it is abnormal to judge that PHY chip occurs, to PHY chip After carrying out reset operation, each work register of PHY chip is configured again, including register number, register type And the configuration parameter of register, juxtaposition PHY chip reseting mark are 1, go to step 4；
    If the parameter value read is consistent with write-in value originally, 4 are directly gone to step.
  7. 7. according to claim 1-5 any one of them it is a kind of improve concentrator Ethernet PHY chip stability method, its It is characterized in that, Ethernet operating mode renegotiate comprising the following steps described in step 4：
    4.1st, using the Ethernet operating mode auto-negotiation functionality of PHY chip, PHY chip is made to start the ether with distal end automatically Network interface consults the operating mode of both sides；
    4.2nd, auto-negotiation completes relevant register in continuous-query PHY chip in time T, judges consult whether to complete, if Consult not completing and go to step 4.3,4.4 are gone to step if consulting to complete；
    4.3rd, the form judged using slippage judges the connection status of current ink, if off-state, then directly exit negotiation, Go to step 2；
    If access state, judge whether the current time for waiting negotiation to complete alreadys exceed the defined time, if exceeding most The big stand-by period, then directly exit this and consult, go to step 2；If not less than maximum latency, go to step 4.2 and continue waiting for Consult to complete；
    4.4th, after the completion of renegotiating, PHY chip negotiation result is obtained, including：Traffic rate, half-duplex/full-duplex mode, association Business's end value is configured in the mac controller of main control chip, and is restarted mac controller and completed to consult configuration.
  8. A kind of 8. method for improving concentrator Ethernet PHY chip stability according to claim 7, it is characterised in that The value range of time T described in step 4.2 is：T is more than or equal to 0 second, less than 120 seconds.
CN201711272086.3A 2017-12-05 2017-12-05 Method for improving stability of Ethernet PHY chip of concentrator Active CN107993430B (en)

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CN111984568A (en) * 2020-08-27 2020-11-24 苏州浪潮智能科技有限公司 Method and system for PHY port polarity self-adaption of SAS controller
CN112787886A (en) * 2020-12-30 2021-05-11 长沙湘计海盾科技有限公司 Processing method, device driver, readable storage medium and computer for real-time system network device auto-negotiation
CN113504773A (en) * 2021-07-29 2021-10-15 安徽江淮汽车集团股份有限公司 Ethernet test method and Ethernet test system of vehicle-mounted controller
CN116009974A (en) * 2022-12-30 2023-04-25 龙芯中科(北京)信息技术有限公司 PHY chip driving method, device, apparatus, medium, and program

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CN111984568A (en) * 2020-08-27 2020-11-24 苏州浪潮智能科技有限公司 Method and system for PHY port polarity self-adaption of SAS controller
CN111984568B (en) * 2020-08-27 2023-01-10 苏州浪潮智能科技有限公司 Method and system for PHY port polarity self-adaption of SAS controller
CN112787886A (en) * 2020-12-30 2021-05-11 长沙湘计海盾科技有限公司 Processing method, device driver, readable storage medium and computer for real-time system network device auto-negotiation
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CN116009974A (en) * 2022-12-30 2023-04-25 龙芯中科(北京)信息技术有限公司 PHY chip driving method, device, apparatus, medium, and program

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