CN105353242A - Differential test signal monitoring module and monitoring method used for missile automatic test - Google Patents
Differential test signal monitoring module and monitoring method used for missile automatic test Download PDFInfo
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Abstract
The invention provides a differential test signal monitoring module and monitoring method used for a missile automatic test, relates to the field of test and signal monitoring, and aims at solving the problem of limitation to rapid positioning of faults caused by the fact that existing automatic test systems for the missile test lack a mode of effectively recording test equipment and especially recording the whole course of the test and tested signals. A voltage conditioning circuit is used for acquiring 16 paths of voltage differential input signals on a monitored path between tested equipment and a test system for conditioning and filtering and outputting 16-channel voltage analog signals; an A/D acquisition unit is used for continuously acquiring the 16-channel voltage analog signals in a synchronous parallel way and outputting 16-channel voltage digital signals after performing analog/digital conversion; and an FPGA is used for receiving the 16-channel voltage digital signals for data recombination, transmitting the recombined voltage signals and transmitting synchronous storage control signals and power-down storage control signals and is also used for communicating with an upper computer. The differential test signal monitoring module and monitoring method are used for missile monitoring.
Description
Technical field
The present invention relates to the differential test signal monitoring modular for automatic missile checkout system and monitoring method.Belong to test and signal monitoring field.
Background technology
Along with the development of automatic missile checkout system technology, change automatic test into by traditional manual, semi-automatic test, and Auto-Test System also experienced by and develops into more compact PXI bus and distributed networking bus from vxi bus.
Auto-Test System substantially increases test speed and execution efficiency, but for this kind of very important measurand of guided missile, must ensure that test macro is in normal, correct duty all the time in test process, in order to avoid bring damage or adverse effect to measurand.In actual implementation Missile ATS process, often adopt the mode of guided missile simulator, before Auto-Test System is to the test of missile, carry out the self-inspection that flow process is consistent, to check the correctness of the various duties such as interface, software and hardware, guarantee test smooth, reliably carry out.
The mode of self-inspection before this test, though test risk, the reliability promoting test and security can be reduced to a certain extent, but but cannot avoid completely in test process, effective record testing apparatus especially tests the overall process with measured signal, even if thus cause test result defective, often be difficult to quick, that direct location is measurand problem, or the problem of testing apparatus, great limitation is brought to quick diagnosis, fast failure location.
Summary of the invention
The present invention is to solve the test of existing Auto-Test System to guided missile, lacks effectively record testing apparatus and especially records the mode of the overall process of test and measured signal, thus have circumscribed problem to the quick position of fault.Now be provided for differential test signal monitoring modular and the monitoring method of automatic missile checkout system.
For the differential test signal monitoring modular of automatic missile checkout system, it comprises voltage modulate circuit, A/D collecting unit, FPGA, network communication unit, a DDR storer, No. two DDR storeies, a CF card and No. two CF cards,
The 16 road voltage differential input signals gathered, for gathering the monitored path Shang 16 road voltage differential input signal between equipment under test and test macro, are carried out nursing one's health and filtering, and export 16 road voltage analog signals by voltage modulate circuit;
A/D collecting unit, for running simultaneously, Dui 16 road voltage analog signal carries out continuous print collection, and after carrying out analog/digital conversion to the 16 road voltage analog signals gathered, exports 16 road voltage digital signals;
FPGA, carries out data recombination for receiving 16 road voltage digital signals, for sending the voltage signal after restructuring, for sending stores synchronized control signal and power down storage control signal, also for communicating with host computer;
DDR storer, for receiving stores synchronized control signal, according to stores synchronized control signal, the voltage signal after recombinating under receiving electrifying condition also stores;
CF card, for receiving power down storage control signal, according to power down storage control signal, the voltage signal after recombinating under receiving power-down conditions also stores.
According to the differential test signal monitoring modular for automatic missile checkout system,
FPGA comprises function IP kernel, embedded controller IP kernel, network control IP kernel, a Memory control IP kernel and No. two Memory control IP kernels,
Function IP kernel, for receiving/sending 16 road voltage digital signals;
Embedded controller IP kernel, for carrying out data recombination to the 16 road voltage digital signals received; For sending restructuring Hou 16 road voltage digital signal, for sending stores synchronized control signal, power down storage control signal and flow control signal;
Network control IP kernel, comprises MAC layer module, for according to flow control signal, carries out flow control in a full-duplex mode, realizes the sending/receiving of mac frame, the encapsulation/unpack of mac frame and the error-detecting of mac frame; Also communicate with host computer for controlling;
A Memory control IP kernel, for receiving the voltage signal after restructuring, when receiving power down storage control signal, sends the voltage signal after power down storage control signal and restructuring;
No. two Memory control IP kernels, for receiving the voltage signal after restructuring, when receiving stores synchronized control signal, send the voltage signal after stores synchronized control signal and restructuring.
For the differential test signal monitoring method of automatic missile checkout system, it is characterized in that, it comprises the following steps:
For gathering the monitored path Shang 16 road voltage differential input signal between equipment under test and test macro, the 16 road voltage differential input signals gathered being carried out filtering, and exports the step of 16 road voltage analog signals;
For carrying out continuous print collection to 16 road voltage analog signals, and analog/digital conversion being carried out to the 16 road voltage analog signals gathered, exporting the step of 16 road voltage digital signals;
Data recombination is carried out, for sending the voltage signal after restructuring, for sending stores synchronized control signal and power down storage control signal, also for carrying out with host computer the step that communicates for receiving 16 road voltage digital signals;
For according to the stores synchronized control signal received, receive when powering on and store the step of voltage signal after recombinating;
For according to the power down storage control signal received, receive when power down and store the step of voltage signal after recombinating.
Beneficial effect of the present invention is: adopt the monitored path Shang 16 road differential input signal between voltage modulate circuit collection equipment under test and test macro, and export 16 road differential input signals to A/D collecting unit, analog quantity 16 road isolating difference input-32V ~+32V, ± 10mV ± 0.1% × measurement point, wherein, last three tunnels provide time measurement function 0 ~ 30Min, ± 10mS ± 0.1% × measurement point, A/D collecting unit Dui 16 road voltage analog signal of running simultaneously carries out continuous print collection and changes this signal, receive 16 road voltage digital signals by FPGA and carry out data recombination, send the voltage signal after restructuring, realize the monitoring to test mode and voltage signal, communicated with network communication unit by FPGA again, monitoring function is started according to networking command, namely according to the sampling rate set, monitoring sampling is carried out to each signaling interface, and be stored to data storage cell by during the fructufy obtained after sampling, data storage cell can store a large amount of test data, and power down can not be lost, guarantee system upper once power on time, still the data content of last test can be read.PC control computing machine also can by the work of network stop signal monitoring equipment, by the data in data storage cell, host computer is uploaded to by network, for host computer process, this system achieves the quick position to the fault that equipment under test occurs, carry out in test process at Missile ATS equipment to guided missile, signal condition in monitoring and test path and the saltus step that may exist, the state of this system overall process record test process signal Excitation and response, for fault diagnosis provides supplementary means, the status monitoring function continued key signal is provided simultaneously, and any impact is not brought on test macro equipment and measurand.
Accompanying drawing explanation
Fig. 1 is the theory diagram of the differential test signal monitoring modular for automatic missile checkout system described in embodiment one;
Fig. 2 is the principle schematic of the differential test signal monitoring modular for automatic missile checkout system described in embodiment three;
Fig. 3 circuit relationships figure that to be selective circuit of measuring range be connected with deserializer and signal condition and filtering circuit;
Fig. 4 is the circuit relationships figure that signal condition is connected with selective circuit of measuring range and analog to digital converter adc circuit with filtering circuit;
To be analog to digital converter adc circuit isolate with signal condition and filtering circuit and magnetoelectricity the circuit relationships figure be connected to Fig. 5;
Fig. 6 is the principle schematic of CF card in embodiment one.
Embodiment
Embodiment one: illustrate present embodiment, the differential test signal monitoring modular for automatic missile checkout system described in present embodiment with reference to Fig. 1, it comprises voltage modulate circuit 1, A/D collecting unit 2, FPGA3, DDR storer 4 and CF card 5,
The 16 road voltage differential input signals gathered, for gathering the monitored path Shang 16 road voltage differential input signal between equipment under test and test macro, are carried out nursing one's health and filtering, and export 16 road voltage analog signals by voltage modulate circuit 1;
A/D collecting unit 2, for running simultaneously, Dui 16 road voltage analog signal carries out continuous print collection, and after carrying out analog/digital conversion to the 16 road voltage analog signals gathered, exports 16 road voltage digital signals;
FPGA3, carries out data recombination for receiving 16 road voltage digital signals, for sending the voltage signal after restructuring, for sending stores synchronized control signal and power down storage control signal, also for communicating with host computer;
DDR storer 4, for receiving stores synchronized control signal, according to stores synchronized control signal, the voltage signal after recombinating under receiving electrifying condition also stores;
CF card 5, for receiving power down storage control signal, according to power down storage control signal, the voltage signal after recombinating under receiving power-down conditions also stores.
In present embodiment, PC control computing machine communicates by the FPGA of network with signal monitoring equipment, after FPGA receives communications command, monitoring function can be started according to networking command, namely according to the sampling rate set, monitoring sampling is carried out to each signaling interface, and be stored to data storage areas by during the fructufy obtained after sampling, data storage area can store a large amount of test data, and power down can not be lost, guarantee system upper once power on time, still can read the data content of last test.PC control computing machine also by the work of network stop signal monitoring equipment, by the data in data storage area, can be uploaded to host computer by network, for host computer process.
In present embodiment, the voltage data buffer-stored that A/D collecting unit collects is in the internal storage location of FPGA, the internal storage location of FPGA adopts the MT47H128M16RT-25EIT of Micron company of two panels U.S. production, storage space is 128M × 16bit, is distinguished/stored the data of different passage by different memory address mappings.
CF card is current most widely used storage card; adopt FLASH technology; it is a kind of stable storage solution; do not need battery to maintain data wherein; concerning preserved data, CF card than traditional disc driver security and protectiveness all higher, combine with FPGA and use; both make use of the feature that FPGA speed is fast, I/O is abundant, make use of again large, the non-volatile feature of CF card capacity.
Internal controller is responsible for the exchanges data between external unit and inner Flash memory module.When external unit is to CF card write data, first sends the data to controller, under the control of the controller external data is write Flash memory module.When external unit reads data from CF card, first the data in Flash memory module take out stored in inner buffer after receiving reading order by controller, then data are exported to external unit again.The existence of internal controller avoids the communication protocol of the complexity that will realize of user when carrying out exchanges data with memory module, make CF card read/write steering logic be simplified.CF card internal main will comprise controller and Flash module two parts, and the Flash memory module of its inner composition as Fig. 6 CF card inside applies NANDFlash mostly as storage medium, and NANDFlash capacity is large, and cost is low, can reach higher data access speed.
CF card support three kinds of mode of operations: 1PCCardI/O pattern; 2PCCardMemory pattern and 3TrueIDEIntegratedDeviceElectronics pattern.Wherein PCCard pattern meets PC storage card international federation PCMCIAPersonalComputerMemoryCardInternationalAssociation agreement completely, and TrueIDE pattern then meets ATA/IDE agreement.
The selection of PCCard pattern and TrueIDE pattern is selected by the 9th pin ATA-SEL.After powering on, if this pin is high level, CF card enters PCCard pattern, if low level, then enters TrueIDE pattern.Under CF card is operated in PCCard pattern, PCCardMemory pattern or PCCardI/O pattern can be entered by revising inner configuration register.
In above three kinds of mode of operations, the hardware circuit under TrueIDE pattern is the simplest, only need use 3 address wire A [2:0], all the other 8 address wire A [10:3] ground connection.Under TrueIDE pattern, the steering logic of CF card is also comparatively simple, when under the work of CF card therewith pattern, agreement and the configuration of PCMCIAPCCard are all disabled, user, without the need to configuring Memory register in PCMCIA agreement or Attribute register, only need access by 3 address wires the control that 8 TaskFile registers can realize CF card.Because CF card circuit under TrueIDE pattern is simple, it is convenient to control, and in design, CF card is configured to the access that TrueIDE pattern carries out data.
Under CF card enters TrueIDE mode of operation, there are three kinds of data-transmission modes after powering on, are respectively PIO pattern, MultiWordDMA pattern and UltraDMA pattern.In above Three models, under UltraDMA pattern, data rate is the fastest.Under PIO and MultiWordDMA pattern, under PIO-6 and MultiWordDMA-4 that data access speed is the fastest, spikes in speed is 25MB/s, and average access speed there are differences according to the difference of each production firm.Under UltraDMA pattern, the spikes in speed of UltraDMA-4, UltraDMA-5 and UltraDMA-6 is respectively 66MB/s, 100MB/s and 133MB/s, and the CF card average transmission speed that different businessman produces is also different.
Peripheral control unit and CF stick into line number reportedly defeated time, at every turn to the sector number of CF card application read/write between 1 to 256 sectors.The sector number of single request for data transmission is larger, and the utilization factor of CF card data bus is higher, shown in data rate is also fast.
Embodiment two: illustrate present embodiment with reference to Fig. 1, present embodiment is described further the differential test signal monitoring modular for automatic missile checkout system described in embodiment one, in present embodiment, FPGA3 comprises function IP kernel 3-1, embedded controller IP kernel 3-2, network control IP kernel 3-3, a Memory control IP kernel 3-4 and No. two Memory control IP kernel 3-5
Function IP kernel 3-1, for receiving/sending 16 road voltage digital signals;
Embedded controller IP kernel 3-2, for carrying out data recombination to the 16 road voltage digital signals received; For sending restructuring Hou 16 road voltage digital signal, for sending stores synchronized control signal, power down storage control signal and flow control signal;
Network control IP kernel 3-3, comprises MAC layer module, for according to flow control signal, carries out flow control in a full-duplex mode, realizes the sending/receiving of mac frame, the encapsulation/unpack of mac frame and the error-detecting of mac frame; Also communicate with host computer for controlling;
A Memory control IP kernel 3-4, for receiving the voltage signal after restructuring, when receiving power down storage control signal, sends the voltage signal after power down storage control signal and restructuring;
No. two Memory control IP kernel 3-5, for receiving the voltage signal after restructuring, when receiving stores synchronized control signal, send the voltage signal after stores synchronized control signal and restructuring.
In present embodiment, as can be seen from Fig. 1 and Fig. 2, all functions circuit region is all connected with FPGA, therefore selecting of FPGA needs to consider whether internal resource and I/O pin resource meet the demands, select the EP3C120F780I7 chip of CYCLONE series in the design, this chip has 1,200,000 logical blocks, has 780 IO pins simultaneously, can meet the design's demand completely.
The function body in network communicating function district is FPGA, SOPC technology is have employed in FPGA inside in design, NIOSII processor cores is integrated with at chip internal, FPGA is made to possess certain arithmetic capability and data-handling capacity, adopt SOPC technology to carry out integrated with peripheral components very easily simultaneously, the a series of ripe IP kernel utilizing altera corp to provide, can complete minimum system fast and build.
Network control IP kernel in the design and Memory control IP kernel just employ the ripe IP kernel that altera corp provides.
The FPGA design effort of ethernet controller mainly comprises the FPGA design of ethernet mac sublayer, the MII Interface design of the Interface design of media access control sublayer and upper-layer protocol and MAC and Physical layer ethernet PHY chip.The IP kernel that Altera provides provides the Avalon-MM interface of standard, directly can realize the control to ethernet controller IP kernel by operation Avalon bus.Use NIOSII core more can directly network controller is mapped to memory headroom to operate, enormously simplify development difficulty.
The ethernet controller that Altera provides contains MAC layer network control IP kernel, MAC layer module network control IP kernel mainly performs flow control in a full-duplex mode, mac frame realizes sending and receiving function, it mainly operates the encapsulation of mac frame and unpacks and error-detecting, directly provide the parallel data grabbing card MII interface of external physical layer device, physical layer process directly utilizes technical grade PHY device, and main exploitation all concentrates on mac controller.
The physical layer device of the ethernet mac core acquiescence support of altera corp has the DP83848C of the TI company of 10/100Mbps, and provides more perfect support to this device, and development difficulty is very low, supports seamless link.Therefore adopt the DP83848T of TI company as PHY chip in design.
Need in design at the integrated ICP/IP protocol stack of internal system to complete network communicating function, a large amount of system resource will be used, more rich running space is had in order to make program and data, the DDR2 chip of two panels 16 is have employed in design, the storage space reaching 2G is provided, makes whole system can be good at running.DDR2 chip is directly connected with FPGA, and the DDR2 controller IP kernel provided by altera corp completes control.
The MT47H128M16RT-25EIT that DDR2 chip adopts Micron company of the U.S. to produce, this model DDR2 chip is that 84 pin FBGA encapsulate, and operating temperature range is-40 ~+95 DEG C, can meet actual user demand.
The function that A/D collecting unit mainly realizes be realize 16 Channel Synchronous parallel continuous print collection is carried out to voltage signal.
Embodiment three: illustrate present embodiment with reference to Fig. 2, present embodiment is described further the differential test signal monitoring modular for automatic missile checkout system described in embodiment one or embodiment two, in present embodiment, voltage modulate circuit 1 comprises signal condition and filtering circuit 1-1 and selective circuit of measuring range 1-2;
Selective circuit of measuring range 1-2, for selecting the monitored path Shang 16 road voltage differential input signal between the equipment under test gathered and test macro according to switch controlling signal;
Signal condition and filtering circuit 1-1, select Hou 16 road voltage differential input signal for receiving, and carries out filtering to selection Hou 16 road voltage differential input signal, sent by filtered 16 road voltage analog signals.
In present embodiment, the 16 channel separation A/D schematic block circuit diagram designed according to technical indicator are as shown in Fig. 3,4 and 5.
Input simulating signal is first through selective circuit of measuring range, signalling channel is decayed/amplified, then through signal condition and filtering circuit, after meeting the input requirements of digital to analog converter adc circuit, the sampling to simulating signal is realized by digital to analog converter adc circuit, signal after sampling is input in FPGA after magnetoelectricity isolation, after the restructuring by the complete paired data of FPGA, data is stored in two DDR storeies.Once gather 1K sampled point of sampling, after having gathered 1K sampled point, all sampled datas are done average, obtain final sampled data, this sampled data is finally be stored into the data in CF card, after end to be collected, by network, the data of collection is sent to test computer.
The design of AD collecting unit and the design of storage unit realize by FPGA device.Because passage each in this module adopts independent DC-DC module to power, and the control signal of digital to analog converter adc circuit, the control signal of data-signal and selective circuit of measuring range is all isolated with control FPGA, so each interchannel is electrical isolation, thus ensure that the isolation of input signal.
Embodiment four: illustrate present embodiment with reference to Fig. 2, present embodiment is described further the differential test signal monitoring modular for automatic missile checkout system described in embodiment three, in present embodiment, A/D collecting unit 2 comprises electromagnetic screen 2-1, deserializer 2-2 and analog to digital converter adc circuit 2-3;
Analog to digital converter adc circuit 2-3, for receiving 16 road voltage analog signals, for receiving the serial clock signal after magnetoelectricity isolation and chip selection signal, for 16 road voltage analog signals being converted to 16 road voltage digital signals, for sending 16 road voltage digital signals according to the serial clock signal after magnetoelectricity isolation and chip selection signal;
Deserializer 2-2, for receiving the control signal after magnetoelectricity isolation, for being converted to switch controlling signal, for transmit button control signal the control signal after the isolation of reception magnetoelectricity;
Electromagnetic screen 2-1, for receiving serial clock signal, chip selection signal, control signal and 16 road voltage digital signals, and magnetoelectricity isolation is carried out to serial clock signal, chip selection signal, control signal and 16 road voltage digital signals, for exporting clock signal, chip selection signal, control signal and the 16 road voltage digital signals after magnetoelectricity isolation.
In present embodiment, as shown in Figure 2, selective circuit of measuring range is made up of attenuator circuit and programmable instrument amplifier AD8253.Form attenuator circuit by R11, R9 and R12, according to the resistance shown in circuit, whole input impedance is 1200K Ω, is greater than the input impedance requirement of 1M Ω, and dividing ratios is fixing 2/3.The scope of input signal is-15V ~+15V, and after dividing potential drop, the input range of instrumentation amplifier AD8253 is-10V ~+10V, meets the requirement of its input range.The enlargement factor of instrumentation amplifier AD8253 is program control by A0 and A1, and user can according to the scope of input signal, select 1 freely ×, 10 ×, 100 × and 1000 × enlargement factor.
In present embodiment, as shown in Figure 4, the core of signal condition and filtering circuit is high-precision high-speed operational amplifier A D8021, and in the design, this operational amplifier adopts anti-phase amplification connection.IAOUT1 is the output of Fig. 3 Instrumental amplifier AD8253, the 2.5V reference voltage that the ADC that VREF will use after being exports, and INPUT1 is the output of AD8021, is finally input in ADC.Can calculate according to the circuit in Fig. 3:
The scope of IAOUT1 is-10V ~+10V, so the scope of INPUT1 is 0 ~ 2.5V, meets the input range requirement of ADC.The RC low-pass filter be made up of R14 and C8 carries out low-pass filtering to the output of AD8253, and its threshold frequency is designed to 50kHz.
Embodiment five: illustrate present embodiment with reference to Fig. 1, present embodiment is described further the differential test signal monitoring modular for automatic missile checkout system described in embodiment one, two or four, it also comprises ethernet PHY chip 6, and ethernet PHY chip 4 is for realizing the network service between FPGA3 and host computer.
Embodiment six: illustrate present embodiment, the differential test signal monitoring method for automatic missile checkout system described in present embodiment with reference to Fig. 6, it comprises the following steps:
For gathering the monitored path Shang 16 road voltage differential input signal between equipment under test and test macro, the 16 road voltage differential input signals gathered being carried out filtering, and exports the step of 16 road voltage analog signals;
For carrying out continuous print collection to 16 road voltage analog signals, and analog/digital conversion being carried out to the 16 road voltage analog signals gathered, exporting the step of 16 road voltage digital signals;
Data recombination is carried out, for sending the voltage signal after restructuring, for sending stores synchronized control signal and power down storage control signal, also for carrying out with host computer the step that communicates for receiving 16 road voltage digital signals;
For according to the stores synchronized control signal received, receive when powering on and store the step of voltage signal after recombinating;
For according to the power down storage control signal received, receive when power down and store the step of voltage signal after recombinating.
Embodiment seven: present embodiment is described further the differential test signal monitoring method for automatic missile checkout system described in embodiment six, describedly carry out data recombination for receiving 16 road voltage digital signals, for sending the voltage signal after restructuring, for sending stores synchronized control signal and power down storage control signal, also for comprising with the step that host computer carries out communicating:
For receiving/sending the step of 16 road voltage digital signals;
For carrying out data recombination, for sending the voltage signal after restructuring, for sending the step of synchronous dynamic control signal, power down control signal and flow control signal to the 16 road voltage digital signals received;
For according to flow control signal, carry out flow control in a full-duplex mode, realize the sending/receiving of mac frame, the encapsulation/unpack of mac frame and the error-detecting of mac frame; Also for controlling the step communicated with host computer;
For receiving the voltage signal after restructuring, when receiving synchronous dynamic control signal, send the step of the voltage signal after stores synchronized control signal and restructuring;
For receiving the voltage signal after restructuring, when receiving power down control signal, send the step of the voltage signal after power down storage control signal and restructuring.
Embodiment eight: the differential test signal monitoring method for automatic missile checkout system according to embodiment six is described further, the described monitored path Shang 16 road voltage differential input signal for gathering between equipment under test and test macro, the 16 road voltage differential input signals gathered are carried out filtering, and the step exporting 16 road voltage analog signals comprises:
For the step selected the monitored path Shang 16 road voltage differential input signal between the equipment under test gathered and test macro according to switch controlling signal;
Select Hou 16 road voltage differential input signal for receiving, filtering is carried out to selection Hou 16 road voltage differential input signal, by the step that filtered 16 road voltage analog signals send.
Embodiment nine: the differential test signal monitoring method for automatic missile checkout system according to embodiment six is described further, described for carrying out continuous print collection to 16 road voltage analog signals, and analog/digital conversion is carried out to the 16 road voltage analog signals gathered, the step exporting 16 road voltage digital signals comprises:
For receiving 16 road voltage analog signals, for receiving the serial clock signal after magnetoelectricity isolation and chip selection signal, for 16 road voltage analog signals being converted to 16 road voltage digital signals, for sending the step of 16 road voltage digital signals according to the serial clock signal after magnetoelectricity isolation and chip selection signal;
For receiving the control signal after magnetoelectricity isolation, for the control signal after the isolation of reception magnetoelectricity is converted to switch controlling signal, for the step of transmit button control signal;
For receiving serial clock signal, chip selection signal, control signal and 16 road voltage digital signals, and magnetoelectricity isolation is carried out to serial clock signal, chip selection signal, control signal and 16 road voltage digital signals, for exporting the step of clock signal, chip selection signal, control signal and 16 road voltage digital signals after magnetoelectricity isolation.
Claims (9)
1. for the differential test signal monitoring modular of automatic missile checkout system, it is characterized in that, it comprises voltage modulate circuit (1), A/D collecting unit (2), FPGA (3), DDR storer (4) and CF card (5)
The 16 road voltage differential input signals gathered, for gathering the monitored path Shang 16 road voltage differential input signal between equipment under test and test macro, are carried out nursing one's health and filtering, and export 16 road voltage analog signals by voltage modulate circuit (1);
A/D collecting unit (2), for running simultaneously, Dui 16 road voltage analog signal carries out continuous print collection, and after carrying out analog/digital conversion to the 16 road voltage analog signals gathered, exports 16 road voltage digital signals;
FPGA (3), carries out data recombination for receiving 16 road voltage digital signals, for sending the voltage signal after restructuring, for sending stores synchronized control signal and power down storage control signal, also for communicating with host computer;
DDR storer (4), for receiving stores synchronized control signal, according to stores synchronized control signal, the voltage signal after recombinating under receiving electrifying condition also stores;
CF card (5), for receiving power down storage control signal, according to power down storage control signal, the voltage signal after recombinating under receiving power-down conditions also stores.
2. the differential test signal monitoring modular for automatic missile checkout system according to claim 1, is characterized in that,
FPGA (3) comprises function IP kernel (3-1), embedded controller IP kernel (3-2), network control IP kernel (3-3), a Memory control IP kernel (3-4) and No. two Memory control IP kernels (3-5)
Function IP kernel (3-1), for receiving/sending 16 road voltage digital signals;
Embedded controller IP kernel (3-2), for carrying out data recombination to the 16 road voltage digital signals received; For sending restructuring Hou 16 road voltage digital signal, for sending stores synchronized control signal, power down storage control signal and flow control signal;
Network control IP kernel (3-3), comprises MAC layer module, for according to flow control signal, carries out flow control in a full-duplex mode, realizes the sending/receiving of mac frame, the encapsulation/unpack of mac frame and the error-detecting of mac frame; Also communicate with host computer for controlling;
A Memory control IP kernel (3-4), for receiving the voltage signal after restructuring, when receiving power down storage control signal, sends the voltage signal after power down storage control signal and restructuring;
No. two Memory control IP kernels (3-5), for receiving the voltage signal after restructuring, when receiving stores synchronized control signal, send the voltage signal after stores synchronized control signal and restructuring.
3. the differential test signal monitoring modular for automatic missile checkout system according to claim 1 and 2, is characterized in that,
Voltage modulate circuit (1) comprises signal condition and filtering circuit (1-1) and selective circuit of measuring range (1-2);
Selective circuit of measuring range (1-2), for selecting the monitored path Shang 16 road voltage differential input signal between the equipment under test gathered and test macro according to switch controlling signal;
Signal condition and filtering circuit (1-1), select Hou 16 road voltage differential input signal for receiving, and carries out filtering to selection Hou 16 road voltage differential input signal, sent by filtered 16 road voltage analog signals.
4. the differential test signal monitoring modular for automatic missile checkout system according to claim 3, it is characterized in that, A/D collecting unit (2) comprises electromagnetic screen (2-1), deserializer (2-2) and analog to digital converter adc circuit (2-3);
Analog to digital converter adc circuit (2-3), for receiving 16 road voltage analog signals, for receiving the serial clock signal after magnetoelectricity isolation and chip selection signal, for 16 road voltage analog signals being converted to 16 road voltage digital signals, for sending 16 road voltage digital signals according to the serial clock signal after magnetoelectricity isolation and chip selection signal;
Deserializer (2-2), for receiving the control signal after magnetoelectricity isolation, for being converted to switch controlling signal, for transmit button control signal the control signal after the isolation of reception magnetoelectricity;
Electromagnetic screen (2-1), for receiving serial clock signal, chip selection signal, control signal and 16 road voltage digital signals, and magnetoelectricity isolation is carried out to serial clock signal, chip selection signal, control signal and 16 road voltage digital signals, for exporting clock signal, chip selection signal, control signal and the 16 road voltage digital signals after magnetoelectricity isolation.
5. the differential test signal monitoring modular for automatic missile checkout system according to claim 1,2 or 4, it is characterized in that, it also comprises ethernet PHY chip (6), and ethernet PHY chip (4) is for realizing the network service between FPGA (3) and host computer.
6., for the differential test signal monitoring method of automatic missile checkout system, it is characterized in that, it comprises the following steps:
For gathering the monitored path Shang 16 road voltage differential input signal between equipment under test and test macro, the 16 road voltage differential input signals gathered being carried out filtering, and exports the step of 16 road voltage analog signals;
For carrying out continuous print collection to 16 road voltage analog signals, and analog/digital conversion being carried out to the 16 road voltage analog signals gathered, exporting the step of 16 road voltage digital signals;
Data recombination is carried out, for sending the voltage signal after restructuring, for sending stores synchronized control signal and power down storage control signal, also for carrying out with host computer the step that communicates for receiving 16 road voltage digital signals;
For according to the stores synchronized control signal received, receive when powering on and store the step of voltage signal after recombinating;
For according to the power down storage control signal received, receive when power down and store the step of voltage signal after recombinating.
7. the differential test signal monitoring method for automatic missile checkout system according to claim 6, it is characterized in that, describedly carry out data recombination for receiving 16 road voltage digital signals, for sending the voltage signal after restructuring, for sending stores synchronized control signal and power down storage control signal, also for comprising with the step that host computer carries out communicating:
For receiving/sending the step of 16 road voltage digital signals;
For carrying out data recombination, for sending the voltage signal after restructuring, for sending the step of synchronous dynamic control signal, power down control signal and flow control signal to the 16 road voltage digital signals received;
For according to flow control signal, carry out flow control in a full-duplex mode, realize the sending/receiving of mac frame, the encapsulation/unpack of mac frame and the error-detecting of mac frame; Also for controlling the step communicated with host computer;
For receiving the voltage signal after restructuring, when receiving synchronous dynamic control signal, send the step of the voltage signal after stores synchronized control signal and restructuring;
For receiving the voltage signal after restructuring, when receiving power down control signal, send the step of the voltage signal after power down storage control signal and restructuring.
8. the differential test signal monitoring method for automatic missile checkout system according to claim 6, it is characterized in that, the described monitored path Shang 16 road voltage differential input signal for gathering between equipment under test and test macro, the 16 road voltage differential input signals gathered are carried out filtering, and the step exporting 16 road voltage analog signals comprises:
For the step selected the monitored path Shang 16 road voltage differential input signal between the equipment under test gathered and test macro according to switch controlling signal;
Select Hou 16 road voltage differential input signal for receiving, filtering is carried out to selection Hou 16 road voltage differential input signal, by the step that filtered 16 road voltage analog signals send.
9. the differential test signal monitoring method for automatic missile checkout system according to claim 6, it is characterized in that, described for carrying out continuous print collection to 16 road voltage analog signals, and analog/digital conversion is carried out to the 16 road voltage analog signals gathered, the step exporting 16 road voltage digital signals comprises:
For receiving 16 road voltage analog signals, for receiving the serial clock signal after magnetoelectricity isolation and chip selection signal, for 16 road voltage analog signals being converted to 16 road voltage digital signals, for sending the step of 16 road voltage digital signals according to the serial clock signal after magnetoelectricity isolation and chip selection signal;
For receiving the control signal after magnetoelectricity isolation, for the control signal after the isolation of reception magnetoelectricity is converted to switch controlling signal, for the step of transmit button control signal;
For receiving serial clock signal, chip selection signal, control signal and 16 road voltage digital signals, and magnetoelectricity isolation is carried out to serial clock signal, chip selection signal, control signal and 16 road voltage digital signals, for exporting the step of clock signal, chip selection signal, control signal and 16 road voltage digital signals after magnetoelectricity isolation.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106706952A (en) * | 2017-01-10 | 2017-05-24 | 成都胜英测控技术有限公司 | Multichannel high-speed time measurement system and time measurement data processing method |
| CN108958821A (en) * | 2018-07-11 | 2018-12-07 | 苏州因曼吉科技有限公司 | A kind of implementation method of the flexibility testing system for electronic product production test |
| CN113885366A (en) * | 2021-11-01 | 2022-01-04 | 芯跳科技(广州)有限公司 | Big data processing monitoring system and method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1089897A (en) * | 1996-09-09 | 1998-04-10 | Mitsubishi Electric Corp | Guided airframe system |
| CN101806559A (en) * | 2010-03-31 | 2010-08-18 | 哈尔滨工业大学 | Method and device for receiving and forwarding telemeter data of semi-physical simulator |
| CN103377548A (en) * | 2013-06-24 | 2013-10-30 | 北京电子工程总体研究所 | Zigbee technology-based integrated test system for missile of wireless transmission network based on |
| CN103471473A (en) * | 2013-09-04 | 2013-12-25 | 北京电子工程总体研究所 | Portable type automatic metering calibrating device and method for guided missile comprehensive test vehicle |
-
2015
- 2015-11-13 CN CN201510780690.1A patent/CN105353242A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1089897A (en) * | 1996-09-09 | 1998-04-10 | Mitsubishi Electric Corp | Guided airframe system |
| CN101806559A (en) * | 2010-03-31 | 2010-08-18 | 哈尔滨工业大学 | Method and device for receiving and forwarding telemeter data of semi-physical simulator |
| CN103377548A (en) * | 2013-06-24 | 2013-10-30 | 北京电子工程总体研究所 | Zigbee technology-based integrated test system for missile of wireless transmission network based on |
| CN103471473A (en) * | 2013-09-04 | 2013-12-25 | 北京电子工程总体研究所 | Portable type automatic metering calibrating device and method for guided missile comprehensive test vehicle |
Non-Patent Citations (1)
| Title |
|---|
| 钱科威: "某ATE测试信号在线监测设备研制", 《中国优秀硕士学位论文全文数据库 信息科技辑》 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106706952A (en) * | 2017-01-10 | 2017-05-24 | 成都胜英测控技术有限公司 | Multichannel high-speed time measurement system and time measurement data processing method |
| CN106706952B (en) * | 2017-01-10 | 2023-11-17 | 成都科大胜英科技有限公司 | Multichannel high-speed time measurement system and time measurement data processing method |
| CN108958821A (en) * | 2018-07-11 | 2018-12-07 | 苏州因曼吉科技有限公司 | A kind of implementation method of the flexibility testing system for electronic product production test |
| CN113885366A (en) * | 2021-11-01 | 2022-01-04 | 芯跳科技(广州)有限公司 | Big data processing monitoring system and method |
| CN113885366B (en) * | 2021-11-01 | 2024-02-09 | 芯跳科技(广州)有限公司 | Big data processing monitoring system and method |
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