CN107978642A - A kind of GaN base heterojunction diode and preparation method thereof - Google Patents
A kind of GaN base heterojunction diode and preparation method thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 16
- 230000004888 barrier function Effects 0.000 claims abstract description 59
- 238000002161 passivation Methods 0.000 claims abstract description 31
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 239000000463 material Substances 0.000 claims description 25
- 229910045601 alloy Inorganic materials 0.000 claims description 16
- 239000000956 alloy Substances 0.000 claims description 16
- 150000004767 nitrides Chemical class 0.000 claims description 13
- 229910002704 AlGaN Inorganic materials 0.000 claims description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 8
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 8
- 230000008859 change Effects 0.000 claims description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 4
- 229910052681 coesite Inorganic materials 0.000 claims description 4
- 229910052593 corundum Inorganic materials 0.000 claims description 4
- 229910052906 cristobalite Inorganic materials 0.000 claims description 4
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 claims description 4
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum oxide Inorganic materials [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 claims description 4
- HYXGAEYDKFCVMU-UHFFFAOYSA-N scandium(III) oxide Inorganic materials O=[Sc]O[Sc]=O HYXGAEYDKFCVMU-UHFFFAOYSA-N 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 229910052682 stishovite Inorganic materials 0.000 claims description 4
- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 claims description 4
- 229910052905 tridymite Inorganic materials 0.000 claims description 4
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 4
- KTUFCUMIWABKDW-UHFFFAOYSA-N oxo(oxolanthaniooxy)lanthanum Chemical compound O=[La]O[La]=O KTUFCUMIWABKDW-UHFFFAOYSA-N 0.000 claims description 2
- 238000005036 potential barrier Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 78
- 238000005516 engineering process Methods 0.000 description 10
- 238000001259 photo etching Methods 0.000 description 6
- 230000015556 catabolic process Effects 0.000 description 5
- 239000002184 metal Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 229910008599 TiW Inorganic materials 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000002019 doping agent Substances 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 229910052750 molybdenum Inorganic materials 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 229910052763 palladium Inorganic materials 0.000 description 3
- 229910052697 platinum Inorganic materials 0.000 description 3
- 229910052718 tin Inorganic materials 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 229910003460 diamond Inorganic materials 0.000 description 2
- 239000010432 diamond Substances 0.000 description 2
- 238000005566 electron beam evaporation Methods 0.000 description 2
- 238000001017 electron-beam sputter deposition Methods 0.000 description 2
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- 229910052594 sapphire Inorganic materials 0.000 description 2
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- 230000009286 beneficial effect Effects 0.000 description 1
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- 238000000151 deposition Methods 0.000 description 1
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- 230000002269 spontaneous effect Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/66196—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices with an active layer made of a group 13/15 material
- H01L29/66204—Diodes
- H01L29/66219—Diodes with a heterojunction, e.g. resonant tunneling diodes [RTD]
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Abstract
The invention discloses a kind of GaN base heterojunction diode and preparation method thereof, which includes：GaN intrinsic layers and barrier layer on substrate is grown successively；Part recess region is formed on the barrier layer of part, high hole concentration structure sheaf is covered in groove upper surface；Cathode electrode is located at the subregion that barrier layer upper surface is not covered by high hole concentration structure sheaf；Anode electrode Part I is located at another part region that barrier layer upper surface is not covered by high hole concentration structure sheaf, its position is close to high hole concentration structure sheaf；Anode electrode Part II is covered in the upper surface of high hole concentration structure sheaf；Passivation protection layer is covered in the region that barrier layer upper surface is not covered by cathode electrode and anode electrode.Reliability of the present invention is high, reproducible, it can be achieved that adjusting to device cut-in voltage, obtains low turn-on voltage, the GaN heterojunction diodes of low reverse current leakage.
Description
Technical field
The present invention relates to semiconductor devices manufacture technology field, and in particular to new group is added on GaN heterojunction structures
Divide GaN base heterojunction diode of p-type multicomponent nitride alloy of gradual change and preparation method thereof.
Background technology
GaN material is preparing high pressure, height because it possesses the features such as energy gap is big, and critical breakdown electric field is high, and thermal conductivity is high
There is unique advantage in terms of warm, high-power and High Density Integration electronic device.
GaN material can form heterojunction structure with materials such as AlGaN, InAlN.Since the materials such as AlGaN or InAlN are deposited
In piezoelectricity and spontaneous polarization effect, therefore the two-dimensional electron gas of high concentration and high mobility can be formed at heterojunction boundary
(2DEG).This characteristic can not only improve the carrier mobility and working frequency of GaN base device, can also reduce device
Conducting resistance and switching delay.
GaN base diode is since it possesses breakdown characteristics height, the features such as switching speed is fast, power management, wind-power electricity generation,
The field of power electronics such as solar cell, electric automobile have a wide range of applications.GaN base heterojunction schottky diode has
Have that switching speed is fast, backward voltage is high, efficient, and loss is small, there is huge market application in 600V-1200V device contexts
Prospect.But there are following shortcoming for GaN base Schottky diode at present：
1st, positive cut-in voltage is high and unadjustable.Conventional GaN Schottky diode due to the limitation of Schottky barrier,
Positive cut-in voltage is generally secured to 1V or so, it is impossible to adjusts.
2nd, reverse leakage current is big.Due to schottky barrier height it is small the features such as, the reverse leakage lumen of Schottky diode
It is aobvious to be higher than pn-junction diode so that the breakdown voltage of GaN base Schottky diode declines.
For these shortcomings, researcher is proposed using the F ion below high low work function metal mixing anode, Schottky
The modes such as injection technique, groove anode make Schottky diode, can be effectively reduced the unlatching electricity of Schottky diode
Pressure, but the reverse leakage current of device cannot be effectively reduced, cut-in voltage, the reverse leakage current of GaN diode are effectively reduced, is carried
High-breakdown-voltage, which becomes, mainly to be solved the problems, such as.
The content of the invention
In order to overcome above shortcoming existing in the prior art, the object of the present invention is to provide a kind of two pole of GaN base hetero-junctions
Pipe and preparation method thereof.
To reach the one side of above-mentioned purpose, the present invention provides a kind of GaN base heterojunction diode, the GaN base are different
Matter junction diode includes：Substrate；GaN intrinsic layers, are formed at substrate；Barrier layer, is formed on GaN intrinsic layers, and
Table top figure is formed on barrier layer and GaN intrinsic layers, to isolate with other GaN diodes；Passivation protection layer, is formed at barrier layer
And on table top figure；High hole concentration structure sheaf, is formed in a recess region, the recess region system to passivation protection layer and
Barrier layer is graphically formed；Cathode electrode, is formed at barrier layer upper surface not by high hole concentration structure sheaf and passivation protection layer
The subregion covered；Anode electrode Part I, is formed at barrier layer upper surface not by high hole concentration structure sheaf and blunt
Change another part region for being covered of protective layer, and close to high hole concentration structure sheaf；Anode electrode Part II, is covered in height
The upper surface of hole concentration structure sheaf.
In such scheme, the thickness of the GaN intrinsic layers is 50nm-10 μm.
In such scheme, the making material of the barrier layer is AlN, InN, AlGaN, InGaN or InAlN, and thickness is
5nm-1μm。
In such scheme, the depth of groove of the recess region is less than or equal to barrier layer thickness and can be 0nm.
In such scheme, the making material of the high hole concentration structure sheaf is polynary for the p-type nitride of Al content gradually variationals
Alloy, the maximum dopant concentration of the p-type nitride of the high hole concentration structure sheaf is 105-1022/cm-3。
In such scheme, the making material of the passivation protection layer is SiO2、Si3N4、AlN、Al2O3、MgO、Sc2O3、
TiO2、HfO2、BCB、ZrO2、Ta2O5Or La2O3, thickness is 5nm-1 μm.
, should present invention also offers a kind of preparation method of GaN base diode to reach the other side of above-mentioned purpose
Method includes：Step 1：GaN intrinsic layers are grown on substrate；Step 2：Barrier layer is grown on GaN intrinsic layers；Step 3：In gesture
Table top figure is formed in barrier layer and GaN intrinsic layers；Step 4：Passivation protection layer is formed on barrier layer and table top figure；Step 5：
Passivation protection layer is patterned, obtains the first graphics field；Step 6：Figure is carried out to the barrier layer of the first graphics field
Change, form recess region；Step 7：The selective regrowth high hole concentration structure sheaf in recess region；Step 8：Passivation is protected
Sheath is patterned, and obtains second graph and the 3rd figure；Step 9：Cathode electrode is prepared in second graph, in the 3rd figure
Anode electrode Part I is prepared in shape, and is annealed using high temperature alloy, makes cathode electrode, anode electrode Part I and potential barrier
Ohmic contact is formed between layer；Step 10：Anode electrode Part II is prepared on high hole concentration structure sheaf, and utilizes high temperature
Alloy is annealed, and makes to form Schottky contacts or Ohmic contact between anode electrode Part II and high hole concentration structure sheaf.
In such scheme, the thickness of table surface height >=barrier layer of table top figure described in step 3.
In such scheme, the depth of groove of recess region described in step 6 is less than or equal to barrier layer thickness and can be 0nm.
In such scheme, the making material of high hole concentration structure sheaf described in step 7 nitrogenizes for the p-type of Al content gradually variationals
Thing multicomponent alloy.
It can be seen from the above technical proposal that the invention has the advantages that：
1st, this GaN base heterojunction diode provided by the invention and preparation method thereof, by selecting different grooves deep
Degree, the high hole concentration structure sheaf of different component gradual change scope, different nitride alloys and its doping concentration and thickness can be with
So that two-dimensional electron gas recovers under different forward voltages, communication channel, electricity is opened so as to adjust the positive of diode
Pressure, makes obtained device meet different requirements.
2nd, this GaN base heterojunction diode provided by the invention and preparation method thereof, in Al (In) GaN/GaN structures
On the basis of, groove structure is formed, adds high hole concentration structure sheaf, the structure is more using the p-type nitride of Al content gradually variationals
First alloy, can form pn-junction, when diode is in reverse bias so that the pn-junction is reverse-biased, effectively reduces with barrier layer
The reverse leakage current of device, improves the breakdown voltage of diode.
3rd, this GaN base heterojunction diode provided by the invention and preparation method thereof, reliability is high, reproducible, can
Realize the adjusting to device cut-in voltage, obtain low turn-on voltage, the GaN heterojunction diodes of low reverse current leakage.
Brief description of the drawings
Fig. 1 is the structure diagram according to the GaN base heterojunction diode of one embodiment of the invention；
Fig. 2-Figure 10 is the preparation technology flow chart according to the GaN base heterojunction diode of one embodiment of the invention.
Embodiment
For the object, technical solutions and advantages of the present invention are more clearly understood, below in conjunction with specific embodiment, and reference
Attached drawing, the present invention is described in more detail.
Fig. 1 is according to the structure diagram of the GaN base heterojunction diode of one embodiment of the invention, as shown in Figure 1, at this
Invent in an embodiment, the GaN base heterojunction diode includes：
Substrate 100, substrate 100 are chosen as the substrate materials such as GaN, sapphire, Si, diamond or SiC；
GaN intrinsic layers 200, are formed on substrate 100, and wherein the thickness of GaN intrinsic layers 200 is 50nm-10 μm；
Barrier layer 300, is formed on GaN intrinsic layers 200, and forms platform on barrier layer 300 and GaN intrinsic layers 200
Face figure, to isolate with other GaN diodes, the thickness of table surface height >=barrier layer 300 of table top figure；Barrier layer 300
Making material can be AlN, InN, AlGaN, InGaN or InAlN, and thickness can be 5nm-1 μm；
Passivation protection layer 400, is formed on barrier layer 300 and table top figure；The thickness of passivation protection layer 400 is 5nm-
1μm；The making material of passivation protection layer 400 can be SiO2、Si3N4、AlN、Al2O3、MgO、Sc2O3、TiO2、HfO2、BCB、
ZrO2、Ta2O5Or La2O3Deng material；
High hole concentration structure sheaf 500, is formed in a recess region, the recess region system to passivation protection layer 400 and
Barrier layer 300 is graphically formed, the thickness of depth of groove≤barrier layer 300 of the recess region and depth of groove can be 0nm；It is high
The making material of hole concentration structure sheaf 500 be Al content gradually variationals p-type nitride multicomponent alloy, such as AlGaN, InGaN,
InAlN, AlInGaN etc.；The maximum dopant concentration of the p-type nitride of high hole concentration structure sheaf 500 is 105-1022/cm-3；
Cathode electrode 611, is formed at 300 upper surface of barrier layer not by high hole concentration structure sheaf 500 and passivation protection layer
400 subregions covered；
Anode electrode Part I 612, is formed at 300 upper surface of barrier layer not by high hole concentration structure sheaf 500 and blunt
Change another part region that is covered of protective layer 400, and close to high hole concentration structure sheaf 500；
Anode electrode Part II 613, is covered in the upper surface of high hole concentration structure sheaf 500；
Wherein, the making material of cathode electrode 611, anode electrode Part I 612 and anode electrode Part II 613 can
Think Ti, Al, Ni, Mo, Pt, Pd, Au, W, TiW, TiN and any combination between them.
In Fig. 1, passivation protection layer 400 is covered in 300 upper surface of barrier layer not by high hole concentration structure sheaf 500, cathode
Electrode 611 and the region of anode electrode Part I 612 and anode electrode Part II 613 covering, and it is covered in barrier layer 300
End face, GaN intrinsic layers 200 200 upper surface of portion end surface and GaN intrinsic layers subregion.Cathode electrode 611, sun
Ohmic contact, anode metal electrodes Part II 613 and high hole are formed between pole electrode Part I 612 and barrier layer 300
Schottky contacts or Ohmic contact are formed between concentration structure sheaf 500.
In Fig. 1, on the basis of Al (In) GaN/GaN structures, groove structure is formed, adds high hole concentration structure
Layer, the structure use the p-type nitride multicomponent alloy of Al content gradually variationals, pn-junction can be formed with barrier layer, when diode is in
During reverse bias so that the pn-junction is reverse-biased, effectively reduces the reverse leakage current of device, improves the breakdown voltage of diode.
Based on the structure diagram of the GaN base heterojunction diode shown in Fig. 1, Fig. 2-Figure 10 is to be implemented according to the present invention one
The preparation technology flow chart of the GaN base heterojunction diode of example, in this embodiment, the preparation side of GaN base heterojunction diode
Method includes following steps：
Step 1, GaN intrinsic layers 200 are grown on the substrate 100, as shown in Figure 2；
Wherein, the substrate 100 is chosen as the substrate materials such as GaN, sapphire, Si, diamond or SiC.
Wherein, the thickness of the GaN intrinsic layers 200 is 50nm-10 μm.
Step 2, barrier layer 300 is grown on the GaN intrinsic layers 200, as shown in Figure 2；
Wherein, the making material of the barrier layer 300 can be AlN, InN, AlGaN, InGaN or InAlN.
Wherein, the thickness of the barrier layer 300 is 5nm-1 μm.
Step 3, table top figure 301 is formed on the barrier layer 300 and GaN intrinsic layers 200, with other bis- poles of GaN
Pipe is isolated, as shown in Figure 3；
In an embodiment of the present invention, table top figure is formed using ion implanting, photoetching and plasma dry etch technology
Shape 301.
In the step, the thickness of table surface height >=barrier layer 300 of table top figure 301.
Step 4, passivation protection layer 400 is formed on barrier layer 300 and table top figure 301, as shown in Figure 4；
In the step, the conventional process such as deposit can be used to form the passivation protection layer 400, wherein, deposit passivation protection
The mode of layer 400 can be sputtering or chemical vapor deposition.
Wherein, the thickness of the passivation protection layer 400 is 5nm-1 μm.
Wherein, the making material of the passivation protection layer 400 can be SiO2、Si3N4、AlN、Al2O3、MgO、Sc2O3、
TiO2、HfO2、BCB、ZrO2、Ta2O5Or La2O3Deng material.
Step 5, the passivation protection layer 400 is patterned, obtains the first figure 401, as shown in Figure 5；
In an embodiment of the present invention, using photoetching, plasma dry etch technology or wet etch techniques to institute
Passivation protection layer 400 is stated to be patterned.
Step 6, the barrier layer in 401 region of the first figure is made to form recess region 402, depth of groove≤barrier layer
300 thickness and the depth of groove can be 0nm, as shown in Figure 6；
In an embodiment of the present invention, institute is made using photoetching, plasma dry etch technology or wet etch techniques
State barrier layer and form groove.
Step 7, the selective regrowth high hole concentration structure sheaf 500 in the recess region 402, as shown in Figure 7；
In an embodiment of the present invention, the making material of the high hole concentration structure sheaf 500 is the p-type of Al content gradually variationals
Nitride multicomponent alloy, such as AlGaN, InGaN, InAlN, AlInGaN etc..
Wherein, the maximum dopant concentration of the p-type nitride of the high hole concentration structure sheaf 500 is 105-1022/cm-3。
In an embodiment of the present invention, the high hole concentration structure sheaf 500 is formed at by way of growing and depositing
In the groove 402, such as metal oxide chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE) and/or atomic layer deposition
Product (ALD).
Step 8, the passivation protection layer 400 is patterned, second graph 601, the 3rd figure 602 is obtained, such as Fig. 8
It is shown；
In an embodiment of the present invention, using photoetching, plasma dry etch technology or wet etch techniques to institute
Passivation protection layer 400 is stated to be patterned.
Step 9, cathode electrode 611 and anode electrode are prepared respectively in the second graph 601 and the 3rd figure 602
A part 612, as shown in figure 9, and using high temperature alloy anneal, make cathode electrode 611 and anode electrode Part I 612 and gesture
Ohmic contact is formed between barrier layer 300；
In an embodiment of the present invention, metal electrode is prepared using photoetching, electron beam evaporation or sputtering technology.
Wherein, the cathode electrode 611, anode electrode Part I 612 making material can be Ti, Al, Ni, Mo,
Pt, Pd, Au, W, TiW, TiN and any combination between them.
Step 10, anode electrode Part II 613 is prepared on the high hole concentration structure sheaf 500, as shown in Figure 10,
And annealed using high temperature alloy, make to form schottky junctions between anode electrode Part II 613 and high hole concentration structure sheaf 500
Tactile or Ohmic contact；
In an embodiment of the present invention, metal electrode is prepared using photoetching, electron beam evaporation or sputtering technology.
Wherein, the making material of the anode electrode Part II 613 can be Ti, Al, Ni, Mo, Pt, Pd, Au, W,
TiW, TiN and any combination between them.
Particular embodiments described above, has carried out the purpose of the present invention, technical solution and beneficial effect further in detail
Describe in detail it is bright, it should be understood that the foregoing is merely the present invention specific embodiment, be not intended to limit the invention, it is all
Within the spirit and principles in the present invention, any modification, equivalent substitution, improvement and etc. done, should be included in the guarantor of the present invention
Within the scope of shield.
Claims (10)
1. a kind of GaN base heterojunction diode, it is characterised in that the GaN base heterojunction diode includes：
Substrate；
GaN intrinsic layers, are formed at substrate；
Barrier layer, is formed on GaN intrinsic layers, and on barrier layer and GaN intrinsic layers formed table top figure, with other
GaN diode is isolated；
Passivation protection layer, is formed on barrier layer and table top figure；
High hole concentration structure sheaf, is formed in a recess region, and the recess region system is to passivation protection layer and potential barrier layer pattern
Change and formed；
Cathode electrode, is formed at the part area that barrier layer upper surface is not covered by high hole concentration structure sheaf and passivation protection floor
Domain；
Anode electrode Part I, is formed at barrier layer upper surface and is not covered by high hole concentration structure sheaf and passivation protection layer
Another part region, and close to high hole concentration structure sheaf；
Anode electrode Part II, is covered in the upper surface of high hole concentration structure sheaf.
2. GaN base heterojunction diode according to claim 1, it is characterised in that the thickness of the GaN intrinsic layers is
50nm-10μm。
3. GaN base heterojunction diode according to claim 1, it is characterised in that the making material of the barrier layer is
AlN, InN, AlGaN, InGaN or InAlN, thickness are 5nm-1 μm.
4. GaN base heterojunction diode according to claim 1, it is characterised in that the depth of groove of the recess region
Less than or equal to barrier layer thickness and can be 0nm.
5. GaN base heterojunction diode according to claim 1, it is characterised in that the high hole concentration structure sheaf
Making material be Al content gradually variationals p-type nitride multicomponent alloy, the maximum of the p-type nitride of the high hole concentration structure sheaf
Doping concentration is 105-1022/cm-3。
6. GaN base heterojunction diode according to claim 1, it is characterised in that the making material of the passivation protection layer
Expect for SiO2、Si3N4、AlN、Al2O3、MgO、Sc2O3、TiO2、HfO2、BCB、ZrO2、Ta2O5Or La2O3, thickness is 5nm-1 μm.
A kind of 7. preparation method of the GaN base diode any one of claim 1 to 6, it is characterised in that this method bag
Include：
Step 1：GaN intrinsic layers are grown on substrate；
Step 2：Barrier layer is grown on GaN intrinsic layers；
Step 3：Table top figure is formed on barrier layer and GaN intrinsic layers；
Step 4：Passivation protection layer is formed on barrier layer and table top figure；
Step 5：Passivation protection layer is patterned, obtains the first graphics field；
Step 6：The barrier layer of first graphics field is patterned, forms recess region；
Step 7：The selective regrowth high hole concentration structure sheaf in recess region；
Step 8：Passivation protection layer is patterned, obtains second graph and the 3rd figure；
Step 9：Cathode electrode is prepared in second graph, anode electrode Part I is prepared in the 3rd figure, and utilize height
Temperature alloy is annealed, and makes to form Ohmic contact between cathode electrode, anode electrode Part I and barrier layer；
Step 10：Anode electrode Part II is prepared on high hole concentration structure sheaf, and is annealed using high temperature alloy, makes anode
Schottky contacts or Ohmic contact are formed between electrode second portion and high hole concentration structure sheaf.
8. preparation method according to claim 7, it is characterised in that the table surface height of table top figure described in step 3 >=
The thickness of barrier layer.
9. preparation method according to claim 7, it is characterised in that the depth of groove of recess region described in step 6 is small
In equal to barrier layer thickness and can be 0nm.
10. preparation method according to claim 7, it is characterised in that the system of high hole concentration structure sheaf described in step 7
Make the p-type nitride multicomponent alloy that material is Al content gradually variationals.
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| WO2022110007A1 (en) * | 2020-11-27 | 2022-06-02 | 苏州晶湛半导体有限公司 | Schottky diode and manufacturing method therefor |
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