CN107852175A - 译码设备、方法及信号传输系统 - Google Patents
译码设备、方法及信号传输系统 Download PDFInfo
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- CN107852175A CN107852175A CN201580081494.3A CN201580081494A CN107852175A CN 107852175 A CN107852175 A CN 107852175A CN 201580081494 A CN201580081494 A CN 201580081494A CN 107852175 A CN107852175 A CN 107852175A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
- H03M13/1117—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
- H03M13/114—Shuffled, staggered, layered or turbo decoding schedules
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/1157—Low-density generator matrices [LDGM]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/43—Majority logic or threshold decoding
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6577—Representation or format of variables, register sizes or word-lengths and quantization
- H03M13/6591—Truncation, saturation and clamping
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1128—Judging correct decoding and iterative stopping criteria other than syndrome check and upper limit for decoding iterations
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Mathematical Analysis (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Optimization (AREA)
- Computational Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Algebra (AREA)
- Computing Systems (AREA)
- Error Detection And Correction (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Abstract
本发明实施例公开了一种译码设备,该译码设备通过对LDPC码的码字的更新过程中出现的更新后码元的取值超出码元的量化范围的情况进行处理,有选择的放弃了更新后码元超出码元的量化范围的情况下的更新,避免了译码设备对于超出码元的量化范围的更新后的码字的直接量化,提升了译码设备的译码过程中的纠错能力。
Description
PCT国内申请,说明书已公开。
Claims (16)
- PCT国内申请,权利要求书已公开。
Priority Applications (1)
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CN201910422614.1A CN110289863B (zh) | 2015-10-13 | 2015-12-14 | 译码设备、方法及信号传输系统 |
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CN2015091887 | 2015-10-13 | ||
CNPCT/CN2015/091887 | 2015-10-13 | ||
PCT/CN2015/097284 WO2017063263A1 (zh) | 2015-10-13 | 2015-12-14 | 译码设备、方法及信号传输系统 |
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CN201910422614.1A Division CN110289863B (zh) | 2015-10-13 | 2015-12-14 | 译码设备、方法及信号传输系统 |
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CN107852175A true CN107852175A (zh) | 2018-03-27 |
CN107852175B CN107852175B (zh) | 2019-05-28 |
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CN201910422614.1A Active CN110289863B (zh) | 2015-10-13 | 2015-12-14 | 译码设备、方法及信号传输系统 |
CN201580081494.3A Active CN107852175B (zh) | 2015-10-13 | 2015-12-14 | 译码设备、方法及信号传输系统 |
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CN201910422614.1A Active CN110289863B (zh) | 2015-10-13 | 2015-12-14 | 译码设备、方法及信号传输系统 |
Country Status (12)
Country | Link |
---|---|
US (1) | US10447300B2 (zh) |
EP (1) | EP3211798B1 (zh) |
JP (1) | JP6426272B2 (zh) |
KR (2) | KR101813132B1 (zh) |
CN (2) | CN110289863B (zh) |
AU (2) | AU2015400311B2 (zh) |
BR (1) | BR112017000548B1 (zh) |
CA (1) | CA2953609C (zh) |
MX (1) | MX358246B (zh) |
RU (2) | RU2639687C1 (zh) |
SG (2) | SG10201707007QA (zh) |
WO (1) | WO2017063263A1 (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN111817728B (zh) * | 2020-08-03 | 2022-03-01 | 华中科技大学 | 一种基于硬件实现ldpc编译码的仿真系统及其工作方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20130055043A1 (en) * | 2011-08-22 | 2013-02-28 | Telex Maglorie Ngatched | Two Low Complexity Decoding Algorithms for LDPC Codes |
CN102957436A (zh) * | 2011-08-17 | 2013-03-06 | 北京泰美世纪科技有限公司 | 一种低密度奇偶校验码译码装置和译码方法 |
US20130061114A1 (en) * | 2011-09-02 | 2013-03-07 | Samsung Electronics Co., Ltd. | Freezing-based ldpc decoder and method |
Family Cites Families (42)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1802136A3 (en) * | 1995-03-15 | 2008-11-12 | Kabushiki Kaisha Toshiba | Moving picture coding and/or decoding systems |
US6240538B1 (en) * | 1998-09-10 | 2001-05-29 | Ericsson Inc. | Method and apparatus for errors and erasures decoding |
DE19907729C2 (de) * | 1999-02-23 | 2001-02-22 | Fraunhofer Ges Forschung | Verfahren und Vorrichtung zum Erzeugen eines Datenstroms aus Codeworten variabler Länge und Verfahren und Vorrichtung zum Lesen eines Datenstroms aus Codeworten variabler Länge |
US7673223B2 (en) * | 2001-06-15 | 2010-03-02 | Qualcomm Incorporated | Node processors for use in parity check decoders |
US6938196B2 (en) * | 2001-06-15 | 2005-08-30 | Flarion Technologies, Inc. | Node processors for use in parity check decoders |
WO2003021440A1 (en) * | 2001-09-01 | 2003-03-13 | Bermai, Inc. | Decoding architecture for low density parity check codes |
KR100987658B1 (ko) * | 2002-06-20 | 2010-10-13 | 코닌클리케 필립스 일렉트로닉스 엔.브이. | 직류 제어를 위한 안정된 디스패리티 채널코드 |
US7178080B2 (en) | 2002-08-15 | 2007-02-13 | Texas Instruments Incorporated | Hardware-efficient low density parity check code for digital communications |
JP3815557B2 (ja) | 2002-08-27 | 2006-08-30 | ソニー株式会社 | 符号化装置及び符号化方法、並びに復号装置及び復号方法 |
US7346832B2 (en) * | 2004-07-21 | 2008-03-18 | Qualcomm Incorporated | LDPC encoding methods and apparatus |
US7127659B2 (en) | 2004-08-02 | 2006-10-24 | Qualcomm Incorporated | Memory efficient LDPC decoding methods and apparatus |
US7441178B2 (en) | 2005-02-24 | 2008-10-21 | Keyeye Communications | Low complexity decoding of low density parity check codes |
JP4595650B2 (ja) | 2005-04-25 | 2010-12-08 | ソニー株式会社 | 復号装置および復号方法 |
US7761768B2 (en) | 2005-06-24 | 2010-07-20 | Intel Corporation | Techniques for reconfigurable decoder for a wireless system |
US7129862B1 (en) * | 2005-07-29 | 2006-10-31 | Texas Instruments Incorporated | Decoding bit streams encoded according to variable length codes |
KR20070084952A (ko) * | 2006-02-22 | 2007-08-27 | 삼성전자주식회사 | 통신 시스템에서 신호 수신 장치 및 방법 |
US7774689B2 (en) * | 2006-03-17 | 2010-08-10 | Industrial Technology Research Institute | Encoding and decoding methods and systems |
CN101064591B (zh) | 2006-04-24 | 2010-05-12 | 中兴通讯股份有限公司 | 低密度奇偶校验码的译码方法及其校验节点更新电路 |
CN100499378C (zh) | 2006-05-26 | 2009-06-10 | 清华大学 | 采用可变范围均匀量化的低密度奇偶校验码译码方法 |
US7613981B2 (en) * | 2006-10-06 | 2009-11-03 | Freescale Semiconductor, Inc. | System and method for reducing power consumption in a low-density parity-check (LDPC) decoder |
CN1996764A (zh) | 2007-01-10 | 2007-07-11 | 北京航空航天大学 | 基于奇偶校验矩阵的ldpc码的译码方法及译码器 |
CN101047387B (zh) * | 2007-03-23 | 2010-06-09 | 北京大学 | 一种多码率兼容ldpc码的构造方法及其译码器 |
US8291292B1 (en) * | 2008-01-09 | 2012-10-16 | Marvell International Ltd. | Optimizing error floor performance of finite-precision layered decoders of low-density parity-check (LDPC) codes |
JP4572937B2 (ja) | 2008-01-23 | 2010-11-04 | ソニー株式会社 | 復号装置および方法、プログラム、並びに記録媒体 |
US8313029B2 (en) * | 2008-01-31 | 2012-11-20 | Seiko Epson Corporation | Apparatus and methods for decoding images |
KR101398212B1 (ko) * | 2008-03-18 | 2014-05-26 | 삼성전자주식회사 | 메모리 장치 및 인코딩/디코딩 방법 |
US8291283B1 (en) * | 2008-06-06 | 2012-10-16 | Marvell International Ltd. | Layered quasi-cyclic LDPC decoder with reduced-complexity circular shifter |
JP2010009719A (ja) * | 2008-06-30 | 2010-01-14 | Fujitsu Ltd | 復号器及び記録再生装置 |
US8442021B2 (en) * | 2008-11-07 | 2013-05-14 | Motorola Mobility Llc | Radio link performance prediction in wireless communication terminal |
CN101741396B (zh) * | 2008-11-19 | 2013-03-13 | 华为技术有限公司 | 可变码长ldpc码编码或译码的方法与装置及编码器和译码器 |
CN101807928B (zh) * | 2009-02-13 | 2013-06-05 | 瑞昱半导体股份有限公司 | 记录控制器及奇偶校验码译码器 |
KR20100110662A (ko) * | 2009-04-03 | 2010-10-13 | 아주대학교산학협력단 | 저밀도 패러티 검사 부호의 복호 복잡도를 감소시키는 방법 및 장치 |
MX2011012250A (es) * | 2009-05-19 | 2012-03-07 | Nokia Corp | Procedimiento y aparato para la codificacion de longitud variable. |
JP5445829B2 (ja) * | 2009-05-29 | 2014-03-19 | ソニー株式会社 | 受信装置、受信方法、およびプログラム、並びに受信システム |
CN101854179B (zh) * | 2010-05-26 | 2012-09-05 | 厦门大学 | 一种应用于ldpc译码的5比特量化方法 |
JP5556570B2 (ja) * | 2010-10-13 | 2014-07-23 | 富士通株式会社 | 信号処理回路及び受信装置 |
CN102164023A (zh) | 2011-03-31 | 2011-08-24 | 复旦大学 | 自适应动态量化ldpc码译码方法 |
CN102545913B (zh) | 2012-02-07 | 2015-05-27 | 中兴通讯股份有限公司 | 一种迭代译码方法及系统 |
US8954820B2 (en) * | 2012-02-10 | 2015-02-10 | Stec, Inc. | Reduced complexity non-binary LDPC decoding algorithm |
CN103873068A (zh) * | 2012-12-14 | 2014-06-18 | 咏传电子科技(上海)有限公司 | 低密度奇偶检查的解码方法与电子装置 |
EP3087746B1 (en) * | 2013-12-24 | 2019-07-03 | LG Electronics Inc. | Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals |
CN105049060B (zh) * | 2015-08-14 | 2019-07-30 | 航天恒星科技有限公司 | 一种低密度奇偶码ldpc的译码方法及装置 |
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2015
- 2015-12-14 RU RU2017104492A patent/RU2639687C1/ru active
- 2015-12-14 CN CN201910422614.1A patent/CN110289863B/zh active Active
- 2015-12-14 CN CN201580081494.3A patent/CN107852175B/zh active Active
- 2015-12-14 SG SG10201707007QA patent/SG10201707007QA/en unknown
- 2015-12-14 KR KR1020177001722A patent/KR101813132B1/ko active IP Right Grant
- 2015-12-14 WO PCT/CN2015/097284 patent/WO2017063263A1/zh active Application Filing
- 2015-12-14 MX MX2017002213A patent/MX358246B/es active IP Right Grant
- 2015-12-14 SG SG11201700048PA patent/SG11201700048PA/en unknown
- 2015-12-14 RU RU2017142566A patent/RU2688276C2/ru active
- 2015-12-14 EP EP15906145.6A patent/EP3211798B1/en active Active
- 2015-12-14 CA CA2953609A patent/CA2953609C/en active Active
- 2015-12-14 AU AU2015400311A patent/AU2015400311B2/en active Active
- 2015-12-14 KR KR1020177036878A patent/KR102027354B1/ko active IP Right Grant
- 2015-12-14 JP JP2017505615A patent/JP6426272B2/ja active Active
- 2015-12-14 BR BR112017000548-4A patent/BR112017000548B1/pt active IP Right Grant
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2017
- 2017-11-29 AU AU2017268580A patent/AU2017268580B2/en active Active
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2018
- 2018-04-12 US US15/951,182 patent/US10447300B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102957436A (zh) * | 2011-08-17 | 2013-03-06 | 北京泰美世纪科技有限公司 | 一种低密度奇偶校验码译码装置和译码方法 |
US20130055043A1 (en) * | 2011-08-22 | 2013-02-28 | Telex Maglorie Ngatched | Two Low Complexity Decoding Algorithms for LDPC Codes |
US20130061114A1 (en) * | 2011-09-02 | 2013-03-07 | Samsung Electronics Co., Ltd. | Freezing-based ldpc decoder and method |
Also Published As
Publication number | Publication date |
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KR101813132B1 (ko) | 2017-12-28 |
KR20180054518A (ko) | 2018-05-24 |
RU2639687C1 (ru) | 2017-12-21 |
AU2015400311B2 (en) | 2017-11-02 |
WO2017063263A1 (zh) | 2017-04-20 |
KR20170058912A (ko) | 2017-05-29 |
CA2953609A1 (en) | 2017-04-13 |
MX358246B (es) | 2018-08-09 |
RU2017142566A3 (zh) | 2019-02-20 |
MX2017002213A (es) | 2017-09-01 |
CN107852175B (zh) | 2019-05-28 |
BR112017000548A2 (pt) | 2017-11-14 |
AU2017268580A1 (en) | 2017-12-21 |
JP6426272B2 (ja) | 2018-11-21 |
CA2953609C (en) | 2018-01-30 |
SG11201700048PA (en) | 2017-05-30 |
AU2017268580B2 (en) | 2019-06-13 |
KR102027354B1 (ko) | 2019-11-04 |
JP2017534190A (ja) | 2017-11-16 |
EP3211798A1 (en) | 2017-08-30 |
CN110289863A (zh) | 2019-09-27 |
EP3211798B1 (en) | 2019-12-04 |
RU2017142566A (ru) | 2019-02-20 |
CN110289863B (zh) | 2022-04-05 |
US10447300B2 (en) | 2019-10-15 |
EP3211798A4 (en) | 2018-03-14 |
US20180234113A1 (en) | 2018-08-16 |
BR112017000548B1 (pt) | 2023-04-11 |
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AU2015400311A1 (en) | 2017-04-27 |
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