CN107749420A - 一种逆阻型igbt - Google Patents

一种逆阻型igbt Download PDF

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CN107749420A
CN107749420A CN201711155364.7A CN201711155364A CN107749420A CN 107749420 A CN107749420 A CN 107749420A CN 201711155364 A CN201711155364 A CN 201711155364A CN 107749420 A CN107749420 A CN 107749420A
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CN107749420B (zh
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罗小蓉
刘庆
魏杰
黄琳华
苏伟
魏雨夕
李聪
曾莉尧
曹厚华
莫日华
孙燕
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University of Electronic Science and Technology of China
Guangdong Electronic Information Engineering Research Institute of UESTC
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
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    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
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Abstract

本发明属于功率半导体技术领域，涉及一种逆阻型IGBT。本发明的正向电场截至层N1不是连续的电场截止层，且P+集电区和漂移区被N1阻隔，紧邻两相邻P+集电区之间的漂移区背面形成与集电极电气相连的场板。器件的发射极端包含反向电场截止层N2和槽结构。施加反向偏压时，与集电极电气相连的场板将不连续的集电结耗尽线在漂移区中合并起来，在没有完全耗尽高浓度N1时，耗尽区可在漂移区内扩展，避免集电结发生击穿，实现很好的反向阻断能力。相比于也具有反向耐压的NPT型IGBT，施加正向阻断电压时，N1和与集电极电气相连的场板共同作用，使正向电场被截止，在N1、N2和槽结构共同作用下，缩短漂移区长度，实现导通压降和关断损耗更好的折中特性。

Description

一种逆阻型IGBT
技术领域
本发明属于功率半导体技术领域，涉及一种逆阻型IGBT(Insulated GateBipolar Transistor，绝缘栅双极型晶体管)。
背景技术
基于矩阵变换器交流-交流(AC-AC)应用领域备，具有双向对称阻断能力的逆阻型IGBT，不仅消除了传统IGBT因需要外串联高压二极管来实现反向耐压的困扰，进而减少了电路系统中所需的元器件的数量、缩小了电路系统的体积；同时也消除了外部高压二极管带来的额外导通能量损耗。逆阻型IGBT正因其具备正反耐压的独特优势，目前已成为矩阵逆变器中的核心元件。
逆阻型IGBT器件在承受反向耐压时，若耗尽线扩展至划片区，会使得泄露电流急剧增大，引起器件耐压能力的退化。故目前对逆阻型IGBT器件的发展仍主要针对终端区的优化，而器件的元胞区结构仍为NPT型IGBT。
NPT型IGBT能实现双向耐压，但其较大的漂移区厚度，使得在正向导通状态下，增大了其正向导通压降，引起正向导通损耗增加；同时在关断状态下，厚的漂移区不能被全耗尽，底部非耗尽区内的载流子只能依靠自身的复合，引起较大的拖尾电流，同时增大关断能量损耗，最终带来器件的导通压降和关断损耗折中性能退化。常规FS结构可有效缩短漂移区厚度，但反向阻断条件下，底部较高浓度的FS层与高浓度的P+集电区形成的反偏结容易产生高电场峰值，引起器件发生提前击穿，无法满足双向耐压场合的应用需求。
发明内容
本发明所要解决的，是针对上述问题提出一种逆阻型IGBT。
本发明的技术方案是：一种逆阻型IGBT，包括N型高阻区，其特征在于，在N型高阻区上表面中部具有第二N型区6，位于第二N型区6上表面的P阱1，并列位于P阱1上表面的N型发射区2和P型接触区3；其中N型发射区2和P型接触区3相互独立，其共同引出端为发射极；N型高阻区上表面两侧具有两个对称的沟槽，与N型发射区2接触的沟槽为槽栅4，槽栅4包含位于槽内壁的第一绝缘介质层41和由第一绝缘介质层41包围的第一导电材料42，由槽栅4中的第一导电材料42引出栅电极；与P型接触区3接触的沟槽为槽结构5，槽结构5包含位于槽内壁的第二绝缘介质层51和由第二绝缘介质层51包围的第二导电材料52；
在N型高阻区下层，具有间隔分布的多个第一N型层7，在每个第一N型层7的下层具有P型区8，P型区8和N型高阻区被第一N型层7阻隔；其中P型区8的掺杂浓度高于N型高阻区的掺杂浓度；在N型高阻区下表面，两相邻的P型区8之间具有第三绝缘介质层9，所述第三绝缘介质层9与P型区8相接触；所述P型区8引出端为集电极，且集电极覆盖于第三绝缘介质层9上。
进一步的，所述第二导电材料52与发射极电气相连；
进一步的，第二导电材料52不与任何电极有电气相连，槽结构5为电位浮空的沟槽结构。
本发明的有益效果为，相对于FS型IGBT本发明可实现正反同等的高耐压能力，相对于NPT型IGBT，本发明可在更薄的漂移区下双向耐压，同时获得导通压降和关断损耗的良好折中。
附图说明5
图1是实施例1的结构示意图；
图2是实施例2的结构示意图；
具体实施方式6
下面结合附图和实施例，详细描述本发明的技术方案：
实施例1，如图1所示，本例为一种逆阻型IGBT，包括N型高阻区，在N型高阻区上表面中部具有第二N型区6，位于第二N型区6上表面的P阱1，并列位于P阱1上表面的N型发射区2和P型接触区3；其中N型发射区2和P型接触区3相互独立，其共同引出端为发射极；N型高阻区上表面两侧具有两个对称的沟槽，与N型发射区2接触的沟槽为槽栅4，槽栅4包含位于槽内壁的第一绝缘介质层41和由第一绝缘介质层41包围的第一导电材料42，由槽栅4中的第一导电材料42引出栅电极；与P型接触区3接触的沟槽为槽结构5，槽结构5包含位于槽内壁的第二绝缘介质层51和由第二绝缘介质层51包围的第二导电材料52，第二导电材料52与发射极电气相连；
在N型高阻区下层，具有间隔分布的多个第一N型层7，在每个第一N型层7的下层具有P型区8，P型区8和N型高阻区被第一N型层7阻隔；其中P型区8的掺杂浓度高于N型高阻区的掺杂浓度；在N型高阻区下表面，两相邻的P型区8之间具有第三绝缘介质层9，所述第三绝缘介质层9与P型区8相接触；所述P型区8引出端为集电极，且集电极覆盖于第三绝缘介质层9上。
本例的工作原理为：
对新结构施加反向偏压时，与集电极电气相连的场板将不连续的集电结耗尽线在漂移区中合并起来，在没有完全耗尽高浓度N1时，耗尽区可在低浓度的漂移区内扩展，避免集电结发生提前击穿，最终反向耐压电场被与槽结构、槽栅及N2共同截至，实现好的反向阻断能力；对新结构施加正向阻断电压时，N1和与发射极电气相连场板共同作用，使正向电场被截止。最终实现缩短器件漂移区长度，获得正导通压降和关断损耗的更好的折中特性。
实施例2
如图2所示，本例为一种逆阻型IGBT。本例与实施例1的不同之处在于，所述槽结构5中的导电材料52与任何电极均不电气相接，槽结构5为电位浮空的槽结构。在正向阻断状态下，浮空的槽结构5内诱生出负电势，可辅助耗尽N2层，降低N2层和P阱结之间形成的反偏结电场峰值，进一步提高正向阻断电压。

Claims (3)

1.一种逆阻型IGBT，包括N型高阻区，其特征在于，在N型高阻区上表面中部具有第二N型区(6)，位于第二N型区(6)上表面的P阱(1)，并列位于P阱(1)上表面的N型发射区(2)和P型接触区(3)；其中N型发射区(2)和P型接触区(3)相互独立，其共同引出端为发射极；N型高阻区上表面两侧具有两个对称的沟槽，与N型发射区(2)接触的沟槽为槽栅(4)，槽栅(4)包含位于槽内壁的第一绝缘介质层(41)和由第一绝缘介质层(41)包围的第一导电材料(42)，由槽栅(4)中的第一导电材料(42)引出栅电极；与P型接触区(3)接触的沟槽为槽结构(5)，槽结构(5)包含位于槽内壁的第二绝缘介质层(51)和由第二绝缘介质层(51)包围的第二导电材料(52)；
在N型高阻区下层，具有间隔分布的多个第一N型层(7)，在每个第一N型层(7)的下层具有P型区(8)，P型区(8)和N型高阻区被第一N型层(7)阻隔；其中P型区(8)的掺杂浓度高于N型高阻区掺杂浓度；在N型高阻区下表面，两相邻的P型区(8)之间具有第三绝缘介质层(9)，所述第三绝缘介质层(9)与P型区(8)相接触；所述P型区(8)引出端为集电极，且集电极覆盖于第三绝缘介质层(9)上。
2.根据权利要求1所述的逆阻型IGBT，其特征在于，所述第二导电材料(52)与发射极电气相连。
3.根据权利要求1所述的逆阻型IGBT，其特征在于，第二导电材料(52)不与任何电极有电气相连，槽结构(5)为电位浮空的沟槽结构。
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CN110676314A (zh) * 2019-10-23 2020-01-10 广东美的白色家电技术创新中心有限公司 一种绝缘栅双极型晶体管、功率模块及生活电器
CN113964194A (zh) * 2021-09-03 2022-01-21 西安电子科技大学 一种具有高双向阻断及超低损耗性能的igbt器件

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US20070120215A1 (en) * 2005-11-30 2007-05-31 Chong-Man Yun Power semiconductor device using silicon substrate as field stop layer and method of manufacturing the same
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110676314A (zh) * 2019-10-23 2020-01-10 广东美的白色家电技术创新中心有限公司 一种绝缘栅双极型晶体管、功率模块及生活电器
CN113964194A (zh) * 2021-09-03 2022-01-21 西安电子科技大学 一种具有高双向阻断及超低损耗性能的igbt器件

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