CN113964194A - 一种具有高双向阻断及超低损耗性能的igbt器件 - Google Patents
一种具有高双向阻断及超低损耗性能的igbt器件 Download PDFInfo
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Abstract
本发明公开了一种具有高双向阻断及超低损耗性能的IGBT器件,所述器件包括:第一集电极金属、短路集电极场板、集电极P+区、高掺杂N1区、N漂移区、沟槽发射极、沟槽栅极、高掺杂n‑cs层、P体区、P+注入区、N+注入区和第二集电极金属。本发明能够降低器件的关断损耗、降低电容大小、提高反向击穿电压及提高正向击穿电压。
Description
技术领域
本发明属于半导体技术领域,具体涉及一种具有高双向阻断及超低损耗性能的IGBT器件。
背景技术
IGBT(Insulated Gate Bipolar Transistor,绝缘栅双极型晶体管)是功率半导体器件的一种,其在结构上几乎集成了半导体器件所有的基本结构,如BJT(BipolarJunction Transistor,双极结型晶体管)、SCR(Silicon Controlled Rectifier,可控硅整流器)、二极管、JFET(Junction Field-Effect Transistor,结型场效应晶体管)、MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor,金氧半场效晶体管),通常随着IGBT的结构参数变化,其性能会发生相应的变化。
相较于普通的IGBT结构,现有技术提出了FS-IGBT(field stop,场停止区)结构。具体的,所述FS-IGBT结构通过在n型漂移区和p型集电区之间加入一个高掺杂的n+型缓冲层,使得器件在反向阻断时,电场在n+型缓冲层迅速减小到零,而在n型漂移区中缓慢下降,提高漂移区的电导率,从而可以减小漂移区厚度以达到相同的击穿电压。
然而,FS-IGBT结构在正向阻断时,由于n+型缓冲层和p型集电区的pn结易被击穿,会导致器件的正向阻断电压降低,因此,FS-IGBT结构不具备双向耐压能力,且器件的关断损耗较高。
发明内容
为了解决现有技术中存在的上述问题,本发明提供了一种具有高双向阻断及超低损耗性能的IGBT器件。本发明要解决的技术问题通过以下技术方案实现:
一种具有高双向阻断及超低损耗性能的IGBT器件,所述器件包括:第一集电极金属、短路集电极场板、集电极P+区、高掺杂N1区、N漂移区、沟槽发射极、沟槽栅极、高掺杂n-cs层、P体区、P+注入区、N+注入区和第二集电极金属;其中,所述第一电极金属上方设置有凹陷区域;所述短路集电极场板位于所述第一集电极金属上方的凹陷区域内;所述集电极P+区包括第一集电极P+区和第二集电极P+区;所述第一集电极P+区位于所述第一集电极金属上方左侧,所述第二集电极P+区位于所述第一集电极金属上方右侧;所述高掺杂N1区包括第一高掺杂N1区和第二高掺杂N1区;所述第一高掺杂N1区覆盖在所述第一集电极P+区的右侧和上方,所述第二高掺杂N1区覆盖在所述第二集电极P+区的左侧和上方;所述N漂移区位于所述短路集电极场板和所述高掺杂N1区上方;所述沟槽栅极呈L型结构,位于所述N漂移区上方的左侧;所述沟槽发射极呈L型结构,位于所述N漂移区上方的右侧;其中,所述沟槽栅极L型结构和所述沟槽发射极L型结构的凹陷区域朝向器件内侧;所述高掺杂n-cs层位于所述N漂移区上方以及所述沟槽发射极的L型结构和所述沟槽栅极的L型结构的中间;所述P体区位于所述高掺杂n-cs层上方;所述N+注入区和所述P+注入区位于所述P体区上,以及所述N+注入区位于所述P+注入区的左侧;所述第二集电极金属位于所述P+注入区和所述N+注入区上方。
在本发明的一个实施例中,所述短路集电极场板为绝缘介质层,且与集电极P+区相接触。
在本发明的一个实施例中,所述沟槽栅极覆盖所述高掺杂n-cs层、所述P体区、所述N+注入区的左侧,以及所述高掺杂n-cs层下方的左侧部分区域;所述沟槽发射极覆盖所述高掺杂n-cs层、所述P体区、所述P+注入区的右侧,以及所述高掺杂n-cs层下方的右侧部分区域。
本发明的有益效果:
1、本发明中短路集电极场板(Shorted Collector Field PlateSCFP)结构与集电极短接为低电位,因此,在反向阻断时,高掺杂N1区与集电极P+构成的PN结会发生反偏,随着反向电压的增加,该PN结的耗尽区会继续延伸,进一步地,由于短路集电极场板作用能够使左右两侧的该PN结耗尽区合并,进而发生垂直向上延伸,从而由N漂移区的耗尽区承受反向耐压,以提高反向击穿电压。
2、本发明在器件关断没有电子沟道时,能够令与集电极短接的短路集电极场板为高电位,此时电子容易被吸引到短路集电极场板上方造成电子积累,形成低电阻的电子积累薄层,从而使N漂移区的电子更容易被低阻通道抽取,从而降低器件的关断损耗(Eoff)。
3、本发明在反向阻断时,沟槽栅和沟槽发射极能够阻止电场的延伸,避免P体区和高掺杂n-cs层构成的的PN结发生击穿,得到高的反向击穿电压,从而允许高掺杂N1区高掺,增强载流子存储效应,从而得到低的导通压降,此时的沟槽栅能够在极短的时间达到相同的性能要求,从而降低电容大小。
4、本发明中的高掺杂n-cs层作为空穴势垒,其与沟槽栅和沟槽发射极结合,能够增加在被沟槽包围的高掺杂n-cs层下的电子空穴对数量,增加电导调制效应,降低电阻,进一步降低器件关断损耗。
5、本发明在正向阻断时,高掺杂N1区与FS层的阻止电场能力相同,即,高掺杂N1区能够作为FS层,因此,高掺杂N1区和短路集电极场板能够一起阻止电场的延伸,提高正向击穿电压。
以下将结合附图及实施例对本发明做进一步详细说明。
附图说明
图1是本发明实施例提供的一种具有高双向阻断及超低损耗性能的IGBT器件结构示意图;
图2a-2g是本发明实施例提供的一种具有高双向阻断及超低损耗性能的IGBT器件的工艺示意图。
附图标记说明:
第一集电极金属1、短路集电极场板2、第一集电极P+区31、第二集电极P+区32、第一高掺杂N1区41、第二高掺杂N1区42、N漂移区5、沟槽发射极6、沟槽栅极7、高掺杂n-cs层8、P体区9、P+注入区10、N+注入区11、第二集电极金属12、第一PN结13、第二PN结14。
具体实施方式
下面结合具体实施例对本发明做进一步详细的描述,但本发明的实施方式不限于此。
实施例一
请参见图1,图1是本发明实施例提供的一种具有高双向阻断及超低损耗性能的IGBT器件结构示意图,所述器件包括:
第一集电极金属1、短路集电极场板2、集电极P+区、高掺杂N1区、N漂移区5、沟槽发射极6、沟槽栅极7、高掺杂n-cs层8、P体区9、P+注入区10、N+注入区11和第二集电极金属12。
可选的,所述第一电极金属上方设置有凹陷区域。
可选的,所述短路集电极场板(SCFP)2位于所述第一集电极金属1上方的凹陷区域内。
可选的,所述短路集电极场板2为绝缘介质层,且与集电极P+区相接触。
可选的,所述集电极P+区包括第一集电极P+区31和第二集电极P+区32;所述第一集电极P+区31位于所述第一集电极金属1上方左侧,所述第二集电极P+区32位于所述第一集电极金属1上方右侧。
可选的,所述高掺杂N1区包括第一高掺杂N1区41和第二高掺杂N1区42;所述第一高掺杂N1区41覆盖在所述第一集电极P+区31的右侧和上方,所述第二高掺杂N1区42覆盖在所述第二集电极P+区32的左侧和上方。
需要说明的是,所述集电极P+区和高掺杂N1区之间有第一PN结13,即,第一集电极P+区31和第一高掺杂N1区41之间有位于器件左侧的第一PN结13,第二集电极P+区32和第二高掺杂N1区42有位于器件右侧的第一PN结13。
高掺杂N1区中的第一高掺杂N1区41和第二高掺杂N1区42不相接触,又称高掺杂不连续N1区。
可选的,所述N漂移区(N-drift)5位于所述短路集电极场板2和所述高掺杂N1区上方。
本发明在反向阻断时,短路集电极场板2能够与集电极P+区短接为低电位,从而高掺杂N1区与集电极P+区的第一PN结13发生反偏,随着反向电压的增加,第一PN结13的耗尽区继续延伸,由于短路集电极场板2的作用可使左右两边的第一PN结13的耗尽区合并,且垂直向上延伸,由N漂移区5的耗尽区承受反向耐压,从而提高了反向击穿电压。
本发明在器件关断没有电子沟道时,令与集电极P+区短接的短路集电极场板2为高电位,此时电子容易被吸引到短路集电极场板2上方造成电子积累,形成低电阻的电子积累薄层,从而使N漂移区5的电子更容易被低阻通道抽取,可降低器件的关断损耗(Eoff)。
可选的,所述沟槽栅极(Emitter)7呈L型结构,位于所述N漂移区5上方的左侧;所述沟槽发射极(Gate)6呈L型结构,位于所述N漂移区5上方的右侧;其中,所述沟槽栅极L型结构和所述沟槽发射极L型结构的凹陷区域朝向器件内侧。
可选的,所述沟槽栅和所述沟槽发射极6覆盖有绝缘介质层。
本发明沟槽栅和沟槽发射极6被绝缘介质层包裹,能够在反向阻断的时候,阻止电场线的延伸,避免第二PN结发生击穿,从而能够得到较高的反向击穿电压。
可选的,所述高掺杂n-cs层8位于所述N漂移区5上方以及所述沟槽发射极6的L型结构和所述沟槽栅极7的L型结构的中间。
可选的,所述P体区(P-body)9位于所述高掺杂n-cs层8上方。
需要说明的是,所述P体区9与所述高掺杂n-cs层8之间有第二PN结14。
本发明中,沟槽栅、沟槽发射极6和高掺杂n-cs层8之间能够形成了一个PNM(partially narrow mesa)结构,该PNM结构能够有效阻止电场把第二PN结击穿,从而增加了n-cs层的掺杂浓度,降低了导通压降。同时,相比于现有技术中垂直沟槽的结构,本实施例的沟槽栅和沟槽发射极6可以较短,略深于高掺杂n-cs层8即可,便能达到相同的击穿电压,从而降低电容大小。
本发明中所述高掺杂n-cs层8能够作为空穴势垒,与沟槽栅和沟槽发射极6结合,能够增加在被沟槽包围的高掺杂n-cs层8下的电子空穴对数量,增加电导调制效应,降低电阻,降低器件关断损耗。
可选的,所述N+注入区11和所述P+注入区10位于所述P体区9上,以及所述N+注入区11位于所述P+注入区10的左侧。
可选的,所述第二集电极金属12位于所述P+注入区10和所述N+注入区11上方。
可选的,所述沟槽栅极7覆盖所述高掺杂n-cs层8、所述P体区9、所述N+注入区11的左侧,以及所述高掺杂n-cs层8下方的左侧部分区域;所述沟槽发射极6覆盖所述高掺杂n-cs层8、所述P体区9、所述P+注入区10的右侧,以及所述高掺杂n-cs层8下方的右侧部分区域。
可选的,所述集电极金属的厚度0.3um-1um,宽度为3um-5um。
可选的,所述短路集电极场板2的厚度为0.1um-0.5um,宽度为1um-2um。
可选的,所述集电极P+区的厚度为1um-2um,宽度为1um-1.5um,掺杂浓度为1×1017cm-3-1×1018cm-3。
可选的,所述高掺杂N1区垂直方向的长度为1um-3um,水平方向的长度为1.7-2.2um,掺杂浓度为3×1016cm-3-1×1018cm-3。
需要说明的是,高掺杂N1区的浓度相对于集电极P+区的浓度为轻掺杂,以便第一PN结13反偏时,耗尽区向N漂移区5延伸。
可选的,所述N漂移区5宽度为3um-5um,掺杂浓度为5×1012cm-3-3×1014cm-3,所述N漂移区5中最厚区域对应的厚度为60um-70um。
参见图1,所述最厚区域指的是高掺杂n-cs层8下方至短路集电极场板2上方。
可选的,所述沟槽发射极6垂直方向的长度为7um-9um,水平方向的长度为1.1um-2.1um;所述沟槽栅极7垂直方向的长度为7um-9um,水平方向的长度为1.1um-2.1um。
可选的,所述高掺杂n-cs层8的厚度为1.5um-2.5um,宽度为1um-2um,掺杂浓度为6×1017cm-3-1×1019cm-3;所述P体区9的厚度为3um-4um,宽度为1um-2um,掺杂浓度为1×1017cm-3-3×1018cm-3;所述P+注入区10的厚度为1um-3um,掺杂浓度为1×1017cm-3-1×1018cm-3,宽度为0.7um-1.5um;所述N+注入区11的厚度为1um-3um,掺杂浓度为2×1017cm-3-1×1018cm-3,宽度为0.3um-0.5um。
可选的,所述第二集电极金属12的厚度为0.3um-1um,宽度为0.6um-1.3um。
综上,1、本发明中短路集电极场板2(Shorted Collector Field Plate,SCFP)结构与集电极短接为低电位,因此,在反向阻断时,高掺杂N1区与集电极P+之间构成的PN结会发生反偏,随着反向电压的增加,该PN结的耗尽区会继续延伸,进一步地,由于短路集电极场板2作用能够使左右两侧的该PN结耗尽区合并,进而发生垂直向上延伸,从而由N漂移区5的耗尽区承受反向耐压,以提高反向击穿电压。
2、本发明在器件关断没有电子沟道时,能够令与集电极短接的短路集电极场板2为高电位,此时电子容易被吸引到短路集电极场板2上方造成电子积累,形成低电阻的电子积累薄层,从而使N漂移区5的电子更容易被低阻通道抽取,从而降低器件的关断损耗(Eoff)。
3、本发明在反向阻断时,沟槽栅和沟槽发射极6能够阻止电场的延伸,避免P体区9和高掺杂n-cs层8构成的的PN结发生击穿,得到高的反向击穿电压,从而允许高掺杂N1区高掺,增强载流子存储效应,从而得到低的导通压降,此时的沟槽栅能够在极短的时间达到相同的性能要求,从而降低电容大小。
4、本发明中的高掺杂n-cs层8作为空穴势垒,其与沟槽栅和沟槽发射极6结合,能够增加在被沟槽包围的高掺杂n-cs层8下的电子空穴对数量,增加电导调制效应,降低电阻,进一步降低器件关断损耗。
5、本发明在正向阻断时,高掺杂N1区与FS层的阻止电场能力相同,即,高掺杂N1区能够作为FS层,因此,高掺杂N1区和短路集电极场板2能够一起阻止电场的延伸,提高正向击穿电压。
实施例二
请参见图2a-2g,图2a-2g是本发明实施例提供的一种具有高双向阻断及超低损耗性能的IGBT器件的工艺示意图,该制备方法包括如下步骤:
步骤1:基于预置衬底表面形成N型外延层。
参见图2a。
步骤2:基于光刻刻蚀工艺在所述N型外延层中形成沟槽栅极和沟槽发射极,并在所述沟槽栅极和沟槽发射极周围形成介电层。
参见图2b。
所述介电层为绝缘介质层。
步骤3:在所述沟槽栅极和沟槽发射极中形成高掺杂n-cs层和P体区。
参见图2c。
步骤4:在所述P体区上形成N+注入区和P+注入区,其中,高掺杂n-cs层下方的所述N型外延层构成N漂移区。
参见图2d。
步骤5:对半导体衬底进行背面减薄处理,并通过离子注入处理形成高掺杂N1区。
参见图2e。
步骤6:对高掺杂N1区进行P型重掺杂的背面离子注入处理,以形成集电极P+区,并形成短路集电极场板。
参见图2f。
步骤7:在所述集电极P+区和所述短路集电极场板下方形成第一集电极金属;以及在所述N+注入区和P+注入区上方形成第二集电极金属。
参见图2g。
在本发明的描述中,需要理解的是,术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。
此外,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本发明的描述中,“多个”的含义是两个或两个以上,除非另有明确具体的限定。
在本发明中,除非另有明确的规定和限定,第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触,也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且,第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方,或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方,或仅仅表示第一特征水平高度小于第二特征。
在本说明书的描述中,参考术语“一个实施例”、“一些实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本发明的至少一个实施例或示例中。在本说明书中,对上述术语的示意性表述不必须针对的是相同的实施例或示例。而且,描述的具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。此外,本领域的技术人员可以将本说明书中描述的不同实施例或示例进行接合和组合。
尽管在此结合各实施例对本申请进行了描述,然而,在实施所要求保护的本申请过程中,本领域技术人员通过查看所述附图、公开内容、以及所附权利要求书,可理解并实现所述公开实施例的其他变化。在权利要求中,“包括”(comprising)一词不排除其他组成部分或步骤,“一”或“一个”不排除多个的情况。单个处理器或其他单元可以实现权利要求中列举的若干项功能。相互不同的从属权利要求中记载了某些措施,但这并不表示这些措施不能组合起来产生良好的效果。
以上内容是结合具体的优选实施方式对本发明所作的进一步详细说明,不能认定本发明的具体实施只局限于这些说明。对于本发明所属技术领域的普通技术人员来说,在不脱离本发明构思的前提下,还可以做出若干简单推演或替换,都应当视为属于本发明的保护范围。
Claims (10)
1.一种具有高双向阻断及超低损耗性能的IGBT器件,其特征在于,所述器件包括:第一集电极金属、短路集电极场板、集电极P+区、高掺杂N1区、N漂移区、沟槽发射极、沟槽栅极、高掺杂n-cs层、P体区、P+注入区、N+注入区和第二集电极金属;其中,
所述第一电极金属上方设置有凹陷区域;
所述短路集电极场板位于所述第一集电极金属上方的凹陷区域内;
所述集电极P+区包括第一集电极P+区和第二集电极P+区;所述第一集电极P+区位于所述第一集电极金属上方左侧,所述第二集电极P+区位于所述第一集电极金属上方右侧;
所述高掺杂N1区包括第一高掺杂N1区和第二高掺杂N1区;所述第一高掺杂N1区覆盖在所述第一集电极P+区的右侧和上方,所述第二高掺杂N1区覆盖在所述第二集电极P+区的左侧和上方;
所述N漂移区位于所述短路集电极场板和所述高掺杂N1区上方;
所述沟槽栅极呈L型结构,位于所述N漂移区上方的左侧;
所述沟槽发射极呈L型结构,位于所述N漂移区上方的右侧;其中,所述沟槽栅极L型结构和所述沟槽发射极L型结构的凹陷区域朝向器件内侧;
所述高掺杂n-cs层位于所述N漂移区上方以及所述沟槽发射极的L型结构和所述沟槽栅极的L型结构的中间;
所述P体区位于所述高掺杂n-cs层上方;
所述N+注入区和所述P+注入区位于所述P体区上,以及所述N+注入区位于所述P+注入区的左侧;
所述第二集电极金属位于所述P+注入区和所述N+注入区上方。
2.根据权利要求1所述的器件,其特征在于,所述短路集电极场板为绝缘介质层,且与集电极P+区相接触。
3.根据权利要求1所述的器件,其特征在于,所述沟槽栅极覆盖所述高掺杂n-cs层、所述P体区、所述N+注入区的左侧,以及所述高掺杂n-cs层下方的左侧部分区域;
所述沟槽发射极覆盖所述高掺杂n-cs层、所述P体区、所述P+注入区的右侧,以及所述高掺杂n-cs层下方的右侧部分区域。
4.根据权利要求1所述的器件,其特征在于,所述集电极金属的厚度0.3um-1um,宽度为3um-5um。
5.根据权利要求1所述的器件,其特征在于,所述短路集电极场板的厚度为0.1um-0.5um,宽度为1um-2um。
6.根据权利要求1所述的器件,其特征在于,所述集电极P+区的厚度为1um-2um,宽度为1um-1.5um,掺杂浓度为1×1017cm-3-1×1018cm-3。
7.根据权利要求1所述的器件,其特征在于,所述高掺杂N1区垂直方向的长度为1um-3um,水平方向的长度为1.7-2.2um,掺杂浓度为3×1016cm-3-1×1018cm-3。
8.根据权利要求1所述的器件,其特征在于,所述N漂移区宽度为3um-5um,掺杂浓度为5×1012cm-3-3×1014cm-3,所述N漂移区中最厚区域对应的厚度为60um-70um。
9.根据权利要求1所述的器件,其特征在于,所述沟槽发射极垂直方向的长度为7um-9um,水平方向的长度为1.1um-2.1um;
所述沟槽栅极垂直方向的长度为7um-9um,水平方向的长度为1.1um-2.1um。
10.根据权利要求1所述的器件,其特征在于,所述高掺杂n-cs层的厚度为1.5um-2.5um,宽度为1um-2um,掺杂浓度为6×1017cm-3-1×1019cm-3;
所述P体区的厚度为3um-4um,宽度为1um-2um,掺杂浓度为1×1017cm-3-3×1018cm-3;
所述P+注入区的厚度为1um-3um,掺杂浓度为1×1017cm-3-1×1018cm-3,宽度为0.7um-1.5um;
所述N+注入区的厚度为1um-3um,掺杂浓度为2×1017cm-3-1×1018cm-3,宽度为0.3um-0.5um;
所述第二集电极金属的厚度为0.3um-1um,宽度为0.6um-1.3um。
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