CN107658266A - 用于包含触发电压可调式叠接晶体管的esd保护电路的方法 - Google Patents

用于包含触发电压可调式叠接晶体管的esd保护电路的方法 Download PDF

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CN107658266A
CN107658266A CN201710594433.8A CN201710594433A CN107658266A CN 107658266 A CN107658266 A CN 107658266A CN 201710594433 A CN201710594433 A CN 201710594433A CN 107658266 A CN107658266 A CN 107658266A
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李建兴
马哈德瓦尔·纳塔拉恩
曼约纳塔·普拉布
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Abstract

本发明涉及用于包含触发电压可调式叠接晶体管的ESD保护电路的方法。具体实施例包括提供包括相邻第一类型井区的衬底,在该衬底上方,各对第一类型井区由第二类型井区所分开;提供位在各第一与第二类型井区中的一或多个接面区,各接面区属于第一类型或第二类型;形成彼此相隔、垂直于该第一与第二类型接面区并位在其上方的鳍片;以及通过在该第一类型井区中的该第一和第二类型接面区与该衬底之间形成电连接来形成接面类型装置,其中第一类型井区中的第一级接面类型装置包括堆叠的第一与第二类型接面区,以及其中该第一级接面类型装置是包括第一与第二类型接面区的相邻第二类型井区。

Description

用于包含触发电压可调式叠接晶体管的ESD保护电路的方法
技术领域
本发明大体上关于设计及制作集成电路(IC)装置。本发明尤其适用于形成静电放电(ESD)保护电路,用于7纳米(nm)技术节点及更先进的技术节点中的鳍式场效晶体管(FinFET)IC装置。
背景技术
大体上,IC装置包括用于使可能在装置的制作、装卸、或正常使用期间出现的ESD事件所造成的高电流转向及放电的ESD保护电路。若无ESD保护电路,高电流可能会破坏IC装置中的电路。先进的IC装置可利用FinFET技术来提升组件密度,而此等组件中的元件(例如:硅鳍)可能更小,也可能对诸如操作电压、输入电流、ESD应力、制作程序等操作条件中的变异更加敏感。若无有效果的ESD保护电路,FinFET装置可能容易损坏,而且无法符合要求的ESD规格。传统的ESD电路可能缺乏效率(例如:需要的硅面积更大)、受限于固定操作电压,或可能在提供充分保护方面无效(例如:2kV人体模型ESD规格测试未通过)。
二极管触发型硅控整流器(SCR)是用于FinFET ESD保护的良好候选方案,因为其随着外施电压大于n×0.7V而接通,其中n是用于0.7V倍数(例如:3×0.7V)的系数,此外,还可随着外施电压大于触发电压(Vt1)而箝制住电压。然而,不同应用所需的Vt1通常也不同,而变更装置Vt1会牺牲装置面积。
因此,需要能够就FinFET装置形成有效率且有效果的ESD保护电路的方法以及其产生的装置。
发明内容
本发明的一态样是一种就FinFET IC装置中的ESD保护电路形成触发电压可调式叠接晶体管的方法。
本发明的另一态样是一种就FinFET IC装置具有触发电压可调式叠接晶体管的ESD保护电路。
本发明的附加态样及其它特征将会在以下说明中提出,并且对于审查以下内容的本领域技术人员部分将会显而易见,或可经由实践本发明来学习。可如随附权利要求中特别指出的内容来实现并且获得本发明的优点。
根据本发明,一些技术功效可通过一种方法来部分达成,包括提供包括相邻第一类型井区的衬底,在该衬底上方,各对第一类型井区由第二类型井区所分开;提供位在各第一类型井区与第二类型井区中的一或多个接面区,各接面区属于第一类型或第二类型;形成彼此相隔、垂直于该第一类型接面区与第二类型接面区并位在其上方的鳍片;以及通过在该第一类型井区中的该第一类型接面区和第二类型接面区与该衬底之间形成电连接来形成接面类型装置,其中第一类型井区中的第一级接面类型装置包括堆叠的第一类型接面区与第二类型接面区,以及其中该第一级接面类型装置是包括第一类型接面区与第二类型接面区的相邻第二类型井区。
在一项态样中,该第一类型井区属于n型,并且包括p型接面区与n型接面区。
在另一态样中,该第二类型井区属于p型,并且包括p型接面区或p型接面区与n型接面区。
在进一步态样中,该衬底属于p型,而该接面类型装置包括pnp或npn类型双极晶体管。
在一附加态样中,该接面类型装置包括pn类型二极管。
一项态样包括连接该第二类型井区中的该接面区至电接地。
另一态样包括形成使该第一类型井区与第二类型井区分开的隔离沟槽区域。
在一项态样中,相邻该第一级接面类型装置的第二类型井区包括多个第二类型接面区。
一进一步态样包括基于目标触发电压来设定该第一类型接面区与第二类型接面区之间以及诸相邻第二类型接面区之间的间距。
本发明的另一态样包括一种装置,包括:包括相邻第一类型井区的衬底,在该衬底上方,各对第一类型井区由第二类型井区所分开;位在各第一类型井区与第二类型井区中的一或多个接面区,各接面区属于第一类型或第二类型;彼此相隔、垂直于该第一类型接面区与第二类型接面区并位在其上方的鳍片;以及通过在该第一类型井区中的该第一类型接面区和第二类型接面区与该衬底之间的电连接所形成的接面类型装置,其中第一类型井区中的第一级接面类型装置包括堆叠的第一类型接面区与第二类型接面区,以及其中该第一级接面类型装置是包括第一类型接面区与第二类型接面区的相邻第二类型井区。
在一项态样中,该第一类型井区属于n型,并且包括p型接面区与n型接面区。
在另一态样中,该第二类型井区属于p型,并且包括p型接面区或p型接面区与n型接面区。
在进一步态样中,该衬底属于p型,而该接面类型装置包括pnp或npn类型双极晶体管。
在一附加态样中,该接面类型装置包括pn类型二极管。
另一态样包括该第二类型井区中连至电接地的接面区之间的连接。
在一项态样中,相邻该第一级接面类型装置的第二类型井区包括多个第二类型接面区。
一进一步态样包括该第一类型接面区与第二类型接面区之间以及诸相邻第二类型接面区之间的间距是基于目标触发电压。
本发明的附加态样及技术功效经由以下详细说明对于本领域技术人员将会轻易地变为显而易见,其中本发明的具体实施例单纯地通过经深思用以实行本发明的最佳模式的说明来描述。如将会了解的是,本发明能够是其它及不同的具体实施例,而且其数项细节能够在各种明显方面进行修改,全都不会脱离本发明。因此,附图及说明本质上要视为说明性,而不是作为限制。
附图说明
本发明是在随附图式的附图中举例来说明,但非作为限制,图中相似的附图标记指类似的元件,并且其中:
图1A及1C根据一例示性具体实施例,绘示包括触发电压可调式叠接晶体管的ESD保护电路的布局的俯视图;
图1B根据一例示性具体实施例,绘示图1A及1C的布局的三维视图;以及
图1D根据一例示性具体实施例,绘示用于二极管触发型SCR的等效电路。
具体实施方式
为求明确,在以下说明中,提出许多特定细节以透彻了解例示性具体实施例。然而,应显而易知的是,没有这些特定细节或利用均等配置也可实践例示性具体实施例。在其它实例中,众所周知的结构及装置是以方块图形式来展示,为的是要避免不必要地混淆例示性具体实施例。另外,除非另有所指,本说明书及权利要求中用来表达成分、反应条件等等的量、比率及数值特性的所有数字都要了解为在所有实例中是以“约”一语来修饰。
本发明就基于FinFET的IC装置因应ESD保护电路无效率的问题。本发明因应并解决此类问题所采用的作法举例来说,特别是通过将接地的N+扩散物添加至第一级晶体管,在该第一级中使用更小的多pn二极管而不是长型二极管,通过变更N或P井中P型及/或N型接面区之间的间距来变更N井及P井区的电阻,以及在第一级晶体管中使用更小的多P型接面区而不是长型P型接面区,以提供具有可调式ESD触发电压的ESD电路,但不用增加IC装置尺寸。
单纯地通过所思最佳模式的描述,还有其它态样、特征、以及技术功效经由下文的详细说明对于本领域技术人员将显而易知,其中表示并且说明的是较佳具体实施例。本发明能够是其它及不同的具体实施例,而且其数项细节能够在各种明显方面进行修改。因此,附图及说明本质上要视为说明性,而不是作为限制。
图1A绘示包括相邻第一类型井区103(例如:n井)的衬底101(例如:p型),在该衬底上方,各对第一类型井区103通过第二类型井区105(例如:p井)所分开。各第一或第二类型井区103/105可包括一或多个第一类型接面区107及/或第二类型接面区109。第一类型井区103可属于n型,并且包括p型与n型接面区107/109。第二类型井区105可属于p型,并且包括p型接面区107或p型与n型接面区107/109。如图所示,第一类型井区103a可包括各第一与第二类型接面区107a及109a其中的一或多者,其可按照与其它第一类型井区103中的接面区107/109(例如:彼此相邻)不同的方式来组配(例如:堆叠)。相邻的第一与第二类型井区103/105通过以介电材料(例如:二氧化硅)填充的隔离沟槽区域111所分开。
可形成彼此相隔、以及垂直于该第一与第二类型接面区107/109并位在该等接面区上方的鳍片113。可通过形成介于第一类型井区103中的第一和第二类型接面区107/109与衬底101之间的电连接来形成接面类型装置115a、115b及115c。接面类型装置包括PNP及/或NPN类型双极晶体管。第二类型井区105中的接面区107及/或109可连接至电接地。
图1B绘示图1A的布局的三维视图,其包括PNP装置115a、115b与115c、以及NPN装置117。还绘示的是与装置115相关联的p井电阻等效件(Rpw)119、n井电阻等效件(Rnw)121以及衬底电阻等效件123。在点位A与B之间,Rnw 121与Wpn 124成比例。PNP装置115a至115c其中一者的基极125位在接面区107/109的边缘附近/上,而n型接面区103则位在PNP装置内。通过变更第一与第二类型接面区107/109之间的间距,可变更RNW的值。通过变更诸相邻第二类型接面区109之间的间距,可变更RPW的值。接面区107/109或109/109之间(例如:相邻的第一与第二类型或第二与第二类型之间)的间距若增加,RNW或RPW会分别随之增加。ESD触发电压(Vt1)可通过促使RNW及RPW变更而来调协/变更,如参阅图1D的阐释。
如图1C所示,第一类型井区103a包括多个更小的第一与第二类型接面区107a及109a,其堆叠于交替位置,用以形成第一级接面类型装置115a。在第一级中,第二类型井区105a包括相邻第一类型接面区107的多个更小的第二类型接面区109a。如以上所述的布局及电路系统提供可调式ESD触发电压,但不需要增加面积也能在IC装置中实施。
图1D就ESD保护绘示二极管触发型SCR的等效电路,其中PNP晶体管115a随着VAnode变为大于2.1V(例如:3×0.7V)而接通。当βIBpnp×RPW>VBnpn(0.7V)时,NPN晶体管接通且本结构进入闩锁状态,其中VBpnp/RPW=ICnpn=βIBpnp、IBpnp=VBpnp/(βRPW)、VAB=IBpnpxRNW=VBpnp×RNW/(βRPW),以及VAnode=Vt1=0.7V×n+VAB=0.7V×n+VBpnp×RNW/(βRPW)。Vt1可通过变更RNW及RPW来调协/变更。
本发明的具体实施例可达到数种技术功效,就基于FinFET的IC装置包括ESD保护电路,其具备具有低突返电压及高电流承受能力的可调式触发电压。该ESD电路的实作态样将不需要任何另外的掩膜或特殊的布局规则。再者,此等具体实施例符合各种产业应用的利用性要求,举例如微处理器、智慧型手机、行动电话、蜂巢式手机、机上盒、DVD录影机与播放器、汽车导航、印表机与周边装置、网路连结与电信设备、游戏系统、数位相机,或其它利用逻辑或高电压技术节点的装置。本发明因此符合各类高整合型半导体装置中任一者的产业利用性,包括使用SRAM胞元的装置(例如:液晶显示器(LCD)驱动器、数位处理器等)。
在前述说明中,本发明参照其具体例示性具体实施例来说明。然而,明显的是,可对其实施各种修改和变更而不脱离本发明较广的精神与范畴,如权利要求所提。本说明书及附图从而要视为说明性而非作为限制。了解的是,本发明能够使用各种其它组合及具体实施例,并且如本文中所表达,能够在本发明概念的范畴内作任何变更或修改。

Claims (20)

1.一种方法,包含:
提供包括相邻第一类型井区的衬底,在该衬底上方,各对第一类型井区由第二类型井区所分开;
提供位在各第一类型井区与第二类型井区中的一或多个接面区,各接面区属于第一类型或第二类型;
形成彼此相隔、垂直于该第一类型接面区与第二类型接面区并位在其上方的鳍片;以及
通过在该第一类型井区中的该第一类型接面区和第二类型接面区与该衬底之间形成电连接来形成接面类型装置,
其中第一类型井区中的第一级接面类型装置包括堆叠的第一类型接面区与第二类型接面区,以及
其中该第一级接面类型装置是包括第一类型接面区与第二类型接面区的相邻第二类型井区。
2.如权利要求1所述的方法,其中:
该第一类型井区属于n型,并且包括p型接面区与n型接面区。
3.如权利要求1所述的方法,其中:
该第二类型井区属于p型,并且包括p型接面区或p型接面区与n型接面区。
4.如权利要求1所述的方法,其中:
该衬底属于p型,而该接面类型装置包括pnp或npn类型双极晶体管。
5.如权利要求1所述的方法,其中:
该接面类型装置包括pn类型二极管。
6.如权利要求1所述的方法,包含:
连接该第二类型井区中的该接面区至电接地。
7.如权利要求1所述的方法,包含:
形成使该第一类型井区与第二类型井区分开的隔离沟槽区域。
8.如权利要求1所述的方法,其中:
相邻该第一级接面类型装置的第二类型井区包括多个第二类型接面区。
9.如权利要求1所述的方法,包含:
基于目标触发电压来设定该第一类型接面区与第二类型接面区之间以及诸相邻第二类型接面区之间的间距。
10.一种装置,包含:
包括相邻第一类型井区的衬底,在该衬底上方,各对第一类型井区由第二类型井区所分开;
位在各第一类型井区与第二类型井区中的一或多个接面区,各接面区属于第一类型或第二类型;
彼此相隔、垂直于该第一类型接面区与第二类型接面区并位在其上方的鳍片;以及
通过在该第一类型井区中的该第一类型接面区和第二类型接面区与该衬底之间的电连接所形成的接面类型装置,
其中第一类型井区中的第一级接面类型装置包括堆叠的第一类型接面区与第二类型接面区,以及
其中该第一级接面类型装置是包括第一类型接面区与第二类型接面区的相邻第二类型井区。
11.如权利要求10所述的装置,其中:
该第一类型井区属于n型,并且包括p型接面区与n型接面区。
12.如权利要求10所述的装置,其中:
该第二类型井区属于p型,并且包括p型接面区或p型接面区与n型接面区。
13.如权利要求10所述的装置,其中:
该衬底属于p型,而该接面类型装置包括pnp或npn类型双极晶体管。
14.如权利要求10所述的装置,其中:
该接面类型装置包括pn类型二极管。
15.如权利要求10所述的装置,包含:
该第二类型井区中连至电接地的接面区之间的连接。
16.如权利要求10所述的装置,其中:
相邻该第一级接面类型装置的第二类型井区包括多个第二类型接面区。
17.如权利要求10所述的装置,包含:
该第一类型接面区与第二类型接面区之间以及诸相邻第二类型接面区之间的间距是基于目标触发电压。
18.一种方法,包含:
提供包括相邻n型井区的p型衬底,在该衬底上方,各对n型井区由p型井区所分开;
提供位在该n型井区中的p型接面区与n型接面区;
提供位在该p型井区中的p型接面区或p型接面区与n型接面区;
形成使该n型井区与p型井区分开的隔离沟槽区域;
形成彼此相隔、垂直于该n型接面区与p型接面区并位在其上方的鳍片;
通过在该n型井区中的该n型接面区和p型接面区与该衬底之间形成电连接来形成接面类型装置,
其中n型井区中的第一级接面类型装置包括堆叠的n型接面区与p型接面区,以及
其中该第一级接面类型装置相邻包括n型接面区与p型接面区的p型井区;以及
连接该p型井区中的该接面区至电接地。
19.如权利要求18所述的方法,其中:
相邻该第一级接面类型装置的p型井区包括多个p型接面区。
20.如权利要求18所述的方法,包含:
基于目标触发电压来设定在该n型接面区与p型接面区之间以及在诸相邻p型接面区之间的间距。
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