CN107527952B - Hybrid anode diode with Nano-Fin gate structure - Google Patents

Hybrid anode diode with Nano-Fin gate structure Download PDF

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Publication number
CN107527952B
CN107527952B CN201710749529.7A CN201710749529A CN107527952B CN 107527952 B CN107527952 B CN 107527952B CN 201710749529 A CN201710749529 A CN 201710749529A CN 107527952 B CN107527952 B CN 107527952B
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fin
nano
gate
dimensional electron
electron gas
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CN107527952A (en
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周琦
胡凯
张安邦
朱厉阳
张波
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Hangzhou Xinmai Semiconductor Technology Co ltd
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University of Electronic Science and Technology of China
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)

Abstract

The invention belongs to the technical field of semiconductors, and relates to a mixed anode diode with a Nano-Fin gate structure. The grid electrode is of a Nano-Fin-shaped structure, and the barrier layer is etched into an inserted finger shape in an equal interval or unequal interval mode, so that a novel technology for modulating the concentration of two-dimensional electron gas in a heterojunction below a grid groove and between the grid grooves is realized. The invention has the beneficial effects that: the method has the advantages that the purpose of realizing enhancement type channels by partially exhausting the two-dimensional electron gas under the gate is realized, the two-dimensional electron gas regulation and control precision is higher, the device performance is more stable, and the influence of high-temperature processes such as annealing, gate medium growth process and the like on the distribution of injected ions in the flow sheet process can be avoided; the characteristics of the diode such as the starting voltage, the conduction resistance, the reverse leakage and the like can be adjusted by changing the number of the FIN-shaped structures and the width of the FIN-shaped structures.

Description

Hybrid anode diode with Nano-Fin gate structure
Technical Field
The invention belongs to the technical field of power semiconductors, and relates to a mixed anode diode with a Nano-Fin gate structure.
Background
Gallium nitride (GaN) is a third generation wide bandgap semiconductor material, is chemically stable, resistant to high temperature and corrosion, and is very suitable for manufacturing anti-radiation, high-frequency, high-power and high-density integrated electronic devices. All of these excellent properties make up for the inherent disadvantages of the first two generations of semiconductor materials such as Si and GaAs, and thus become the leading edge of research in rapid development.
As a third generation wide bandgap semiconductor device, a GaN-based Schottky Barrier Diode (SBD) power device has the excellent characteristics of high temperature resistance, high voltage resistance, small on-resistance and the like, and has remarkable advantages in the aspect of power devices. The conventional GaN heterojunction schottky diode is influenced by the schottky contact barrier, has a large turn-on voltage and a withstand voltage depending on the metal-semiconductor contact between the schottky metal and the GaN semiconductor. The larger starting voltage can increase the forward working loss of the device, so that the development of the high-performance GaN power diode with low forward starting voltage and high reverse withstand voltage has important significance for practical application.
Disclosure of Invention
In order to solve the above problems, the invention provides a Nano-Fin gate structure hybrid anode diode (as shown in fig. 3), wherein a gate groove is etched into a Fin-shaped structure, so that two-dimensional electron gas below the gate groove is partially exhausted, and the purpose of two-dimensional electron gas channel enhancement is further achieved. The technology can realize the accurate regulation and control of the two-dimensional electron gas under the grid by changing the width, the distance and the depth of the FIN-shaped etching part, not only can realize the requirement of low starting voltage of a diode, but also is also suitable for preparing an enhanced HEMT by utilizing an etched grid groove technology, namely, the parameter of the controllable FIN structure is changed according to the actual requirement so as to realize the accurate regulation and control of the threshold voltage of the HEMT.
The working principle of the Nano-Fin gate structure mixed anode diode provided by the invention is as follows: ohmic contacts are formed on the source electrode, the drain electrode and the surface of the active region of the device to be used as a current input port and a current output port. And (3) preparing a Nano-Fin gate structure (shown in figure 4) between the source electrode and the drain electrode by locally etching the AlGaN layer, and preparing a device gate on the structure. The Nano-Fin structure 9 is composed of a plurality of reserved strip AlGaN layers, and an enhanced AlGaN/GaN device is realized by partially exhausting two-dimensional electron gas. When no voltage is applied to the grid electrode, as the local 2-DEG under the grid electrode is very low, a small part of electrons can pass through, the source electrode and the drain electrode cannot be conducted, and the device is in an off state. When a sufficiently high positive voltage is applied to the gate, the potential barrier is lowered, a large number of electrons can pass through the potential barrier, conduction between the source and the drain is enabled, and the device is in an on state.
In order to achieve the purpose, the invention adopts the following technical scheme:
a Nano-Fin structure mixed anode diode comprises a substrate 1, a heterojunction above the substrate, a grid electrode, a source electrode and a drain electrode 6, wherein the heterojunction is formed by a GaN layer 2 and an AlGaN layer 4 above the GaN layer 2, the grid electrode is positioned above the heterojunction and forms Schottky contact with the heterojunction, the source electrode and the drain electrode 6 are respectively positioned on two sides of the upper surface of the AlGaN layer 4, and the source electrode and the AlGaN layer form ohmic contact; the upper surface of the AlGaN layer 4 between the drain electrode 6 and the grid electrode is provided with a passivation layer 7; the method is characterized in that: the gate is a metal film which is deposited on the Nano-Fins structure and forms Schottky contact with the heterojunction after the Nano-Fin structure 9 is formed by locally etching the AlGaN layer, and each piece of Nano-Fin is sequentially arranged along a third dimension direction of the device which is vertical to the horizontal direction and the vertical direction at the same time.
Preferably, the Nano-Fin-shaped gate groove is parallel to the direction of the connecting line of the source electrode and the drain electrode.
Preferably, a dielectric layer is inserted between the gate and the three-dimensional multi-groove gate structure.
Preferably, the dielectric layer is one or a composite of more of Al2O3, SiO2, Si3N4, Ta2O5, MgO, Sc2O3, LaLuO3 and TiO 2.
Compared with the traditional technology (such as Chinese patent with application number of 201511003565.6), the scheme of the invention has the difference that the enhanced channel is realized by the full etching and partial etching methods in the prior art, namely the method keeps the continuity of the source-drain electrode connecting line direction of the two-dimensional electron gas, so that the purpose of doing so is that the two-dimensional electron gas of the channel has higher recovery speed when positive voltage is applied to a grid electrode (anode) than the traditional device which realizes the enhanced channel by full etching, partial etching or ion injection; compared with the process design of Zhou Q, Jin Y, Mou J, et al, "Over 1.1kV break down-on voltage GaN-on-Si Power diode with MIS-Gated hydrogen anode [ C ]" IEEE, International Symposium on Power Semiconductor Devices & IC' s.2015-. In addition, the etching interface defect of the device is separated from the Nano-Fin current conduction channel, so that the scattering effect of the etching interface defect on two-dimensional electron gas is eliminated, the mobility of the two-dimensional electron gas in the Nano-Fin current conduction channel of the device is improved, and the conduction resistance of the device is reduced; compared with a mode of realizing two-dimensional electron gas regulation and control by ion injection, the method has higher two-dimensional electron gas regulation and control precision and more stable device performance, and can avoid the influence of high-temperature processes such as annealing, gate dielectric growth process and the like on the distribution of injected ions in the flow sheet process; the characteristics of the diode such as the starting voltage, the conduction resistance, the reverse leakage and the like can be adjusted by changing the number of the FIN-shaped structures and the width of the FIN-shaped structures.
The invention has the beneficial effects that: the invention provides a Nano-Fin gate structure mixed anode diode, which reduces the etching area of an AlGaN layer, reduces the material damage and does not damage the continuity of the AlGaN layer on the premise of realizing the enhancement of a device and having higher withstand voltage, so that the device has higher current density, higher electron mobility and lower on-resistance, and meanwhile, the Nano-Fin gate structure has a plurality of reserved strip AlGaN layers (as shown in figure 5), and two-dimensional electron gas under a gate (as shown in figure 6) can be accurately regulated and controlled by controlling the number, width and depth of the reserved AlGaN layers, so that the low starting voltage and the adjustable threshold are realized.
Drawings
FIG. 1 is a schematic diagram of a GaN heterojunction cross-sectional structure;
FIG. 2 is a schematic cross-sectional view of a conventional GaN heterojunction Schottky diode along the source-drain line;
FIG. 3 is a cross-sectional view of the device of the present invention along the direction of the source/drain line;
FIG. 4 is a schematic perspective view of the source/drain interconnection of the present invention without ohmic metal;
FIG. 5 is a top view of a hybrid anode diode with a Nano-Fin gate structure according to the present invention;
FIG. 6 is a two-dimensional electron distribution from a top view of the structure of the present invention.
The structure comprises a 1-bit substrate, a GaN layer 2, a 2-DEG layer 3, an AlGaN layer 4, a Nano-Fin structure 9, a drain electrode 6, a passivation layer 7 and a Schottky metal 8.
Detailed Description
The present invention has been described in detail in the summary of the invention section and will not be described in detail herein.

Claims (2)

1. A mixed anode diode with a Nano-Fin gate structure comprises a substrate (1), a heterojunction above the substrate, a gate, a source electrode and a drain electrode (6), wherein the heterojunction is formed by a GaN layer (2) and an AlGaN layer (4) above the GaN layer (2), the gate and the heterojunction form Schottky contact, the source electrode and the drain electrode (6) are respectively positioned on two sides of the upper surface of the AlGaN layer (4), and the source electrode and the AlGaN layer form ohmic contact; the upper surface of the AlGaN layer (4) between the drain electrode (6) and the grid electrode is provided with a passivation layer (7); the method is characterized in that: the gate is a Nano-Fins structure (9) formed by locally etching the AlGaN layer, a metal thin film (8) which is deposited on the Nano-Fins structure (9) and forms Schottky contact with a heterojunction is deposited, and each piece of Nano-Fin is sequentially arranged along a third dimension direction of the device which is vertical to the horizontal direction and the vertical direction at the same time.
2. The hybrid anode diode of claim 1, wherein: the metal film (8) is in ohmic short circuit with the source electrode.
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CN114843226B (en) * 2021-02-02 2024-05-17 北京大学 Method for integrating MIS-HEMT device and GaN hybrid anode diode and application
CN116741869A (en) * 2023-05-23 2023-09-12 苏州科技大学 Device for improving responsivity of terahertz detector

Citations (5)

* Cited by examiner, † Cited by third party
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JPH02504570A (en) * 1987-08-14 1990-12-20 リージェンツ オブ ザ ユニバーシティ オブ ミネソタ Electronic and photoelectric devices that utilize the characteristics of light holes
CN103227199A (en) * 2013-04-19 2013-07-31 中国科学院苏州纳米技术与纳米仿生研究所 High-performance semiconductor electronic device
CN103730491A (en) * 2012-10-11 2014-04-16 三星电子株式会社 High electron mobility transistor and method of driving the same
CN204067372U (en) * 2013-12-27 2014-12-31 广州吉日嘉禾电子科技发展有限公司 A kind of heterostructure rectifier diode
CN105322016A (en) * 2014-08-05 2016-02-10 株式会社东芝 Semiconductor device

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US8174048B2 (en) * 2004-01-23 2012-05-08 International Rectifier Corporation III-nitride current control device and method of manufacture

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02504570A (en) * 1987-08-14 1990-12-20 リージェンツ オブ ザ ユニバーシティ オブ ミネソタ Electronic and photoelectric devices that utilize the characteristics of light holes
CN103730491A (en) * 2012-10-11 2014-04-16 三星电子株式会社 High electron mobility transistor and method of driving the same
CN103227199A (en) * 2013-04-19 2013-07-31 中国科学院苏州纳米技术与纳米仿生研究所 High-performance semiconductor electronic device
CN204067372U (en) * 2013-12-27 2014-12-31 广州吉日嘉禾电子科技发展有限公司 A kind of heterostructure rectifier diode
CN105322016A (en) * 2014-08-05 2016-02-10 株式会社东芝 Semiconductor device

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