CN107437564A - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
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- CN107437564A CN107437564A CN201710145590.0A CN201710145590A CN107437564A CN 107437564 A CN107437564 A CN 107437564A CN 201710145590 A CN201710145590 A CN 201710145590A CN 107437564 A CN107437564 A CN 107437564A
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 22
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- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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Abstract
一种半导体装置,包含突出于半导体基板的半导体鳍片。半导体鳍片包含在半导体基板上的多对半导体层。每一对半导体层包含第一导电型的第一半导体层与第二导电型的第二半导体层。第二半导体层堆叠于第一半导体层上且接触第一半导体层。
Description
技术领域
本揭露实施例是有关于一种半导体装置,且特别是有关于一种鳍式场效晶体管装置。
背景技术
半导体集成电路(integrated circuit,IC)产业已历经快速地成长。在集成电路演变的过程中,随着几何尺寸(如使用制造制程所可以创建的最小元件(或导线))减少,功能密度(定义为每单位晶片面积内互连元件的数量)已广泛增加。缩小化制程通常通过增加生产效率与降低相关成本来提供益处。然而,这样的缩小化增加了加工与制造集成电路的复杂度。为了实现这些进步,集成电路的制造也需要取得类似的进展。
当半导体集成电路产业进入到纳米科技制程节点以追求较高的装置密度、较高的效能和较低的成本时,来自制造和设计的挑战导致了三维(three-dimensional,3D)装置,如鳍式场效晶体管(fin-like field effect transistors,FinFETs)的发展。鳍式场效晶体管装置的优点包含减少短通道效应及较高电流量。随着特征尺寸持续缩小,已有使用具有高介电常数的栅极介电质与金属栅极电极的鳍式场效晶体管装置来增加装置效能的需求。随着许多临界的尺寸限制变得越来越难以克服,堆叠鳍式场效晶体管的结构是用以持续缩小的有前景的方式之一。然而,传统的鳍式场效晶体管装置及其制造方法已无法在所有方面都完全满足。
发明内容
本揭露提出一种半导体装置,包含半导体基板与突出于半导体基板的半导体鳍片。半导体鳍片包含第一导电型的第一半导体层与第二导电型的第二半导体层。第一半导体层设置于半导体基板上,第二半导体层堆叠于第一半导体层上且接触第一半导体层,其中介于第一半导体层与第二半导体层之间的介面在半导体鳍片中形成空乏区。
附图说明
从以下结合所附附图所做的详细描述,可对本揭露的态样有更佳的了解。需注意的是,根据业界的标准实务,各特征并未依比例绘示。事实上,为了使讨论更为清楚,各特征的尺寸都可任意地增加或减少。
图1是绘示根据本揭露的一些实施例的半导体装置的三维示意图;
图2是绘示根据本揭露的一些实施例的半导体装置的三维示意图;
图3是绘示根据本揭露的一些实施例的半导体鳍片310的剖面图;
图4A至图4H是绘示根据本揭露的一些实施例的制造半导体装置的方法的中间阶段的剖面图;
图5是绘示根据本揭露的一些实施例的制造半导体装置的方法的流程图。
具体实施方式
本揭露提供了许多不同的实施例或例子,用以实作此揭露的不同特征。为了简化本揭露,一些元件与布局的具体例子会在以下说明。当然,这些仅仅是例子而不是用以限制本揭露。例如,若在后续说明中提到了第一特征形成在第二特征上面,这可包括第一特征与第二特征是直接接触的实施例;这也可以包括第一特征与第二特征之间还形成其他特征的实施例,这使得第一特征与第二特征没有直接接触。
在此所使用的用语的目的仅是为了描述特定实施例,非用以限制本揭露。例如,除非在内文内另有限定,单数形的“一”和“该”也可以包含复数形。此外,本揭露可能会在各种例子中重复元件符号及/或字母。此重复的目的是为了简化及明确,但本身并不决定所讨论的各种实施例及/或配置之间的关系。这些空间上相对的用语除了涵盖在图示中所绘的方向,也涵盖了装置在使用或操作上不同的方向。这些装置也可被旋转(例如旋转90度或旋转至其他方向),而在此所使用的空间上相对的描述同样也可以有相对应的解释。
虽然“第一”、“第二”、“第三”等等用语在申请专利范围中可用于描述各种元件是可以被理解的,但这些元件不应该被这些用语所限制,且在实施例中被相应地描述的这些元件是用以表达不同的参照编号,这些用语仅是用以区别一个元件与另一个元件。例如,第一元件可以被称为第二元件,且类似地,第二元件可以被称为第一元件,而不偏离实施例的范围。在此所使用的用语“及/或”包含一或多个相关列出的项目的任何或全部组合。
本揭露的实施例是针对一种具有多个堆叠混合P/N型半导体层的鳍式场效晶体管与其制造方法,且特别是针对一种用于具有纳米线(nanowire,NW)结构的P型通道(或N型通道)无接面薄膜晶体管(junctionless thin-film transistor,JL-TFT)的三维堆叠混合P/N(或N/P)型半导体层。为了制造P型金氧硅场效晶体管(p-type metal-oxide-siliconfield-effect transistor,PMOS)装置,本揭露的一些实施例包含至少一对P型半导体层与位于P型半导体下层的N型半导体层,其中介于垂直堆叠的P型半导体层之间的N型半导体层产生额外的空乏区,使得有效通道厚度减少以增强栅极的控制能力。为了制造N型金氧硅场效晶体管(n-type metal-oxide-silicon field-effect transistor,NMOS)装置,本揭露的一些实施例包含至少一对N型半导体层与位于N型半导体下层的P型半导体层,其中介于垂直堆叠的N型半导体层之间的P型半导体层产生额外的空乏区,使得有效通道厚度减少以增强栅极的控制能力。
请参照图1,图1是绘示根据本揭露的一些实施例的半导体装置的三维示意图。半导体装置包含半导体基板100、半导体鳍片110、栅极氧化物170、栅极电极180、部分的源极/漏极190与其他部分的源极/漏极(图未示)。半导体基板100定义为包含半导体材料的任何构造,包含但不限于主体硅、半导体晶圆或硅锗(silicon germanium,SiGe)基板。半导体基板100也可使用包含III族、IV族与V族元素的其他半导体材料。多个部分的源极/漏极的每一者,例如部分的源极/漏极190,包含半导体鳍片110的末端部与覆盖半导体鳍片110的接触部160。部分的源极/漏极190设置于邻近栅极电极180的一侧的半导体鳍片110上,且其他部分的源极/漏极设置于邻近栅极电极180的另一侧的半导体鳍片110上。栅极氧化物170设置于部分的源极/漏极190与其他部分的源极/漏极之间,且覆盖半导体鳍片110的侧面与顶面,且栅极电极180覆盖栅极氧化物170的侧面与顶面。在一些实施例中,栅极电极180可为Ω状栅极(omega-gate)。然而,不同形式的栅极电极也适用于本揭露的实施例。因此,多个部分的源极/漏极与栅极电极共同形成鳍式场效晶体管装置。
半导体鳍片110包含第一导电型的第一半导体层120与第二导电型的第二半导体层130。第一半导体层120与第二半导体层130定义为包含半导体材料的任何构造,包含但不限于主体硅、半导体晶圆或硅锗基板。第一半导体层120与第二半导体层130也可使用包含III族、IV族与V族元素的其他半导体材料。第一导电型的第一半导体层120设置于半导体基板100上,其中第一半导体层120包含N型掺杂物与P型掺杂物的其中一者。第二导电型的第二半导体层130堆叠于第一半导体层120上且接触第一半导体层120,其中第二半导体层130包含N型掺杂物与P型掺杂物的其中另一者。举例来说,当第一半导体层120包含N型掺杂物且第二半导体层130包含P型掺杂物,半导体鳍片110具有PN结构,且第二半导体层130对应于P型金氧硅场效晶体管装置。当第一半导体层120包含P型掺杂物且第二半导体层130包含N型掺杂物,半导体鳍片110具有NP结构,且第二半导体层130对应于N型金氧硅场效晶体管装置。在一些实施例中,半导体装置还包含设置于半导体基板100上的隔离层102,例如四乙氧基硅烷(tetraethyl orthosilicate,TEOS)。在那种情况下,第一导电型的第一半导体层120设置于隔离层102上。在一些实施例中,通过直接加工半导体基板100来形成半导体鳍片110,例如主体鳍式场效晶体管结构,其中第一导电型的第一半导体层120直接设置于半导体基板100上。
本揭露的半导体装置可为无接面薄膜晶体管、无接面场效晶体管(junctionlessfield effect transistor,JL-FET)、反转模式(inversion mode)的薄膜晶体管或场效晶体管、或累积模式(accumulation mode)的薄膜晶体管或场效晶体管。第一半导体层120与第二半导体层130的厚度是通过半导体装置的形式以及第一半导体层120与第二半导体层130的离子浓度来决定。在一些实施例中,第一半导体层相对于第二半导体层的厚度比例实质上的范围是从0.01至100。在一些实施例中,厚度比例实质上的范围是从0.1至10。举例来说,第一半导体层120的厚度约为300埃(angstrom),且第二半导体层130的厚度约为150埃,因此厚度比例为2。在一些实施例中,第二半导体层130具有实质上范围从1×1016/立方厘米(cm3)至1×1020/cm3的平均硼浓度,例如5×1019/cm3,且第一半导体层120具有实质上范围从1×1016/cm3至1×1020/cm3的平均磷浓度,例如4×1019/cm3。因为第一半导体层120的导电型(例如N型)相反于第二半导体层130的导电型(例如P型),介于第一半导体层120与第二半导体层130之间的P/N接面产生了空乏区,因此减少了有效通道厚度以增强栅极的控制能力,超过了传统无接面薄膜晶体管的栅极的控制能力,且如图1所示的半导体装置具有良好的电气性能。在一些实施例中,第一半导体层120与第二半导体层130可由硅或硅锗所形成。因此,如图1所示的半导体装置因为硅为良好的导热材料而具有良好的导热性,且在形成硅或硅锗层的制程中具有良好的装置变异强健性(device variability robustness)。相应地,如图1所示的堆叠混合P/N型(或N/P型)结构因为在制程中与电气性能上具有良好的硅导热性、栅极控制能力与装置变异强健性而成为三维堆叠集成电路与记忆体应用的有高前景性的架构。
请参照图2,图2是绘示根据本揭露的一些实施例的半导体装置的三维示意图。半导体装置包含半导体基板200、半导体鳍片210、栅极氧化物270、栅极电极280、部分的源极/漏极290与其他部分的源极/漏极(图未示)。半导体基板200定义为包含半导体材料的任何构造,包含但不限于主体硅、半导体晶圆或硅锗基板。半导体基板200也可使用包含III族、IV族与V族元素的其他半导体材料。多个部分的源极/漏极的每一者,例如部分的源极/漏极290,包含半导体鳍片210的末端部与覆盖半导体鳍片210的接触部260。部分的源极/漏极290设置于邻近栅极电极280的一侧的半导体鳍片210上,且其他部分的源极/漏极设置于邻近栅极电极280的另一侧的半导体鳍片210上。栅极氧化物270设置于部分的源极/漏极290与其他部分的源极/漏极之间,且覆盖半导体鳍片210的侧面与顶面,且栅极电极280覆盖栅极氧化物270的侧面与顶面。在一些实施例中,栅极电极280可为Ω状栅极。然而,不同形式的栅极电极也适用于本揭露的实施例。因此,多个部分的源极/漏极与栅极电极共同形成鳍式场效晶体管装置。
半导体鳍片210包含第一导电型的第一半导体层220、第二导电型的第二半导体层230、第一导电型的第三半导体层240与第二导电型的第四半导体层250,其中第一导电型为N型或P型的其中一者,且第二导电型为N型或P型的其中另一者。第一导电型的第一半导体层220设置于半导体基板200上。第二导电型的第二半导体层230堆叠于第一半导体层220上且接触第一半导体层220。举例来说,当第一导电型为N型且第二导电型为P型,半导体鳍片210具有PNPN结构,且第二半导体层230与第四半导体层250对应于各自的P型金氧硅场效晶体管装置。当第一导电型为P型且第二导电型为N型,半导体鳍片210具有NPNP结构,且第二半导体层230与第四半导体层250对应于各自的N型金氧硅场效晶体管装置。所以,如图2所示的半导体装置包含两个相同形式的金氧硅装置。在一些实施例中,半导体装置还包含设置于半导体基板200上的隔离层202,例如四乙氧基硅烷。在那种情况下,第一导电型的第一半导体层220设置于隔离层202上。
在一些实施例中,第一半导体层220的厚度(例如约300埃)实质上为第二半导体层230的厚度(例如约150埃)的两倍。第三半导体层240的厚度(例如约300埃)实质上为第四半导体层250的厚度(例如约150埃)的两倍。第二半导体层230的平均离子浓度大于第一半导体层220的平均离子浓度。第四半导体层250的平均离子浓度大于第三半导体层240的平均离子浓度。在一些实施例中,第二半导体层230与第四半导体层250的每一者具有实质上范围从1×1016/cm3至1×1020/cm3的平均硼浓度,例如5×1019/cm3,且第一半导体层220与第三半导体层240的每一者具有实质上范围从1×1016/cm3至1×1020/cm3的平均磷浓度,例如4×1019/cm3。因为第一半导体层220的导电型(例如N型)相反于第二半导体层230的导电型(例如P型),介于第一半导体层220与第二半导体层230之间的P/N接面产生了空乏区。因为第三半导体层240的导电型(例如N型)相反于第二半导体层230与第四半导体层250的导电型(例如P型),介于第二半导体层230与第三半导体层240之间的P/N接面产生了空乏区,且介于第三半导体层240与第四半导体层250之间的P/N接面产生了空乏区。因此,对应于金氧硅装置的第二半导体层230与对应于另一金氧硅装置的第四半导体层250被第三半导体层240所隔开。每个金氧硅装置的有效通道厚度减少以增强栅极的控制能力,超过了传统无接面薄膜晶体管的栅极的控制能力,且如图2所示的半导体装置具有良好的电气性能。在一些实施例中,第一半导体层220、第二半导体层230、第三半导体层240与第四半导体层250可由硅或硅锗所形成。因此,如图2所示的半导体装置因为硅为良好的导热材料而具有良好的导热性,且在形成硅或硅锗层的制程中具有良好的装置变异强健性。所以,如图2所示的堆叠混合P/N型(或N/P型)结构因为在制程中与电气性能上具有良好的硅导热性、栅极控制能力与装置变异强健性而成为三维堆叠集成电路与记忆体应用的有高前景性的架构。
为了分析图2中所示的PNPN结构的特性(例如第一导电型为N型且第二导电型为P型),PNPN结构的具有高约17nm与宽约35nm的纳米线的每一者被制作以测试具有Ω状栅极的堆叠P/N型无接面薄膜晶体管。为了分析堆叠混合P/N型通道(PNPN结构)内的掺杂分布,在未经图案化的硅晶圆上执行二次离子质谱仪(secondary ion mass spectroscopy,SIMS)量测,上述的量测是透过图案化制程以外的相同制程来执行。P型半导体层的掺杂的平均硼浓度为5×1019/cm3,位于P型半导体层下层的N型半导体层的掺杂的平均磷浓度为4×1019/cm3。具有1微米的通道长度(channel length,Lg)的堆叠P/N型无接面薄膜晶体管的极好的转换特性如下:(1)次临界摆幅(subthreshold swing,SS)为70mV/dec,(2)Ion/Ioff比例大于109。堆叠P/N型无接面薄膜晶体管具有介于通道/基板间的额外的空乏区的优点。堆叠P/N型无接面薄膜晶体管表现出非常高的Ion/Ioff比例(大于109)与极佳的次临界摆幅值(70mV/dec)。此外,PNPN装置在临界电压(threshold voltage,Vth)与次临界摆幅方面具有较低的温度与较低的装置性能波动。
请参照图3,图3是绘示根据本揭露的一些实施例的半导体鳍片310的剖面图。半导体鳍片310包含堆叠于半导体基板300上的多个成对的半导体层340。半导体基板300定义为包含半导体材料的任何构造,包含但不限于主体硅、半导体晶圆或硅锗基板。半导体基板300也可使用包含III族、IV族与V族元素的其他半导体材料。每一成对的半导体层340包含第一导电型的第一半导体层320与第二导电型的第二半导体层330,其中第一半导体层320包含N型掺杂物与P型掺杂物的其中一者,且第二半导体层330包含N型掺杂物与P型掺杂物的其中另一者。第二导电型的第二半导体层330堆叠于第一半导体层320上且接触第一半导体层320。举例来说,当第一半导体层320包含N型掺杂物且第二半导体层130包含P型掺杂物,每一成对的半导体层340中的第二半导体层330对应于P型金氧硅场效晶体管装置。当第一半导体层320包含P型掺杂物且第二半导体层330包含N型掺杂物,每一成对的半导体层340中的第二半导体层330对应于N型金氧硅场效晶体管装置。所以,对于第k对的半导体层340而言(k为正整数),如图3所示的半导体装置包含k个相同导电型的金氧硅装置。在一些实施例中,半导体装置还包含隔离层(图未示),例如四乙氧基硅烷。在那种情况下,半导体鳍片310设置于隔离层上。
在一些实施例中,第一半导体层320的厚度(例如约300埃)实质上为第二半导体层330的厚度(例如约150埃)的两倍。第二半导体层330的平均离子浓度大于第一半导体层320的平均离子浓度。在一些实施例中,第二半导体层330具有实质上范围从1×1016/cm3至1×1020/cm3的平均硼浓度,例如5×1019/cm3,且第一半导体层320具有实质上范围从1×1016/cm3至1×1020/cm3的平均磷浓度,例如4×1019/cm3。因为第一半导体层320的导电型(例如N型)相反于第二半导体层330的导电型(例如P型),介于第一半导体层320与第二半导体层330之间的P/N接面产生了空乏区,且介于上述第二半导体层330与上述第二半导体层330的上覆对的半导体层340的第一半导体层320之间的其他P/N接面产生了空乏区。因此,每一成对的半导体层340的第二半导体层330(对应于金氧硅装置)被其邻接的第一半导体层320所隔开。每个金氧硅装置的有效通道厚度减少以增强栅极的控制能力,超过了传统无接面薄膜晶体管的栅极的控制能力,且如图3所示的半导体装置具有良好的电气性能。在一些实施例中,第一半导体层320与第二半导体层330可由硅或硅锗所形成。因此,如图3所示的半导体装置因为硅为良好的导热材料而具有良好的导热性,且在形成硅或硅锗层的制程中具有良好的装置变异强健性。相应地,如图3所示的堆叠混合P/N型(或N/P型)结构因为在制程中与电气性能上具有良好的硅导热性、栅极控制能力与装置变异强健性而成为三维堆叠集成电路与记忆体应用的有高前景性的架构。
请一并参照图5与图4A至图4H,图5是绘示根据本揭露的一些实施例的制造半导体装置的方法500的流程图,图4A至图4H是绘示根据本揭露的一些实施例的制造半导体装置的方法的中间阶段的剖面图。如图4A所示,当方法500开始时,提供半导体基板400,且在半导体基板400上选择性地形成隔离层402,例如四乙氧基硅烷。半导体基板400定义为包含半导体材料的任何构造,包含但不限于主体硅、半导体晶圆或硅锗基板。半导体基板400也可使用包含III族、IV族与V族元素的其他半导体材料。
如图4B所示,于操作510,第一半导体层420形成于隔离层402上。第一半导体层420是由例如硅或硅锗所形成。在一些实施例中,使用磊晶或磊晶制程来形成第一半导体层420。磊晶制程可包含选择性磊晶成长(selective epitaxy growth,SEG)制程、化学气相沉积技术(例如气相磊晶(vapor-phase epitaxy,VPE)和/或超高真空化学气相沉积(ultra-high vacuum CVD,UHV-CVD))、分子束磊晶(molecular beam epitaxy,MBE)、其他适合的磊晶制程或其组合。接着,如图4C所示,执行操作520来把第一掺杂物类型的第一掺杂物422植入到第一半导体层420中,其中第一掺杂物类型为N型或P型的其中一者。在一些例示中,P型掺杂物为硼或二氟化硼,且N型掺杂物为磷或砷或其组合。举例来说,执行操作520时的掺杂物剂量约为2x1014/cm3。
如图4D所示,于操作530,第二半导体层430形成于第一半导体层420上且接触第一半导体层420。第二半导体层430是由例如硅或硅锗所形成。在一些实施例中,使用磊晶或磊晶制程来形成第二半导体层430。磊晶制程可包含选择性磊晶成长制程、化学气相沉积技术(例如气相磊晶和/或超高真空化学气相沉积)、分子束磊晶、其他适合的磊晶制程或其组合。
接着,如图4E所示,执行操作540来把第二掺杂物类型的第二掺杂物432植入到第二半导体层430中,其中第二掺杂物类型为N型或P型的其中一者。在一些例示中,P型掺杂物为硼或二氟化硼,且N型掺杂物为磷或砷或其组合。举例来说,当第一掺杂物422为N型掺杂物,则第二掺杂物432为P型掺杂物;当第一掺杂物422为P型掺杂物,则第二掺杂物432为N型掺杂物。举例来说,执行操作540时的掺杂物剂量约为2x1014/cm3。操作520到操作540形成如图1所示的一对半导体层(PN结构或NP结构)。在一些实施例中,第一半导体层420的厚度(例如约300埃)实质上为第二半导体层430的厚度(例如约150埃)的两倍。第二半导体层430的平均离子浓度大于第一半导体层420的平均离子浓度。在一些实施例中,第二半导体层430具有实质上范围从1×1016/cm3至1×1020/cm3的平均硼浓度,例如5×1019/cm3,且第一半导体层420具有实质上范围从1×1016/cm3至1×1020/cm3的平均磷浓度,例如4×1019/cm3。
操作520至操作540可重复两次来形成如图2所示的对应于两个金氧硅装置的两对半导体层(PNPN结构或NPNP结构)。操作520至操作540可重复k次来形成如图3所示的对应于k个金氧硅装置的k对半导体层(PNPN结构或NPNP结构),其中k为正整数。
其次,如图4F所示,于操作550,通过使用光罩层(图未示)与适合的蚀刻制程来蚀刻第一半导体层420与第二半导体层430以形成半导体鳍片410。如图4G所示,于操作560,形成栅极氧化物470来覆盖半导体鳍片410的侧面与顶面。如图4H所示,于操作570,形成栅极电极480来覆盖栅极氧化物470的侧面与顶面。在一些实施例中,栅极电极480可为Ω状栅极。其次,于操作580,部分的源极/漏极形成于半导体鳍片的两端且夹持栅极电极。如此,多个部分的源极/漏极与栅极电极共同形成鳍式场效晶体管装置。
根据一些实施例,半导体装置包含半导体基板与突出于半导体基板的半导体鳍片。半导体鳍片包含第一导电型的第一半导体层与第二导电型的第二半导体层。第一导电型的第一半导体层设置于半导体基板上。第二导电型的第二半导体层堆叠于第一半导体层上且接触第一半导体层,其中介于第一半导体层与第二半导体层之间的介面在半导体鳍片中形成空乏区。
根据一些实施例,其中上述半导体基板与半导体鳍片是由硅所形成。
根据一些实施例,其中上述半导体基板与半导体鳍片是由硅锗所形成。
根据一些实施例,其中上述第一半导体层包含N型掺杂物且第二半导体层包含P型掺杂物,其中第二半导体层对应于P型金氧硅场效晶体管装置。
根据一些实施例,其中上述第一半导体层包含P型掺杂物且第二半导体层包含N型掺杂物,其中第二半导体层对应于N型金氧硅场效晶体管装置。
根据一些实施例,其中上述半导体装置还包含第一导电型的第三半导体层与第二导电型的第四半导体层,第三半导体层堆叠于第二导电型的第二半导体层上且接触第二导电型的第二半导体层,第四半导体层堆叠于第一导电型的第三半导体层上且接触第一导电型的第三半导体层。
根据一些实施例,其中上述半导体装置还包含栅极氧化物、栅极电极与部分的源极/漏极。栅极氧化物覆盖半导体鳍片的侧面与顶面。栅极电极覆盖栅极氧化物的侧面与顶面。部分的源极/漏极分别设置于邻近栅极电极的两侧的半导体鳍片上。
根据一些实施例,其中上述半导体装置为无接面薄膜晶体管、无接面场效晶体管、反转模式的薄膜晶体管或场效晶体管、或累积模式的薄膜晶体管或场效晶体管。
根据一些实施例,其中上述第一半导体层相对于第二半导体层的厚度比例实质上的范围是从0.1至10。
根据一些实施例,半导体装置包含半导体基板与突出于半导体基板的半导体鳍片。半导体鳍片包含在半导体基板上的多个成对的半导体层。每一成对的半导体层包含第一导电型的第一半导体层与第二导电型的第二半导体层。第二导电型的第二半导体层堆叠于第一半导体层上且接触第一半导体层。
根据一些实施例,其中上述半导体基板与半导体鳍片是由硅或硅锗所形成。
根据一些实施例,其中上述第一半导体层相对于第二半导体层的厚度比例实质上的范围是从0.01至100。
根据一些实施例,其中上述第一半导体层包含N型掺杂物且第二半导体层包含P型掺杂物,其中第二半导体层对应于P型金氧硅场效晶体管装置。
根据一些实施例,其中上述第一半导体层包含P型掺杂物且第二半导体层包含N型掺杂物,其中第二半导体层对应于N型金氧硅场效晶体管装置。
根据一些实施例,其中上述半导体装置还包含栅极氧化物与栅极电极。栅极氧化物覆盖半导体鳍片的侧面与顶面。栅极电极覆盖栅极氧化物的侧面与顶面。
根据一些实施例,形成半导体装置的方法包含以下步骤。形成第一半导体层于半导体基板上。植入第一掺杂物类型的第一掺杂物到第一半导体层中,其中第一掺杂物类型为N型与P型的其中一者。第二半导体层形成于半导体基板上且接触半导体基板。植入第二掺杂物类型的第二掺杂物到第二半导体层中,其中第二掺杂物类型为N型与P型的其中一者。蚀刻第一半导体层与第二半导体层来形成半导体鳍片。
根据一些实施例,透过执行沉积操作来形成第一半导体层与第二半导体层。
根据一些实施例,其中上述第一掺杂物类型为N型且第二掺杂物类型为P型,使得第二半导体层对应于P型金氧硅场效晶体管装置。
根据一些实施例,其中上述方法还包含:形成第三半导体层,其中第三半导体层设置于第二半导体层上且接触第二半导体层;把第一掺杂物类型的第一掺杂物植入到第三半导体层中;形成第四半导体层,其中第四半导体层设置于第三半导体层上且接触第三半导体层;把第二掺杂物类型的第二掺杂物植入到第四半导体层中,其中蚀刻第一半导体层与第二半导体层还包含蚀刻第三半导体层与第四半导体层来形成半导体鳍片。
根据一些实施例,其中上述方法还包含:形成栅极氧化物来覆盖半导体鳍片的侧面与顶面;形成栅极电极来覆盖栅极氧化物的侧面与顶面;形成部分的源极/漏极于邻近栅极电极的两侧的半导体鳍片上。
以上概述了数个实施例的特征,因此熟悉此技艺者可以更了解本揭露的态样。熟悉此技艺者应了解到,其可轻易地把本揭露当作基础来设计或修改其他的制程与结构,借此实现和在此所介绍的这些实施例相同的目标及/或达到相同的优点。熟悉此技艺者也应可明白,这些等效的建构并未脱离本揭露的精神与范围,并且他们可以在不脱离本揭露精神与范围的前提下做各种的改变、替换与变动。
Claims (1)
1.一种半导体装置,其特征在于,包含:
一半导体基板;以及
一半导体鳍片,突出于该半导体基板,该半导体鳍片包含:
一具有第一导电型的一第一半导体层,设置于该半导体基板上;以及
一具有第二导电型的一第二半导体层,堆叠于该第一半导体层上且接触该第一半导体层,其中介于该第一半导体层与该第二半导体层之间的介面在该半导体鳍片中形成一空乏区。
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