CN107431000A - 其上具有钴互连层及焊料的金属接合垫 - Google Patents
其上具有钴互连层及焊料的金属接合垫 Download PDFInfo
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- CN107431000A CN107431000A CN201680018085.3A CN201680018085A CN107431000A CN 107431000 A CN107431000 A CN 107431000A CN 201680018085 A CN201680018085 A CN 201680018085A CN 107431000 A CN107431000 A CN 107431000A
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Abstract
在所描述的实例中,一种形成接合垫的方法(100)包含提供(101)衬底,所述衬底包含形成在其上的至少一个集成电路IC装置,所述IC装置具有可氧化的最上层金属互连层,所述最上层金属互连层提供耦合到所述IC装置上的电路节点的多个接合垫。所述多个接合垫包含金属接合垫区域。将含钴连接层直接沉积(102)在所述金属接合垫区域上。将所述含钴连接层图案化(103)以提供用于所述多个接合垫的钴接合垫表面,且在所述钴接合垫表面上形成(104)焊接材料。
Description
技术领域
本发明涉及用于集成电路的接合垫。
背景技术
集成电路(IC)装置通常制造在具有多个IC装置裸片的半导体晶片上,每一IC装置裸片在顶表面上包含接合垫,所述接合垫连接到装置中的各个节点(例如信号输入、信号输出及电力供应节点)。接合垫通常由引线框或其它导电结构(例如,例如印刷电路板(PCB)的支撑件上的接触垫)的接合线连接以允许利用IC裸片。用于将IC装置连接到引线框或其它支撑件的常规方法包含引线接合、捲带自动接合(TAB)、可控塌陷芯片连接(C4)或凸块接合及导电粘合剂。
为了提供与接合垫表面的可靠且低电阻的附接,一些封装技术已经使用具有顶部金属层的多层接合垫,所述顶部金属层导电且抗氧化以提供高度可靠性性(良好的腐蚀性能)及高性能(低电阻)。一种这样的接合垫布置在可氧化的最上层金属互连层上沉积电介质钝化层,例如铜或铝,且接着由钝化层形成包含电介质侧壁的沟槽。接着,沉积包含耐火金属(例如,Ta、TaN或Ti)的阻挡层,其用作钝化侧壁的衬里,这提供与钝化材料的良好粘合。在阻挡层上形成多层金属堆叠,在一个实例中,所述多层金属堆叠可包含钯(Pd)作为最上层金属互连层上方的镍层上的最终(顶部)层,以提供用于引线接合的稳定表面。Pd是具有低氧化倾向的铂族金属,且是用于接合垫的良好外部罩盖层,以防止对其下方的可氧化的最上层金属互连层材料的化学侵蚀。
一些IC装置具有铝接合垫。由于在焊接过程期间形成阻止焊料粘合的氧化铝,所以焊料通常无法在铝上隆起。因此,用于焊接到铝接合垫的常规焊料凸块工艺通常需要在铝上形成复合堆叠,所述复合堆叠包含耐火金属基阻挡层,然后是铜晶种层,随后是电镀铜重定向层(RDL),然后是电镀铜重定向层上面的凸块下金属化层(UBM),其中然后在UBM上形成焊料凸块(或焊球)。
发明内容
在所述实施例中,一种形成接合垫的方法包含提供衬底,所述衬底包含形成在其上的至少一个集成电路(IC)装置,所述IC装置具有可氧化的最上层金属互连层,所述最上层金属互连层提供耦合到所述IC装置上的电路节点的多个接合垫。所述多个接合垫包含金属接合垫区域。将含钴连接层直接沉积在所述金属接合垫区域上。将所述含钴连接层图案化以提供用于所述多个接合垫的钴接合垫表面,且在所述钴接合垫表面上形成焊接材料。
附图说明
图1是展示根据实例实施例的用于形成具有IC装置的可氧化的最上层金属互连层的金属接合垫区域的接合垫的实例方法中的步骤的流程图,所述IC装置包含直接在金属垫区域上的含钴连接层以提供钴接合垫表面,其中焊接材料在钴接合垫表面上。
图2A到2F展示了对应于与相对于图1展示及描述的方法相关联的结构的连续横截面图。
图3是根据实例实施例的实例IC装置的横截面图,所述IC装置包含具有含钴连接层的实例接合垫,所述含钴连接层直接在金属接合垫区域上且也任选地直接在电介质钝化沟槽的侧壁上。
具体实施方式
在本发明中,一些动作或事件可以与其它动作或事件不同的顺序发生及/或与其它动作或事件同时发生,且一些所说明的动作或事件是任选的。
实例实施例包含用于在集成电路(IC)上形成接合垫的方法,所述方法包含直接在金属接合垫区域上形成用于可氧化金属或不可焊接材料(例如,Ti、TiN、TiW或TiAl3)的含钴连接层,其已经被发现允许直接在含钴连接层上形成焊接材料(例如,焊料凸块)。所揭示的方法允许焊料直接在晶片制造处理之后凸起,而不需要常规地在如上所述的晶片制造之后添加包含耐火金属基阻挡层、铜晶种层及重定向层(RDL)的复合金属堆叠,然后进行凸块下金属化(UBM)处理。
所揭示的方法包含提供衬底(晶片),所述衬底包含形成于其上的至少一个集成电路(IC)装置,所述IC装置具有可氧化的最上层金属互连层,所述最上层金属互连层提供耦合到所述IC装置上的电路节点的多个接合垫。接合垫包含金属接合垫区域。可氧化的最上层金属互连件可包含铝。将含钴连接层直接沉积(例如,溅镀)在所述金属接合垫区域上。将所述含钴连接层图案化以在接合垫上提供钴接合垫表面,且然后在所述钴接合垫表面上形成焊接材料(例如,焊料凸块或焊球)。例如,在包含铝的可氧化的最上层金属互连件的情况下,接合垫堆叠是铝-钴-焊料(例如,Al-Co-SnAg)。
图1是展示根据实例实施例的实例方法100中的步骤的流程图,所述方法用于在IC装置的可氧化的最上层金属互连层的金属接合垫区域上直接形成含钴连接层以形成钴接合垫表面,且然后在钴接合垫表面上形成焊接材料。步骤101包含提供衬底(晶片),所述衬底具有形成于其上的至少一个IC装置裸片,所述IC装置裸片具有可氧化的最上层金属互连层,所述最上层金属互连层提供耦合到所述IC装置上的电路节点的多个接合垫。
接合垫各自包含金属接合垫区域。任选地,金属接合垫区域上的至少一个钝化层可在金属接合垫区域上方提供界定暴露的接合垫区域的沟槽,所述沟槽包含电介质侧壁。图2A是对应于步骤101中提供的结构的实例横截面描绘。M3可为通过形成在被展示为ILD3的第三层间电介质层中的通路124连接到M4的铝,所述M4也是铝且是可氧化的最上层金属互连层。电介质钝化层被展示为146/147(例如,氧化硅上的氮化硅或氮氧化硅)。
衬底可包含硅、硅锗或包含III-V族或II-VI族材料的其它半导体材料。最上层金属互连层(在图2A到2F中被展示为RDL M4(下文称为M4))可包含铜或铝或其合金、不可焊接垫材料(例如Ti金属)或Ti复合材料(例如TiN、TiW或TiAl3)。在一个实施例中,最上层金属互连层按重量计主要包含铝。在另一实施例中,最上层金属互连层按重量计主要包含铜。
步骤102包含将含钴连接层直接沉积在所述金属接合垫区域上。含钴连接层可实质上全(按重量计≥99%)包含钴或钴合金,所述钴合金包含钴以及至少一种过渡金属,例如浓度从2wt.%到60wt.%的另一过渡金属(例如,Pt)或未从焊接工艺条件形成电介质层(例如氧化物或氮化物,其也提供良好的焊料粘合)的其它过渡金属。
当电介质钝化层在接合垫周围提供包含电介质侧壁的沟槽时,含钴连接层也通常直接位于沟槽的电介质侧壁上。通过将含钴连接层延伸到钝化层的相邻平坦部分,含钴连接层提供了罩盖层,其对金属垫材料(参见下文描述的图2D)(例如铝)提供腐蚀保护。如本文所使用,含钴连接层“直接在金属垫区域上”包含常规的触点布置,其中最上层金属互连层具有在室温下形成的原生氧化物层,其可厚达约2nm,例如在铝的情况下主要是氧化铝且在铜的情况下是主要是Cu2O。直接含钴连接层附接消除了在金属垫材料(例如,铝)上的阻挡层的需要。
可将钴溅镀靶材用于衬底(例如,晶片)表面上的溅镀涂覆来溅镀沉积含钴连接层。钴溅镀可在相对较低的温度(例如从25℃到300℃)下执行。含钴连接层的厚度通常为100埃(A)到4μm,例如从0.1μm到1μm厚。此外,含钴连接层可为较厚的,例如从4μm到10μm。
图2B是对应于步骤102之后的结构的实例横截面描绘。含钴连接层被展示为210。在沉积含钴连接层210之前,所述方法可包含用溅镀蚀刻法(等离子体工艺)除去可氧化的最上层金属互连层的表面上的原生氧化物(例如在铝的情况下为氧化铝),使得含钴连接层下方的原生氧化物可<5A厚。
步骤103包含将含钴连接层210图案化以在接合垫上提供钴接合垫表面。使用光致抗蚀剂制造图案的湿式蚀刻可用于图案化,包含当存在时除去钝化层顶部上方的覆盖含钴连接层的几乎所有接合垫边缘,同时保留接合垫区域内的含钴连接层。实例湿式钴蚀刻包含磷酸及硝酸,或相关的酸混合物。
图2C是对应于在步骤103的遮蔽部分(被展示为图2C右侧的步骤1031)之后的结构的实例横截面描绘,其展示经图案化遮蔽材料251,例如光致抗蚀剂。图2D是对应于在步骤103的钴蚀刻部分(被展示为图2D右侧的步骤1032)之后的结构的实例横截面描绘,其展示含钴连接层210现在为经图案化层。图2E是对应于在步骤103的钴蚀刻部分(被展示为图2E右侧的步骤1033)之后剥离遮蔽材料251之后的结构的实例横截面描绘。
步骤104包含在钴接合垫表面上形成焊接材料。如本文所使用,“焊接材料”是指用于将熔点低于450℃的金属工件结合在一起的可熔金属合金。步骤104可包含常规的焊接工艺,例如常规的焊剂+模板+放置+焊接过程。焊接材料可直接形成在钴接合垫表面上。实例焊接材料通常包含Sn及Ag,且通常呈焊料凸块或焊球的形式。均被发现非常适于提供与含钴连接层的良好粘合性及低电阻接触的实例特定焊料组合物包含Sn96.5Ag3Cu0.5、Sn63Pb37及SnPb(35.6)Ag(2)Sb(0.4)。图2F是对应于在直接在钴接合垫表面上形成焊接材料(被展示为焊球257)(被展示为图2F右侧的步骤104)之后的结构的实例横截面描绘。
图3是根据实例实施例的IC装置300的横截面图,所述IC装置包含具有含钴连接层210的实例接合垫,所述含钴连接层直接处于可氧化的最上层金属互连层的金属接合垫区域上且还任选地直接处于沟槽的电介质侧壁上。金属堆叠被展示为包含被展示为分别在顶部半导体表面上的电介质层上镶嵌到ILD1、ILD2及ILD3中的M1、M2及M3的三(3)层金属互连件,所述电介质层可称为在另一电介质层116上的金属前电介质(PMD)115,例如热生长氧化硅层。被展示为M4的最上层第四金属互连层用作RDL,其提供被展示为金属接合垫区域141及金属接合垫区域142的接合垫金属区域。被展示为133的电介质层在ILD3上,其提供蚀刻止挡件,例如包含氮化硅。
插塞121被展示为将M3耦合到M2,插塞122将M2耦合到M1,且插塞123将M1耦合到被展示为扩散区(例如,n+或p+)的节点109a及被展示为栅极电极节点(未展示的电路)的节点109b,其中在一个实施例中,109b是与衬底108的半导体表面(例如含硅表面)上的栅极电介质111上的金属氧化物半导体(MOS)栅极112的触点。插塞121、122、123及124均可包含钨或其它合适的导电插塞材料。
M4包含可氧化的金属材料,例如被展示为形成于ILD4中的铝。所展示的阻挡层127在M4为铝的情况下是不需要的,但是对于包含铜的M4也可包含在内,例如包含Ta、TaN、Ti或TiN的阻挡层127。金属接合垫区域141及142被展示为通过电介质层133及ILD3由插塞124耦合到M3,且从M3一直耦合到半导体表面上的特征,例如从金属接合垫区域141耦合到节点109b。
IC装置300包含至少一个电介质钝化层,其在金属接合垫区域141及142上方界定沟槽,其中图3中所展示的钝化是蚀刻止挡层145(例如,氮化硅)上的第二电介质层146(例如,氧化硅或氮氧化硅)上的第一电介质层147(例如,氮化硅或氮氧化硅)。含钴连接层210直接接触沟槽的电介质侧壁且直接连接到金属接合垫区域141及142的顶表面,使得不存在常规的中间阻挡层(例如折射性含金属阻挡层)。焊球257被展示为直接在由含钴连接层210提供的钴接合垫表面上。实例实施例认识到,含钴连接层提供与电介质层(例如氧化硅及氮化硅)的牢固的粘合,其实现直接连接含钴连接层且因此消除了与电介质层(例如,氧化硅及氮化硅)的适当粘合所需的(例如常规金属所需要的)常规阻挡层处理。
任选地,可将另一导电材料层定位在含钴连接层上。直接在最上层金属互连层的金属垫区域上具有所揭示的钴接合垫表面的IC装置将通常例如通过消除对双层UBM及电镀RDL的需要而减少后段工艺(BEOL)处理成本及循环时间。由于能够使用相对较薄的钴连接层(其可小于1μm厚),所以可将焊接材料(例如,焊球)直接放置在垫上。由于减少含钴连接层厚度,所以减少了接合垫上含钴连接层加上焊料的堆叠高度,这有利于高度有限制的应用。
所揭示的实施例可集成到多种组合流程中以形成多种不同的半导体IC装置及相关产品。组合件可包含单个半导体裸片或多个半导体裸片,例如包含多个堆叠半导体裸片的PoP(堆叠式封装)配置。可使用各种封装衬底。所述半导体裸片可包含其中的各种元件及/或其上的各种层,包含阻挡层、电介质层、装置结构、有源元件及无源元件(例如源极区域、漏极区域、位线、基极、发射极、集电极、导线及导电通路)。此外,所述半导体裸片可由多种工艺构成,包含双极型、绝缘栅双极型晶体管(IGBT)、CMOS、BiCMOS及MEMS。
修改在所描述的实施例中是可行的,并且其它实施例在权利要求书的范围内是可行的。例如,可替换某些过渡金属或金属合金(例如,用Pt替换Co),前提是它们未从焊接工艺条件形成电介质层(例如,氧化物或氮化物)且未提供良好的焊料粘合。
Claims (20)
1.一种形成接合垫的方法,其包括:
提供衬底,所述衬底包含形成在其上的至少一个集成电路IC装置,所述IC装置具有可氧化的最上层金属互连层,所述最上层金属互连层提供耦合到所述IC装置上的电路节点的多个接合垫,所述多个接合垫包含金属接合垫区域;
将含钴连接层直接沉积在所述金属接合垫区域上;
将所述含钴连接层图案化以在所述多个接合垫上提供钴接合垫表面;及
在所述钴接合垫表面上形成焊接材料。
2.根据权利要求1所述的方法,其中所述提供所述衬底进一步包含在所述金属接合垫区域上方的界定包含电介质侧壁的沟槽的至少一个图案化钝化层,且其中所述含钴连接层直接在所述电介质侧壁上延伸到所述钝化层上以完全罩盖所述金属接合垫区域。
3.根据权利要求1所述的方法,其中所述沉积包含溅镀,所述方法进一步包括:在所述溅镀之前,使用包含溅镀蚀刻的方法除去所述最上层金属互连层的表面上的原生氧化物。
4.根据权利要求1所述的方法,其中所述最上层金属互连层按重量计主要包含铝。
5.根据权利要求1所述的方法,其中所述焊接材料包含焊球,所述焊球包含Sn及Ag两者。
6.根据权利要求1所述的方法,其中所述最上层金属互连层按重量计主要包含铜、钛或钛化合物材料。
7.根据权利要求1所述的方法,其中所述将所述含钴连接层图案化包含将所述含钴连接层上的光致抗蚀剂层图案化,且接着对所述含钴连接层进行湿式蚀刻。
8.根据权利要求1所述的方法,其中所述含钴连接层包含浓度从2wt.%到60wt.%的至少一种非钴过渡金属。
9.根据权利要求1所述的方法,其中所述含钴连接层的厚度介于100埃厚到2μm厚之间。
10.根据权利要求1所述的方法,其中所述焊接材料直接处于所述钴接合垫表面上,且其中所述含钴连接层按重量计包含至少99%的钴。
11.一种形成接合垫的方法,其包括:
提供衬底,所述衬底包含形成在其上的至少一个集成电路IC装置,所述IC装置具有可氧化的最上层金属互连层,所述最上层金属互连层提供耦合到所述IC装置上的电路节点的多个接合垫,所述多个接合垫包含金属接合垫区域;
将含钴连接层直接沉积在所述金属接合垫区域上;及
将所述含钴连接层图案化以在所述多个接合垫上提供钴接合垫表面。
12.一种集成电路IC,其包括:
衬底,其包含形成在其上的至少一个IC装置;
多个金属互连层,其包含可氧化的最上层金属互连层,所述最上层金属互连层提供耦合到所述IC装置上的电路节点的多个接合垫,所述多个接合垫包含金属接合垫区域;
含钴连接层,其包含直接处于所述金属接合垫区域上的钴接合垫表面;及
焊接材料,其处于所述钴接合垫表面上。
13.根据权利要求12所述的IC,其进一步包括在所述金属接合垫区域上方的界定包含电介质侧壁的沟槽的至少一个图案化电介质钝化层(钝化层),且其中所述含钴连接层直接在所述电介质侧壁上延伸到所述钝化层上以完全罩盖所述金属接合垫区域。
14.根据权利要求12所述的IC,其中所述最上层金属互连层按重量计主要包含铝。
15.根据权利要求12所述的IC,其中所述焊接材料包含焊球,所述焊球包含Sn及Ag两者。
16.根据权利要求12所述的IC,其中所述最上层金属互连层按重量计包含铜、钛或钛化合物材料。
17.根据权利要求12所述的IC,其中所述含钴连接层包含浓度从2wt.%到60wt.%的至少一种非钴过渡金属。
18.根据权利要求12所述的IC,其中所述含钴连接层的厚度介于100埃厚到2μm厚之间。
19.根据权利要求12所述的IC,其中所述衬底包含硅。
20.根据权利要求12所述的IC,其中所述焊接材料直接处于所述钴接合垫表面上,且其中所述含钴连接层按重量计包含至少99%的钴。
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US14/665,799 US9960135B2 (en) | 2015-03-23 | 2015-03-23 | Metal bond pad with cobalt interconnect layer and solder thereon |
PCT/US2016/023785 WO2016154315A1 (en) | 2015-03-23 | 2016-03-23 | Metal bond pad with cobalt interconnect layer and solder thereon |
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