CN107425071A - 一种具有抗单粒子辐照能力的vdmos器件 - Google Patents

一种具有抗单粒子辐照能力的vdmos器件 Download PDF

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CN107425071A
CN107425071A CN201710682472.3A CN201710682472A CN107425071A CN 107425071 A CN107425071 A CN 107425071A CN 201710682472 A CN201710682472 A CN 201710682472A CN 107425071 A CN107425071 A CN 107425071A
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type semiconductor
conductive type
drift region
single particle
conductive
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CN107425071B (zh
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李泽宏
林育赐
谢驰
罗蕾
李佳驹
任敏
张波
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Hangzhou Xinmai Semiconductor Technology Co ltd
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University of Electronic Science and Technology of China
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0922—Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0927—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors comprising a P-well only in the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356—Disposition, e.g. buried gate electrode

Abstract

本发明提供了一种具有抗单粒子辐照能力的VDMOS器件，属于功率器件技术领域。本发明在传统VDMOS器件中形成具有不同禁带宽度的漂移区，单粒子辐照时，不同禁带宽度漂移区之间形成空穴的势阱，在势阱的作用下，改变了单粒子辐照产生空穴的路径，进而避免了传统器件空穴经由N+源区下方的P型体区致使寄生晶闸管开启的缺陷，从而提高了器件的抗单粒子辐照能力，从而提高了器件的抗单粒子辐照能力；同时本发明采用分立栅结构在降低密勒电容的同时也显著降低单粒子栅穿的概率。

Description

一种具有抗单粒子辐照能力的VDMOS器件
技术领域
本发明属于功率器件技术领域，具体涉及一种具有抗单粒子辐照能力的VDMOS器件。
背景技术
随着电力电子技术向高频大功率应用领域的快速发展，VDMOS成为电力电子领域中的不可替代的重要器件之一，VDMOS在电力电子电路的应用日益广泛。VDMOS器件通常采用二次扩散或离子注入技术形成，是多元胞器件，易于集成，功率密度，且多子导电，频率特性好。目前VDMOS是功率MOS的主流器件之一。作为功率开关，VDMOS具有耐压高、开关速度快、低导通电阻、低驱动功率、良好热稳定性、低噪声及简单的制造工艺等优点而广泛的用于开关电源、交流传动、变频电源、计算机设备等各种领域，并取得理想效果。但是在空间条件下重离子诱发VDMOS器件发生的单粒子效应会使电路系统出现短暂故障，或直接导致VDMOS器件损坏，严重威胁所在电子系统的安全，并且随着芯片尺寸的减小，器件性能的提升，电流密度和元胞密度都在增加，单粒子效应会越来越明显，器件对单粒子辐照的敏感度也大幅提高。因此，如何提升空间电子系统中使用的功率VDMOS器件的抗单粒子辐照能力，成为了本领域亟待解决的技术问题。
VDMOS的单粒子效应主要分为单粒子烧毁(SEB)和单粒子栅穿(SEGR)。当功率MOS管关断时，会发生SEGR损伤，即当重离子轰击在栅极下侧时，衬底内的径迹附近产生高密度等离子体，在电场作用下，电子空穴对相对漂移，形成栅极下侧的电荷积累，此时，栅极类似具有大量电荷积累的电容，当电容两端压差足够高时，会击穿栅氧结构，从而造成不可恢复的物理损伤。
VDMOS的N+源区、Pbody和N-漂移区之间，存在着一个寄生晶体管结构，而N+源区、Pbody和N-漂移区分别构成寄生晶体管的发射区、基区和集电区。一般情况下，寄生晶体管的发射极和基极通过源极实现短路，从而对器件的外部特性不产生影响。在辐照环境下，注入粒子在VDMOS器件内产生大量电子空穴对，在漂移场和扩散双重作用下，经扩散和漂移形成瞬发电流。瞬发电流的横向扩散在基区的电阻上产生压降，当压降增大到一定值时，寄生晶体管导通。当MOS晶体管的漏源电压大于击穿电压时，流过晶体管的电流可以进一步反馈，使得耗尽区的电流密度逐渐上升，造成漏-源间二次击穿，如果结温超过允许值，则引起源-漏结的烧毁。故而，减小VDMOS器件N+源区下方的电阻，也就是增大Pbody区浓度是提高器件抗单粒子烧毁的有效方法。然而，出于对器件阈值的考虑，Pbody区浓度又不宜过大，故此，通过增大Pbody区浓度以减小VDMOS器件N+源区下方电阻这一方法无法明显提高器件的抗单粒子辐照能力。因此亟需一种能够提高VDMOS器件抗单粒子辐照能力的方法。
发明内容
本发明所要解决的技术问题在于：提高一种具有抗单粒子辐照能力的VDMOS器件。
本发明为解决上述技术问题提供如下技术方案：
一种具有抗单粒子辐照能力的VDMOS器件，包括第一导电类型半导体衬底(9)、位于第一导电类型半导体衬底(9)背面的金属化漏极(10)、位于第一导电类型半导体衬底(9)正面的第一导电类型半导体漂移区一(8)；第一导电类型半导体漂移区一(8)的正面还具有第一导电类型半导体漂移区二(11)和第一导电类型半导体漂移区三(12)，其中，第一导电类型半导体漂移区三(12)居中而第一导电类型半导体漂移区二(11)位于其两侧或者外围并与之相接触；所述第一导电类型半导体漂移区三(12)中具有第二导电类型半导体柱(13)，所述第一导电类型半导体漂移区三(12)的上、下表面均与所述第一导电类型半导体漂移区二(11)重合；第一导电类型半导体漂移区三(12)两侧的导电类型半导体漂移区二(11)中分别具有第二导电类型半导体体区(6)，第二导电类型半导体体区(6)中分别具有相互独立的第一导电类型半导体源区(5)和第二导电类型重半导体接触区(7)；第二导电类型半导体柱(13)、第一导电类型半导体源区(5)和第二导电类型重半导体接触区(7)三者均与金属化源极(1)相接触；栅介质层(3)位于每个导电类型半导体漂移区二(11)与相靠近侧的第一导电类型半导体漂移区三(12)、第二导电类型半导体体区(6)和部分第一导电类型半导体源区(5)的上表面，栅介质层(3)上表面是多晶硅栅电极(2)，多晶硅栅电极(2)与金属化源极(1)之间是绝缘介质层(4)；其特征在于：所述第二导电类型半导体柱(13)的上表面与第一导电类型半导体漂移区三(12)的上表面重合，且所述第二导电类型半导体柱(13)的深度小于第一导电类型半导体漂移区三(12)的深度；第一导电类型半导体漂移区一(8)及其内的第一导电类型半导体漂移区二(11)和第一导电类型半导体漂移区三(12)三者掺杂浓度相同，且第一导电类型半导体漂移区三(12)材料的禁带宽度小于第一导电类型半导体漂移区一(8)材料的禁带宽度，第一导电类型半导体漂移区一(8)材料的禁带宽度小于第一导电类型半导体漂移区二(11)材料的禁带宽度。
进一步的是，本发明中第一导电类型半导体为P型，第二导电类型半导体为N型。
进一步的是，本发明中第一导电类型半导体为N型，第二导电类型半导体为P型。
进一步的是，本发明中第一导电类型半导体或者所述第二导带类型半导体的材料为体硅、碳化硅、砷化镓、磷化铟或者锗硅复合材料。
本发明的有益效果在于：
(1)本发明通过在传统VDMOS器件的漂移区中采用具有不同禁带宽度的材料，当单粒子在入射至本发明VDMOS器件时，禁带宽度不同的漂移区之间形成了空穴的势阱，在势阱作用下改变单粒子辐照时产生空穴的路径，进而避免了传统器件空穴经由N+源区下方的P型体区致使寄生晶闸管开启的缺陷，从而提高了器件的抗单粒子辐照能力。
(2)本发明器件结构采用分立栅结构，不仅降低了密勒电容而且由于减小了栅介质层的面积进而显著降低了单粒子栅穿的概率。
附图说明
图1是本发明提供的一种具有抗单粒子辐照能力的VDMOS器件的结构示意图；
图2是本发明提供的一种具有抗单粒子辐照能力的VDMOS器件中第一导电类型半导体漂移区二与第一导电类型半导体漂移区及第一导电类型半导体漂移区三所形成的能带图，其中，I为第一导电类型半导体漂移区二，II为势阱区，III为第一导电类型半导体漂移区一及第一导电类型半导体漂移区三；
图3是本发明提供的一种具有抗单粒子辐照能力的VDMOS器件中第一导电类型半导体漂移区一与第一导电类型半导体漂移区三所形成的能带图，其中，I为第一导电类型半导体漂移区一，II为势阱区，III为第一导电类型半导体漂移区三；
图4是本发明提供的一种具有抗单粒子辐照能力的VDMOS器件中第一导电类型半导体漂移区三与第二导电类型半导体柱所形成的能带图，其中，I为第一导电类型半导体漂移区三，II为势阱区，III为第二导电类型半导体柱；
图5是本发明提供的一种具有抗单粒子辐照能力的VDMOS器件中在单粒子入射在JFET区时的电子和空穴流向图；
图6是传统VDMOS器件中在单粒子入射在JFET区时的电子和空穴流向图；
图7是本发明提供的一种具有抗单粒子辐照能力的VDMOS器件在单粒子入射在沟道区时的电子和空穴流向图；
图中：1为金属化源极，2为多晶硅栅电极。3为栅介质层，4为绝缘介质层，5为第一导电类型半导体源区，6为第二导电类型半导体体区，7为第二导电类型半导体接触区，8为第一导电类型半导体漂移区一，9为第一导电类型半导体衬底，10为金属化漏极，11为第一导电类型半导体漂移区二，12为第一导电类型半导体漂移区三，13为第二导电类型半导体柱。
具体实施方式
下面参照附图对本发明进行更全面的描述，在附图中相同的标号表示相同或者相似的组件或者元素。本发明意在提供一种具有抗单粒子辐照能力的VDMOS器件，本发明VDMOS器件可以是P型VDMOS器件，也可以是N型VDMOS器件。
实施例：
如图1所示，本实施例提供一种具有抗单粒子辐照能力的VDMOS器件，包括第一导电类型半导体衬底9、位于第一导电类型半导体衬底9背面的金属化漏极10、位于第一导电类型半导体衬底9正面的第一导电类型半导体漂移区一8；第一导电类型半导体漂移区一8的正面还具有第一导电类型半导体漂移区二11和第一导电类型半导体漂移区三12，其中，第一导电类型半导体漂移区三12居中而第一导电类型半导体漂移区二11位于其两侧或者外围并与之相接触；所述第一导电类型半导体漂移区三12中具有第二导电类型半导体柱13，所述第一导电类型半导体漂移区三12的上、下表面均与所述第一导电类型半导体漂移区二11重合；第一导电类型半导体漂移区三12两侧的导电类型半导体漂移区二11中分别具有第二导电类型半导体体区6，第二导电类型半导体体区6中分别具有相互独立的第一导电类型半导体源区5和第二导电类型重半导体接触区7；第二导电类型半导体柱13、第一导电类型半导体源区5和第二导电类型重半导体接触区7三者均与金属化源极1相接触；栅介质层3位于每个导电类型半导体漂移区二11与相靠近侧的第一导电类型半导体漂移区三12、第二导电类型半导体体区6和部分第一导电类型半导体源区5的上表面，栅介质层3上表面是多晶硅栅电极2，多晶硅栅电极2与金属化源极1之间是绝缘介质层4；其特征在于：所述第二导电类型半导体柱13的上表面与第一导电类型半导体漂移区三12的上表面重合，且所述第二导电类型半导体柱13的深度小于第一导电类型半导体漂移区三12的深度；第一导电类型半导体漂移区一8及其内的第一导电类型半导体漂移区二11和第一导电类型半导体漂移区三12三者掺杂浓度相同，且第一导电类型半导体漂移区三12材料的禁带宽度小于第一导电类型半导体漂移区一8材料的禁带宽度，第一导电类型半导体漂移区一8材料的禁带宽度小于第一导电类型半导体漂移区二11材料的禁带宽度。
本发明的要旨是通过改进使得VDMOS器件具有抗单粒子辐照能力，基于上述技术方案，当第一导电类型半导体为P型半导体而第二导电类型半导体为N型半导体时，本发明提供的器件为P沟道VDMOS器件；当第一导电类型半导体为N型半导体而第二导电类型半导体为P型半导体时，本发明提供的器件为N沟道VDMOS器件。下面具体以N沟道VDMOS器件为例对本发明的原理进行详细说明，相应地，P沟道VDMOS器件与之类似，在此不再赘述。
本发明的工作原理：
传统VDMOS器件中漂移区通常采用硅材料，而本发明中漂移区采用具有不同禁带宽度的材料，禁带宽度不同的漂移区之间形成了空穴的势阱。
如图2所示为N-漂移区二11与N-漂移区一8及N-漂移区三12形成能带图的示意图。从图中可以看出：由于禁带宽度的不同，能带发生弯曲，形成了从N-漂移区二11到N-漂移区一8及N-漂移区三12的空穴势阱；具体而言，就是N-漂移区二11中空穴在势阱的作用下会漂移到N-漂移区一8及N-漂移区三12中，且N-漂移区二11与N-漂移区一8的空穴势阱qV1小于N-漂移区二11与N-漂移区三12的空穴势阱qV2，所以N-漂移区二11中的空穴更容易漂移到N-漂移区三12中。
如图3所示为N-漂移区一8与N-漂移区三12形成能带的示意图，从图中可以看出：由于禁带宽度的不同，能带发生弯曲，形成了从N-漂移区一8到N-漂移区三12的空穴势阱；具体而言，就是N-漂移区一8中空穴在势阱qV3的作用下会漂移到N-漂移区三12中。
如图4所示为N-漂移区三12与P型柱13形成能带的示意图，由于PN结的存在，形成了从N-漂移区三12到P型柱13的空穴势阱，在势阱的作用下，N-漂移区三12的空穴会漂移至P型柱13中，然后从金属化源极1流出。
结合图5来看，当单粒子入射在本发明的VDMOS器件的JFET区时，由于P型柱13直接与金属化源极1相连，且N-漂移区一8与N-漂移区三12之间、N-漂移区三12与P型柱13之间形成空穴势阱，所以单粒子径迹中所产生的空穴全部经由P型柱13流出金属化源极1，不经由N+源区5下方的P型体区6，因而不会引起寄生晶闸管开启。
而对于传统VDMOS器件而言，如图6所示，当单粒子入射在其JFET区时，空穴只能经由N+源区下方的P型体区流到金属化源极，容易造成寄生晶体管开启。
如图7所示，当单粒子入射在本发明的VDMOS器件的沟道区时，由于N-漂移区一8和N-漂移区二11与N-漂移区三12之间形成空穴势阱，在N-漂移区二11和N-漂移区一8内的空穴在势阱的作用下漂移到N-漂移区三12，再经由P型柱13流出金属化源极1，只有部分在P型体区6中的空穴才从P型体区流出金属化源极1，所以当单粒子入射在VDMOS器件的沟道区时，本发明的VDMOS器件结构也具有很高的抗单粒子烧毁能力。
综上所述，本发明提供的一种具有抗单粒子辐照能力的VDMOS器件无论单粒子入射在任何位置都有较好的抗单粒子烧毁能力。
此外，本发明器件结构将栅极结构设置为相互独立的分立形式，由于多晶硅栅电极2之间隔着金属化源极1，减小了栅介质层3的面积，能够显著降低单粒子栅穿的概率；同时分立栅结构也降低了密勒电容。
以上结合附图对本发明的实施例进行了阐述，但是本发明并不局限于上述的具体实施方式，上述具体实施方式仅仅是示意性的，而不是限制性的，本领域的普通技术人员在本发明的启示下，在不脱离本发明宗旨和权利要求所保护的范围情况下，还可做出很多形式，这些均属于本发明的保护之内。

Claims (4)

1.一种具有抗单粒子辐照能力的VDMOS器件，包括第一导电类型半导体衬底(9)、位于第一导电类型半导体衬底(9)背面的金属化漏极(10)、位于第一导电类型半导体衬底(9)正面的第一导电类型半导体漂移区一(8)；第一导电类型半导体漂移区一(8)的正面还具有第一导电类型半导体漂移区二(11)和第一导电类型半导体漂移区三(12)，其中，第一导电类型半导体漂移区三(12)居中而第一导电类型半导体漂移区二(11)位于其两侧或者外围并与之相接触；所述第一导电类型半导体漂移区三(12)中具有第二导电类型半导体柱(13)，所述第一导电类型半导体漂移区三(12)的上、下表面均与所述第一导电类型半导体漂移区二(11)重合；第一导电类型半导体漂移区三(12)两侧的导电类型半导体漂移区二(11)中分别具有第二导电类型半导体体区(6)，第二导电类型半导体体区(6)中分别具有相互独立的第一导电类型半导体源区(5)和第二导电类型重半导体接触区(7)；第二导电类型半导体柱(13)、第一导电类型半导体源区(5)和第二导电类型重半导体接触区(7)三者均与金属化源极(1)相接触；栅介质层(3)位于每个导电类型半导体漂移区二(11)与相靠近侧的第一导电类型半导体漂移区三(12)、第二导电类型半导体体区(6)和部分第一导电类型半导体源区(5)的上表面，栅介质层(3)上表面是多晶硅栅电极(2)，多晶硅栅电极(2)与金属化源极(1)之间是绝缘介质层(4)；其特征在于：所述第二导电类型半导体柱(13)的上表面与第一导电类型半导体漂移区三(12)的上表面重合，且所述第二导电类型半导体柱(13)的深度小于第一导电类型半导体漂移区三(12)的深度；第一导电类型半导体漂移区一(8)及其内的第一导电类型半导体漂移区二(11)和第一导电类型半导体漂移区三(12)三者掺杂浓度相同，且第一导电类型半导体漂移区三(12)材料的禁带宽度小于第一导电类型半导体漂移区一(8)材料的禁带宽度，第一导电类型半导体漂移区一(8)材料的禁带宽度小于第一导电类型半导体漂移区二(11)材料的禁带宽度。
2.根据权利要求1所述的一种具有抗单粒子辐照能力的VDMOS器件，其特征在于，第一导电类型半导体为P型，第二导电类型半导体为N型。
3.根据权利要求1所述的一种具有抗单粒子辐照能力的VDMOS器件，其特征在于，第一导电类型半导体为N型，第二导电类型半导体为P型。
4.根据权利要求1所述的一种具有抗单粒子辐照能力的VDMOS器件，其特征在于，第一导电类型半导体或者所述第二导带类型半导体的材料为体硅、碳化硅、砷化镓、磷化铟或者锗硅复合材料。
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