CN107342271A - 芯片封装结构 - Google Patents

芯片封装结构 Download PDF

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Publication number
CN107342271A
CN107342271A CN201710170548.4A CN201710170548A CN107342271A CN 107342271 A CN107342271 A CN 107342271A CN 201710170548 A CN201710170548 A CN 201710170548A CN 107342271 A CN107342271 A CN 107342271A
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China
Prior art keywords
chip
conductive
certain embodiments
substrate
projection
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Pending
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CN201710170548.4A
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English (en)
Inventor
陈劭昀
陈宪伟
苏安治
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Publication of CN107342271A publication Critical patent/CN107342271A/zh
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Abstract

提供芯片封装结构，其包含基板。芯片封装结构包含芯片封装堆叠于基板上。芯片封装结构包含第一导电凸块配置于芯片封装与基板之间，且第一导电凸块直接接触芯片封装与基板以提供空间。芯片封装结构包含芯片结构，其具有对向设置的第一面与第二面，配置于芯片封装与基板之间的空间，并与第一导电凸块相邻。芯片结构包含至少一芯片。芯片封装结构包含焊料盖，其连接芯片结构的第一面与芯片封装。芯片封装结构包含第二导电凸块，其连接芯片结构的第二面与基板。

Description

芯片封装结构
技术领域
本公开实施例涉及芯片封装结构。
背景技术
半导体集成电路产业已经历快速成长。集成电路材料与设计的技术进步，产生一代又一代的集成电路。每一代的集成电路均比前一代具有更小且更复杂的电路。然而这些进产亦增加集成电路工艺的复杂度。
在集成电路革新中，功能密度(每单位面积的内连线装置数目)增加，而几何尺寸(如工艺所能形成的最小构件或线路)随之缩小。上述尺寸缩小的工艺通常有利于增加产能并降低相关成本。
然而，结构尺寸持续缩小造成工艺越来越难实施。如此一来，如何形成越来越小且可信的半导体装置为目前挑战。
发明内容
本公开的主要目的在于提供一种芯片封装结构，以维持或增加芯片封装与基板之间的导电路径的数目。本公开的主要目的在于提供一种芯片封装结构，以缩短芯片封装与基板之间的导电路径的距离并增加信号传导的速度和增进芯片的效能。
本公开一实施例提供的芯片封装结构，包括：基板；芯片封装，堆叠于基板上；多个第一导电凸块，配置于芯片封装与基板之间并直接接触芯片封装及基板，以提供空间；芯片结构，具有对向设置的第一面与第二面，配置于芯片封装与基板之间的空间中，并与第一导电凸块相邻，其中芯片结构包含至少一芯片；焊料盖，连接芯片结构的第一面与芯片封装；第二导电凸块，连接芯片结构的第二面与基板；以及导电通孔结构，穿过芯片结构的芯片，其中导电通孔结构使焊料盖电性连接至第二导电凸块。
本公开提供的晶体封装结构的优点和有益效果在于：芯片封装结构具有芯片结构于芯片封装与基板(或另一芯片封装)之间。芯片结构具有导电通孔结构使芯片封装电性连接至基板，因此芯片结构具有导电凸块的功能。如此一来，芯片结构可维持或增加芯片封装与基板之间的导电路径的数目。如此一来，芯片结构可缩短芯片封装与基板之间的导电路径的距离并增加信号传导的速度和增进芯片的效能。
附图说明
图1A为一些实施例中，芯片封装结构的剖视图。
图1B为一些实施例中，芯片封装结构的芯片结构、焊料盖、与导电凸块的剖视图。
图2为一实施例中，芯片封装结构的剖视图。
图3为一些实施例中，芯片封装结构的剖视图。
图4为一些实施例中，芯片封装结构的剖视图。
图5为一些实施例中，芯片封装结构的剖视图。
图6为一些实施例中，芯片封装结构的剖视图。
附图标记说明：
A 内壁
D1、D2、D3 距离
F1 第一面
F2 第二面
H1、H2、H3、H4 最大高度
L 导电柱
OP1、OP2、147a 开口
P、114a、114b、128c、128d、143c、148、181c、181d、181f、182a、183a 导电垫
R、111、181g 凹陷
TH 穿孔
W1、W2、W3、W4 最大宽度
W5、W6 宽度
100、200、300、400、500 芯片封装结构
110 基板
112、128a、129a、129b、143a、181a 介电层
116 线路层
118 导电通孔
120、180 芯片封装
122 芯片结构
122a、141、182、183 芯片
122b 内连线结构
122c、142、144、145、147、149a、149b 绝缘层
124、186 成型化合物
126、146 导电通孔结构
128、143、181 再布线结构
128b、129c、143b、181b 再布线层
128e、143d、181e 导电通孔
130、160、190 导电凸块
140 芯片结构
141a、141b 表面
150 焊料盖
170、210 填充层
184、185 导电线路
具体实施方式
下述内容提供的不同实施例或实例可实施本公开实施例的不同结构。特定构件与排列的实施例用以简化本公开而非局限本公开。举例来说，形成第一结构于第二结构上的叙述包含两者直接接触，或两者之间隔有其他额外结构而非直接接触。此外，本公开的多种实施例或实例可重复标号及/或符号。上述重复仅用以简化并清楚本公开实施例，并不代表不同实施例及/或设置之间采用相同标号的单元具有对应关系。
此外，空间性的相对用语如“下方”、“其下”、“较下方”、“上方”、“较上方”、或类似用语可用于简化说明某一元件与另一元件在附图中的相对关系。空间性的相对用语可延伸至以其他方向使用的装置，而非局限于附图方向。装置亦可转动90°或其他角度，因此方向性用语仅用以说明附图中的方向。应理解的是，在下述方法之前、之中、或之后可进行额外步骤，且其他实施例的方法可省略下述的一些步骤或将其置换为其他步骤。
图1A为一些实施例中，芯片封装结构100的剖视图。图1B为一些实施例中，芯片封装结构100的芯片结构、焊料盖、与导电凸块的剖视图。
如图1A所示的一些实施例，提供芯片封装结构100。在一些实施例中，芯片封装结构100包含基板110、芯片封装120、导电凸块(如焊料球)130、芯片结构140、焊料盖150、与导电凸块(如焊料球)160。基板110包含打印电路板、芯片、或具有线路层的另一合适结构。
在一些实施例中，基板110包含介电层112、导电垫114a与114b、线路层116、与导电通孔118。在一些实施例中，导电垫114a与114b形成于介电层112上。
在一些实施例中，线路层116与导电通孔118形成于介电层112中。在一些实施例中，导电通孔118、线路层116、与导电垫114a与114b彼此电性连接。
在一些实施例中，芯片封装120位于基板110上。在一些实施例中，芯片封装120包含扇出式封装。在一些实施例中，芯片封装120包含芯片结构122、成型化合物124、导电通孔结构126、与再布线结构128。
在一些实施例中，芯片结构122包含芯片122a、内连线结构122b、与绝缘层122c。在一些实施例中，内连线结构122b形成于芯片122a下，以电性连接至芯片122a的导电垫P。在一些实施例中，内连线结构122b包含导电柱或导电凸块。
在一些实施例中，绝缘层122c形成于芯片122a下，并围绕内连线结构122b。绝缘层122c可包含聚合物材料或另一合适的绝缘材料。在一些实施例中，绝缘层122c与内连线结构122b直接接触导电垫P。
在一些实施例中，成型化合物124连续地围绕芯片结构122(或芯片122a)。成型化合物124包含聚合物材料或另一合适的绝缘材料。在一些实施例中，成型化合物124直接接触绝缘层122c、芯片122a、与再布线结构128。
在一些实施例中，导电通孔结构126穿过成型化合物124。在一些实施例中，导电通孔结构126包含导电插塞。导电通孔结构126包含铜、钨、铝、或另一合适的导电材料。
在一些实施例中，再布线结构128形成于芯片结构122、成型化合物124、与导电通孔结构126下。在一些实施例中，再布线结构128位于芯片122a与导电凸块130之间，且位于成型化合物124与导电凸块130之间。
在一些实施例中，再布线结构128包含介电层128a、再布线层128b、导电垫128c与128d、以及导电通孔128e。在一些实施例中，再布线层128b与导电通孔128e位于介电层128a中。
在一些实施例中，导电垫128c与128d位于介电层128a上。在一些实施例中，导电通孔128e位于导电垫128c与128d、再布线层128b、导电通孔结构126、以及内连线结构122b之间。
如此一来，一些实施例中的导电垫128c与128d、再布线层128b、导电通孔结构126、与内连线结构122b可依设计需求，经由导电通孔128e彼此电性连接。在一些实施例中，再布线层128b电性连接至导电通孔结构126。
在一些实施例中，导电凸块130位于芯片封装120与基板110之间。在一些实施例中，每一导电凸块130位于其上的导电垫128c与其下的导电垫114a之间。在一些实施例中，导电凸块130直接接触并电性连接至芯片封装120与基板110。
在一些实施例中，每一导电凸块130直接接触并电性连接至其上的导电垫128c与其下的导电垫114a。在一些实施例中，导电凸块130并不位于芯片封装120的芯片122a与基板110之间。
如图1A与图1B所示的一些实施例，芯片结构140位于芯片封装120与基板110之间。在一些实施例中，芯片结构140具有第一面F1与对向设置的第二面F2。在一些实施例中，第一面F1面向芯片封装120。在一些实施例中，第二面F2面向基板110。在一些实施例中，封装结构140配置以与导电凸块130相邻。在一些实施例中，芯片结构140位于导电凸块130之间。在一些实施例中，导电凸块130分布以围绕芯片结构140。
如图1A与图1B所示的一些实施例，芯片结构140包含芯片141、绝缘层142、再布线结构143、绝缘层144与145、导电通孔结构146、绝缘层147、导电垫148、绝缘层149a与149b、以及导电柱L。
在一些实施例中，芯片141具有对向设置的表面141a与141b。在一些实施例中，绝缘层142形成于表面141b上。在一些实施例中，再布线结构143位于绝缘层142上。
在一些实施例中，再布线结构143包含介电层143a、再布线层143b、导电垫143c、与导电通孔143d。在一些实施例中，再布线层143b与导电通孔143d位于介电层143a中。在一些实施例中，导电垫143c位于介电层143a上。
在一些实施例中，导电通孔143d位于导电垫143c与再布线层143b之间。如此一来，一些实施例中的导电垫143c与再布线层143b可依设计需求，经由导电通孔143d彼此电性连接。
如图1B所示的一些实施例，穿孔TH穿过芯片141与绝缘层142及144。在一些实施例中，绝缘层145形成于穿孔TH的内壁A上。
在一些实施例中，导电通孔结构146各自形成于穿孔TH中。在一些实施例中，导电通孔结构146穿过芯片141。如图1B所示的一些实施例，部分的导电通孔结构146延伸出对应的穿孔TH，并延伸至绝缘层144上。
在一些实施例中，绝缘层147形成于绝缘层144上，并覆盖部分的导电通孔结构146。在一些实施例中，绝缘层147具有开口147a。在一些实施例中，开口147a露出其下的个别的导电通孔结构146。
在一些实施例中，导电垫148形成于个别的开口147a中。在一些实施例中，部分的导电垫148延伸出开口147a，并延伸至绝缘层147上。
在一些实施例中，绝缘层149a形成于绝缘层147上，并覆盖部分的导电垫148。在一些实施例中，绝缘层149a具有开口OP1。在一些实施例中，开口OP1露出其下方的个别的导电垫148。
在一些实施例中，绝缘层149b形成于绝缘层149a上，并覆盖部分的导电垫148。在一些实施例中，绝缘层149b具有开口OP2。在一些实施例中，开口OP2露出其下方的个别的导电垫148。
在一些实施例中，导电柱L形成于个别的开口OP2中。在一些实施例中，部分的导电柱L延伸出对应的开口OP2。
芯片结构140的导电结构(如再布线层143b、导电垫143c、导电通孔143d、导电通孔结构146、导电垫148、或导电柱L)包含铜、铝、钨、或另一合适的导电材料。
如图1B所示的一些实施例，焊料盖150形成于个别的导电柱L上。在一些实施例中，焊料盖150包含焊料材料如锡。如图1B所示的一些实施例，导电凸块160形成于个别的导电垫143c上。如图1B所示的一些实施例，导电凸块160形成于个别的导电垫143c上。在一些实施例中，导电凸块130与160包含焊料材料如锡。
如图1A与图1B所示的一些实施例，焊料盖150位于芯片封装120与芯片结构140之间。在一些实施例中，焊料盖150直接接触芯片封装120与芯片结构140。在一些实施例中，焊料盖150连接芯片结构140的第一面F1与芯片封装120。在一些实施例中，每一焊料盖150位于其下的导电柱L与其上的导电垫128d之间。
在一些实施例中，每一焊料盖150直接接触其下的导电柱L与其上的导电垫128d。在一些实施例中，每一焊料盖150电性连接至其下的导电柱L与其上的导电垫128d。
如图1A与图1B所示的一些实施例，导电凸块160位于芯片结构140与基板110之间。在一些实施例中，导电凸块160直接接触芯片结构140与基板110。在一些实施例中，导电凸块160连接芯片结构140的第二面F2与基板110。在一些实施例中，每一导电凸块160位于其下的导电垫114b与其上的导电垫143c之间。
在一些实施例中，每一导电凸块160直接接触其下的导电垫114b与其上的导电垫143c。在一些实施例中，每一导电凸块160电性连接至其下的导电垫114b与其上的导电垫143c。在一些实施例中，导电通孔结构146使焊料盖150电性连接至导电凸块160。
在一些实施例中，导电凸块130的最大宽度W1大于导电凸块160的最大宽度W2。在一些实施例中，导电凸块160的最大宽度W2大于焊料盖150的最大宽度W3。在一些实施例中，芯片结构140的最大宽度W4大于导电凸块130的最大宽度W1。
在一些实施例中，两相邻的导电凸块130之间的距离D1，大于两相邻的导电凸块160之间的距离D2。在一些实施例中，两相邻的导电凸块160之间的距离D2，大于两相邻的焊料盖150之间的距离D3。
在一些实施例中，焊料盖150、芯片结构140、与导电凸块160各自具有最大高度H2、H3、与H4。在一些实施例中，导电凸块130的最大高度H1大于或等于焊料盖150、芯片结构140、与导电凸块160的最大高度H2、H3、与H4的总合(H1≥H2+H3+H4)。
如图1A所示的一些实施例，芯片封装结构100还包含填充层170。在一些实施例中，填充层170填入芯片封装120与基板110之间。
在一些实施例中，填充层170围绕导电凸块130与160、芯片结构140、与焊料盖150。在一些实施例中，填充层170包含绝缘材料(如聚合物材料)。
如图1A所示的一些实施例，芯片封装结构100还包含芯片封装180。在一些实施例中，芯片封装180位于芯片封装120上。在一些实施例中，芯片封装180包含再布线结构181、芯片182与183、导电线路184与185、与成型化合物186。
在一些实施例中，再布线结构181包含介电层181a、再布线层181b、导电垫181c与181d、以及导电通孔181e。在一些实施例中，再布线层181b与导电通孔181e位于介电层181a中。在一些实施例中，导电垫181c与181d位于介电层181a的相反两侧上。
在一些实施例中，导电通孔181e位于导电垫181c与181d以及再布线层181b之间。如此一来，一些实施例的导电垫181c与181d以及再布线层181d可依设计需求，经由导电通孔181e彼此电性连接。
在一些实施例中，芯片182位于再布线结构181上。在一些实施例中，导电线路184使芯片182其个别的导电垫182a连接(电性地)至个别的导电垫181c。
在一些实施例中，芯片183位于芯片182上。在一些实施例中，导电线路185使芯片183其个别的导电垫183a连接(电性地)至个别的导电垫181c。
在一些实施例中，成型化合物186形成于再布线结构181上，以覆盖芯片182与183及导电线路184与185。在一些实施例中，成型化合物186包含绝缘材料(如聚合物材料)。
如图1A所示的一些实施例，芯片封装结构100还包含导电凸块190。在一些实施例中，导电凸块190形成于导电垫181d与导电通孔结构126之间。在一些实施例中，导电凸块190使导电垫181d电性连接至导电通孔结构126。
如图1A所示的一些实施例，芯片封装结构100还包含填充层210。在一些实施例中，填充层210填入芯片封装180与120之间。在一些实施例中，填充层210连续地围绕导电凸块190与芯片封装180。
在一些实施例中，填充层210包含绝缘材料(如聚合物材料)。在一些实施例中，填充层210还延伸至介电层181a与成型化合物186的侧壁上。在一些实施例中，填充层210围绕介电层181a与成型化合物186。
在一些实施例中，由于芯片结构140具有导电通孔结构146使芯片封装120电性连接至基板110，因此芯片结构140具有导电凸块130的功能。
如此一来，一些实施例中的芯片结构140可维持或增加芯片封装120与基板110之间的导电路径。因此一些实施例中，芯片结构140可改善再布线结构128与线路层116的绕线能力。
此外，芯片结构140亦具有主动装置及/或被动装置。如此一来，一些实施例其芯片封装结构100的尺寸固定下，具有芯片结构140的芯片封装结构100所具有的装置数目，比不具有芯片结构140的芯片封装结构所具有的装置数目多。
如此一来，一些实施例中的芯片结构140可增加芯片封装结构100的装置密度。因此可改善芯片封装结构100的效能。
图2为一些实施例中，芯片封装结构200的剖视图。如图2所示，芯片封装结构200与芯片封装结构100类似，差别在于一些实施例的芯片封装结构200的基板110进一步包含凹陷111。在一些实施例中，导电垫114b形成于凹陷111中与介电层112上。
在一些实施例中，芯片结构140位于凹陷111上。在一些实施例中，芯片结构140包含主动装置及/或被动装置。在一些实施例中，凹陷111的宽度W5大于芯片结构140的最大宽度W4。在一些实施例中，导电凸块160形成于芯片结构140与导电垫114b之间。
在一些实施例中，所有的导电凸块160位于凹陷111中。在一些实施例中，焊料盖150位于凹陷111上。在一些实施例中，焊料盖150位于芯片结构140与导电垫128d之间。
在一些实施例中，由于基板110具有凹陷111，焊料盖150、芯片结构140、与导电凸块160的最大高度H2、H3、与H4(见图1B)随之加大。如此一来，可增加芯片结构140的装置与再布线层。上述结构亦可改善芯片结构的结构强度。
由于导电凸块160的最大高度H4加大，导电凸块160的尺寸也加大。如此一来，可改善一些实施例中导电凸块160与其上的导电垫143c(以及与其下的导电垫114b)之间的连接。
图3为一些实施例中，芯片封装结构300的剖视图。如图3所示的实施例，芯片封装结构300与芯片封装结构100类似，差别在于芯片结构140、焊料盖150、与导电凸块160位于芯片封装120与180之间。
在一些实施例中，再布线结构181还包含导电垫181f。在一些实施例中，导电垫181f埋置于介电层181a中。在一些实施例中，焊料盖150位于导电垫181f与芯片结构140之间。在一些实施例中，导电垫181f经由焊料盖150电性连接至芯片结构140。
在一些实施例中，芯片封装120还包含介电层129a与129b，以及再布线层129c。在一些实施例中，介电层129a形成于芯片122a上。
在一些实施例中，介电层129b形成于成型化合物124、介电层129a、与导电通孔结构126上。在一些实施例中，介电层129b具有凹陷R。在一些实施例中，凹陷R露出导电通孔结构126与部分的介电层129a。
在一些实施例中，再布线层129c形成于介电层129b上，并延伸至凹陷R中。在一些实施例中，再布线层129c电性连接至导电通孔结构126。在一些实施例中，导电凸块190形成于导电垫181d与再布线层129c之间。
在一些实施例中，导电凸块190使导电垫181d电性连接至再布线层129c。在一些实施例中，导电凸块190并未形成于芯片182、183、与122a之间。
在一些实施例中，导电凸块160位于芯片结构140的导电垫143c与再布线层129c之间。在一些实施例中，导电凸块160使导电垫143c电性连接至再布线层129c。在一些实施例中，导电凸块160位于个别的凹陷R中。
在一些实施例中，由于芯片结构140具有导电通孔结构146使芯片封装120电性连接至芯片封装180，因此芯片结构140具有导电凸块190的功能。
如此一来，一些实施例中的芯片结构140可维持或增加芯片封装120与180之间的导电路径。因此一些实施例中，芯片结构140可改善再布线结构181与再布线层129c的绕线能力。
此外，芯片结构140还具有主动装置及/或被动装置。如此一来，一些实施例其芯片封装结构300的尺寸固定下，具有芯片结构140的芯片封装结构300所具有的装置数目，比不具有芯片结构140的芯片封装结构所具有的装置数目多。如此一来，一些实施例中的芯片结构140可增加芯片封装结构300的装置密度。因此可改善芯片封装结构300的效能。
图4为一些实施例中，芯片封装结构400的剖视图。如图4所示的一些实施例，芯片封装结构400与芯片封装结构300类似，差别在于芯片封装结构180的再布线结构181还具有凹陷181g。在一些实施例中，焊料盖150形成于凹陷181g中，以及形成于导电垫181f与芯片结构140之间。
在一些实施例中，所有的焊料盖150位于凹陷181g中。在一些实施例中，芯片结构140位于凹陷181g下。在一些实施例中，导电垫160位于凹陷181g下。在一些实施例中，凹陷181g的宽度W6大于芯片结构140的最大宽度W4。
在一些实施例中，由于再布线结构181具有凹陷181g，因此焊料盖150、芯片结构140、与导电凸块160的最大高度H2、H3、与H4(见图1B)加大。如此一来，可增加芯片结构140的装置与再布线层。上述结构亦可改善芯片结构140的结构强度。
由于导电凸块160的最大高度H4加大，导电凸块160的尺寸亦加大。如此一来，可改善一些实施例中导电凸块160至其上的导电垫143c(以及至其下的再布线层129c)的电性连接。
图5为一些实施例中，芯片封装结构500的剖视图。如图5所示的一些实施例，芯片封装结构500与芯片封装结构300类似，差别在于其芯片封装结构500的焊料盖150的尺寸与配置不同于芯片封装结构300。
在一些实施例中，导电凸块160的最大宽度W2等于焊料盖150的最大宽度W3。在一些实施例中，导电凸块160的最大宽度W2小于焊料盖150的最大宽度W3。
在一些实施例中，两相邻的导电凸块160之间的距离D2，等于两相邻的焊料盖150之间的距离D3。在一些实施例中，两相邻的导电凸块160之间的距离D2，小于两相邻的焊料盖150之间的距离D3。
图6为一些实施例中，芯片封装结构600的剖视图。如图6所示的一些实施例，芯片封装结构600与芯片封装结构300类似，差别在于两者的导电凸块190的配置不同。
在一些实施例中，两相邻的导电凸块190之间的距离D4，大于两相邻的导电凸块160之间的距离D2。在一些实施例中，两相邻的导电凸块190之间的距离D4，大于两相邻的焊料盖150之间的距离D3。
在一些实施例中，提供芯片封装结构。芯片封装结构具有芯片结构于芯片封装与基板(或另一芯片封装)之间。芯片结构具有导电通孔结构使芯片封装电性连接至基板，因此芯片结构具有导电凸块的功能。如此一来，芯片结构可维持或增加芯片封装与基板之间的导电路径。因此芯片结构改善芯片封装的再布线结构与基板的线路层的绕线能力。此外，芯片结构还具有主动装置及/或被动装置。如此一来，芯片结构可增加芯片封装结构的装置密度。因此可改善芯片封装结构的效能。
基板具有凹陷于芯片结构下。如此一来，可加大芯片结构的最大高度。因此可增加芯片结构的装置与再布线层。上述结构可改善芯片结构的结构强度。
一些实施例提供芯片封装结构，包括基板、芯片封装、多个第一导电凸块、芯片结构、焊料盖、第二导电凸块以及导电通孔结构，所述芯片封装堆叠于基板上；多个所述第一导电凸块配置于芯片封装与基板之间并直接接触芯片封装及基板，以提供空间；所述芯片结构具有对向设置的第一面与第二面，配置于芯片封装与基板之间的空间中，并与第一导电凸块相邻，其中芯片结构包含至少一芯片；所述焊料盖连接芯片结构的第一面与芯片封装；所述第二导电凸块连接芯片结构的第二面与基板；所述导电通孔结构穿过芯片结构的芯片，其中导电通孔结构使焊料盖电性连接至第二导电凸块。
在一些实施例中，上述芯片封装结构的焊料盖直接接触芯片封装与芯片结构。
在一些实施例中，上述芯片封装结构的第二导电凸块直接接触芯片结构与基板。
在一些实施例中，上述芯片封装结构的第一导电凸块的最大宽度，大于第二导电凸块的最大宽度。
在一些实施例中，上述芯片封装结构的第二导电凸块的最大宽度，大于焊料盖的最大宽度。
在一些实施例中，上述芯片封装结构还包括第三导电凸块，其连接芯片结构的第二面与基板，其中第三导电凸块与第二导电凸块相邻，且两相邻的第一导电凸块之间的距离大于第二导电凸块与第三导电凸块之间的距离。
在一些实施例中，上述芯片封装结构的基板具有凹陷，第二导电凸块与第三导电凸块位于凹陷中，且凹陷的宽度大于芯片结构的宽度。
在一些实施例中，上述芯片封装结构的芯片结构的宽度大于第一导电凸块的宽度。
在一些实施例中，上述芯片封装结构包含芯片、成型化合物、与再布线结构，其中成型化合物连续地围绕芯片封装的芯片，且再布线结构位于芯片封装的芯片与第一导电凸块之间，且位于成型化合物与第一导电凸块之间。
在一些实施例中，提供芯片封装结构，其包含第一芯片封装、第二芯片封装、多个第一导电凸块、芯片结构、焊料盖以及第二导电凸块，其中第一芯片封装堆叠于第二芯片封装上；多个第一导电凸块配置于第一芯片封装与第二芯片封装之间并直接接触第一芯片封装与第二芯片封装，以提供空间；芯片结构具有对向设置的第一面与第二面，配置于第一芯片封装与第二芯片封装之间的空间，且与第一导电凸块相邻；焊料盖连接芯片结构的第一面与第一芯片封装；以及第二导电凸块连接芯片结构的第二面与第二芯片封装。
在一些实施例中，上述芯片封装结构还包含填充层于第一芯片封装与第二芯片封装之间，其中填充层连续地围绕第一导电凸块与芯片结构。
在一些实施例中，上述芯片封装结构的第二芯片封装具有凹陷，且第二导电凸块位于凹陷中。
在一些实施例中，上述芯片封装结构的第一芯片封装的再布线结构具有凹陷，且焊料盖位于凹陷中。
在一些实施例中，上述芯片封装结构的芯片结构位于第一导电凸块之间。
在一些实施例中，上述芯片封装结构还包含第三导电凸块连接芯片结构的第二面与第二芯片封装，其中第三导电凸块与第二导电凸块相邻，且两相邻的第一导电凸块之间的距离大于第二导电凸块与第三导电凸块之间的距离。
在一些实施例中，上述芯片封装结构的第一导电凸块并非位于第一芯片封装的第一芯片与第二芯片封装的第二芯片之间。
在一些实施例中，提供的芯片封装结构包括基板、芯片封装、多个第一导电凸块、芯片结构、焊料盖以及第二导电凸块；芯片封装堆叠于基板上；多个第一导电凸块配置于芯片封装与基板之间，以提供空间；芯片结构具有对向设置的第一面与第二面，配置于芯片封装与基板之间的空间，且与第一导电凸块相邻；焊料盖连接芯片结构的第一面与芯片封装；以及第二导电凸块连接芯片结构的第二面与基板，其中第一导电凸块的最大高度大于或等于第二导电凸块、芯片结构、与焊料盖的最大高度总合。
在一些实施例中，上述芯片封装结构的第一导电凸块围绕芯片结构。
在一些实施例中，上述芯片封装结构的芯片封装包含芯片、成型化合物、多个导电通孔结构以及再布线结构，成型化合物连续地围绕芯片，导电通孔结构穿过成型化合物、且再布线结构位于芯片、成型化合物、与导电通孔结构下。
在一些实施例中，上述芯片封装结构的一些第一导电凸块并非位于芯片封装的芯片与基板之间。
上述实施例的特征有利于本技术领域中技术人员理解本公开实施例。本技术领域中技术人员应理解可采用本公开实施例作基础，设计并变化其他工艺与结构以完成上述实施例的相同目的及/或相同优点。本技术领域中技术人员亦应理解，这些等效置换并未脱离本公开实施例的精神与范畴，并可在未脱离本公开实施例的精神与范畴的前提下进行改变、替换、或更动。

Claims (1)

1.一种芯片封装结构，包括：
一基板；
一芯片封装，堆叠于该基板上；
多个第一导电凸块，配置于该芯片封装与该基板之间并直接接触该芯片封装及该基板，以提供一空间；
一芯片结构，具有对向设置的一第一面与一第二面，配置于该芯片封装与该基板之间的该空间中，并与多个所述第一导电凸块相邻，其中该芯片结构包含至少一芯片；
一焊料盖，连接该芯片结构的该第一面与该芯片封装；
一第二导电凸块，连接该芯片结构的该第二面与该基板；以及
一导电通孔结构，穿过该芯片结构的该芯片，其中该导电通孔结构使该焊料盖电性连接至该第二导电凸块。
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