CN107219660B - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
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- CN107219660B CN107219660B CN201710564875.8A CN201710564875A CN107219660B CN 107219660 B CN107219660 B CN 107219660B CN 201710564875 A CN201710564875 A CN 201710564875A CN 107219660 B CN107219660 B CN 107219660B
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- 239000000758 substrate Substances 0.000 title claims abstract description 195
- 239000010409 thin film Substances 0.000 claims description 38
- 230000003068 static effect Effects 0.000 claims description 31
- 238000005538 encapsulation Methods 0.000 claims description 20
- 230000003287 optical effect Effects 0.000 claims description 18
- 239000000565 sealant Substances 0.000 claims description 12
- 239000000853 adhesive Substances 0.000 claims description 11
- 230000001070 adhesive effect Effects 0.000 claims description 11
- 239000003292 glue Substances 0.000 claims description 8
- 239000004973 liquid crystal related substance Substances 0.000 claims description 6
- 239000004568 cement Substances 0.000 claims description 4
- 230000009286 beneficial effect Effects 0.000 abstract description 13
- 238000010586 diagram Methods 0.000 description 25
- 230000005611 electricity Effects 0.000 description 16
- 239000010408 film Substances 0.000 description 13
- 238000004806 packaging method and process Methods 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 230000003044 adaptive effect Effects 0.000 description 2
- 238000005452 bending Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13458—Terminal pads
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/13338—Input devices, e.g. touch panels
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136204—Arrangements to prevent high voltage or static electricity failures
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention provides an array substrate, a display panel and a display device, belonging to the technical field of display, wherein the array substrate comprises: a display area and a non-display area; the display area comprises a plurality of gate lines arranged in parallel and extending along the row direction and a plurality of data lines arranged in parallel and extending along the column direction; the non-display area comprises a gate driving circuit which is electrically connected with a plurality of gate lines; the array substrate further comprises a binding region, the binding region comprises a plurality of conductive bonding pads, and the grid driving circuit is electrically connected with the conductive bonding pads through a plurality of signal connecting lines; the non-display area also comprises a plurality of electrostatic discharge circuits which are electrically connected with the signal connecting lines; the array substrate also comprises a substrate, and at least one signal connecting line is overlapped with the electrostatic discharge circuit in the direction perpendicular to the substrate. The array substrate, the display panel and the display device provided by the invention are beneficial to realizing the narrow frame of the array substrate.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a display panel and a display device.
Background
With the development of display technology, the demand for a narrow frame of a display panel is higher and higher, and in a display panel provided in the prior art, a Flexible Printed Circuit (FPC) is bonded to an array substrate, and then an IC Chip is bonded to the Flexible Printed Circuit, and an electrical signal on the array substrate is transmitted to the IC Chip through the Flexible Printed Circuit.
Fig. 1 is a schematic structural diagram of an array substrate provided in the prior art, and includes a display area 01 and a non-display area 02 surrounding the display area 01, where the non-display area 02 includes a bonding area 03, and the bonding area 03 is used for bonding a flexible circuit board. The non-display area 02 is provided with a ground line 04, and the ground line 04 is disposed around the display area 01 for protecting the circuit structure inside the array substrate from electrostatic charges. The array substrate further comprises a frame glue coating area 05, the frame glue coating area 05 is used for arranging frame glue, the frame glue is used for adhering the array substrate and the color film substrate, and meanwhile, the frame glue has certain electrostatic protection capability. In the figure, a dotted line a is a boundary position of the color film substrate after the color film substrate and the array substrate are attached, wherein the array substrate includes an upper boundary 011 and a lower boundary 012, a region between the upper boundary 011 and the dotted line a is a region covered by the color film substrate, and a region between the lower boundary 012 and the dotted line a is not covered by the color film substrate.
Referring to fig. 1a, fig. 1a is a partially enlarged schematic view of a region a in fig. 1. The non-display area 02 further includes a gate driving circuit signal line 06, and one end of the gate driving circuit signal line 06 is electrically connected to the gate driving circuit and the other end is electrically connected to the flexible circuit board. The non-display area 02 further includes a plurality of static electricity discharge circuits 07, the static electricity discharge circuits 07 are electrically connected to the gate driving circuit signal lines 06, and the static electricity discharge circuits 07 are used for protecting the gate driving circuit signal lines 06 from static electricity. The electrostatic discharge circuit 07 is disposed in parallel with the gate driving circuit signal line 06, the gate driving circuit signal line 06 is typically disposed at the same level as the gate line in the array substrate, and the electrostatic discharge circuit 07 is typically disposed at the same level as the thin film transistor array in the array substrate. The electrostatic discharge circuit 07 and the gate driving circuit signal line 06 occupy a large space in the non-display region 02, which is not favorable for narrowing the frame of the array substrate.
Disclosure of Invention
In view of the foregoing, the invention provides an array substrate, a display panel and a display device.
The invention provides an array substrate, comprising: a display area and a non-display area surrounding the display area; the display area comprises a plurality of gate lines arranged in parallel and extending along the row direction and a plurality of data lines arranged in parallel and extending along the column direction; the non-display area comprises a gate driving circuit which is electrically connected with a plurality of gate lines; the array substrate further comprises a binding region, the binding region comprises a plurality of conductive bonding pads, and the grid driving circuit is electrically connected with the conductive bonding pads through a plurality of signal connecting lines; the non-display area also comprises a plurality of electrostatic discharge circuits which are electrically connected with the signal connecting lines; the array substrate also comprises a substrate, and at least one signal connecting line is overlapped with the electrostatic discharge circuit in the direction perpendicular to the substrate.
In some alternative implementations, the plurality of signal connection lines and the plurality of electrostatic discharge circuits are all overlapped in a direction perpendicular to the substrate base plate.
In some optional implementations, the touch panel further includes a plurality of touch electrodes and a plurality of touch signal lines, and the touch signal lines are electrically connected to the touch electrodes; the touch signal lines, the gate lines and the data lines are respectively arranged in three different conductive layers; the array substrate further comprises a thin film transistor layer, a pixel electrode layer and a common electrode layer which are arranged on the substrate, and electronic elements of the static discharge circuit are arranged on the thin film transistor layer; the at least one signal connecting line and the touch signal line are arranged on the same layer.
In some optional implementations, the plurality of signal connection lines and the plurality of touch signal lines are disposed on the same layer.
In some optional implementations, the common electrode is multiplexed as a touch electrode.
In some optional implementations, the electrostatic discharge circuit includes a P-type thin film transistor and an N-type thin film transistor, a gate of the P-type thin film transistor is electrically connected to the first voltage signal line, a first pole of the P-type thin film transistor is electrically connected to the first voltage signal line, and a second pole of the P-type thin film transistor is electrically connected to the first node; the grid electrode of the N-type thin film transistor is electrically connected with the second voltage signal line, the first pole of the N-type thin film transistor is electrically connected with the second voltage signal line, and the second pole of the N-type thin film transistor is electrically connected with the first node; the signal connection line is electrically connected with the first node.
In some alternative implementations, the electrostatic discharge circuit includes a first diode and a second diode, a first pole of the first diode is electrically connected with the first voltage signal line, and a second pole of the first diode is electrically connected with the first node; a first pole of the second diode is electrically connected with the second voltage signal line, and a second pole of the second diode is electrically connected with the first node; the signal connection line is electrically connected with the first node.
The invention also provides a display panel which comprises the array substrate, the opposite substrate and the liquid crystal layer clamped between the array substrate and the opposite substrate.
In some optional implementations, the non-display area further includes a ground line disposed around the display area, the ground line being disposed on a side of the plurality of signal connection lines away from the display area.
In some alternative implementations, the opposite substrate covers the ground line in a direction perpendicular to the array substrate.
In some optional implementation manners, the display device further comprises a frame adhesive for attaching the array substrate and the opposite substrate, wherein the frame adhesive is arranged in the non-display area and surrounds the display area; and in the direction vertical to the array substrate, the frame glue covers the grounding wire.
The invention also provides another display panel, which comprises the array substrate and the packaging layer; the array substrate further includes a plurality of organic light emitting diodes.
In some optional implementations, the non-display area further includes a ground line disposed around the display area, the ground line being disposed on a side of the plurality of signal connection lines away from the display area.
In some alternative implementations, the encapsulation layer covers the ground line in a direction perpendicular to the array substrate.
In some optional implementation manners, the display device further comprises an optical adhesive for attaching the array substrate and the packaging layer, wherein the optical adhesive is arranged in the non-display area and surrounds the display area; in the direction perpendicular to the array substrate, the optical cement covers the grounding wire.
The invention also provides a display device which comprises the display panel provided by the invention.
In some optional implementations, the display device further includes a flexible printed circuit, the conductive pad is electrically connected to the flexible printed circuit, the flexible printed circuit is electrically connected to the integrated circuit chip, and the integrated circuit chip is located on the flexible printed circuit.
The array substrate, the display panel and the display device provided by the invention at least realize the following beneficial effects:
in the array substrate, the display panel and the display device provided by the invention, at least part of the signal connecting lines are overlapped with the electrostatic discharge circuit in the direction vertical to the substrate and share a part of area of the non-display area, so that the space occupied by the signal connecting lines and the electrostatic discharge circuit in the non-display area is reduced, and the narrow frame of the array substrate is facilitated.
Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
Fig. 1 is a schematic structural diagram of an array substrate provided in the prior art;
FIG. 1a is an enlarged partial schematic view of region A of FIG. 1;
fig. 2 is a schematic structural diagram of an array substrate according to an embodiment of the present invention;
FIG. 3 is an enlarged partial schematic view of region B of FIG. 2;
FIG. 3a is another enlarged partial schematic view of region B of FIG. 2;
fig. 4 is a schematic structural diagram of another array substrate according to an embodiment of the present invention;
FIG. 4a is a schematic cross-sectional view taken along line XX' in FIG. 4;
FIG. 4b is a schematic view of another cross-sectional configuration taken along line XX' in FIG. 4;
FIG. 4c is a schematic view of a further cross-sectional configuration taken along line XX' in FIG. 4;
fig. 5 is a schematic circuit diagram of an electrostatic discharge circuit according to an embodiment of the present invention;
fig. 5a is a schematic circuit diagram of another electrostatic discharge circuit according to an embodiment of the present invention;
fig. 6 is a schematic cross-sectional view illustrating a display panel according to an embodiment of the invention;
fig. 7 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
FIG. 7a is an enlarged partial schematic view of region C of FIG. 7;
FIG. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 8a is an enlarged partial schematic view of region D of FIG. 8;
fig. 9 is a schematic cross-sectional view of another display panel according to an embodiment of the invention;
FIG. 9a is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 9b is an enlarged partial schematic view of region C1 of FIG. 9 a;
fig. 10 is a schematic cross-sectional view illustrating a display panel according to another embodiment of the present invention;
FIG. 10a is a schematic structural diagram of a display panel according to another embodiment of the present invention;
FIG. 10b is an enlarged partial schematic view of the area D1 in FIG. 10 a;
fig. 11 is a schematic diagram of a display device according to an embodiment of the invention;
fig. 11a is a schematic view of a portion of the structure of the display device provided in fig. 11.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
Referring to fig. 2 and 3, fig. 2 is a schematic structural diagram of an array substrate according to an embodiment of the present invention, and fig. 3 is a partially enlarged schematic diagram of a region B in fig. 2. The array substrate provided by the embodiment of fig. 2 includes a display area 10 and a non-display area 20 surrounding the display area 10; the display area 10 includes a plurality of gate lines 11 arranged in parallel to extend in a row direction and a plurality of data lines 12 arranged in parallel to extend in a column direction; the non-display area 20 includes a gate driving circuit 21, the gate driving circuit 21 being electrically connected to the plurality of gate lines 11; the array substrate further comprises a bonding region 30, the bonding region 30 comprises a plurality of conductive pads 31, and the gate driving circuit 21 is electrically connected with the plurality of conductive pads 31 through a plurality of signal connection lines 211; the non-display area 20 further includes a plurality of electrostatic discharge circuits 70, the electrostatic discharge circuits 70 being electrically connected to the signal connection lines 211; the array substrate further includes a substrate 00, and at least one signal connection line 211 overlapping the electrostatic discharge circuit 70 exists in a direction perpendicular to the substrate 00.
In the array substrate provided in the embodiment of fig. 2, the display area 10 is used for displaying image information, and the non-display area 20 surrounding the display area 10 does not have a display function and can be used for arranging structures such as display signal traces and circuits. The display area 10 includes a plurality of gate lines 11 and a plurality of data lines 12, and it should be noted that the data lines 12 extend in the column direction as a whole, but there is a slight bending in a local area that is adaptive to the shape of the pixels, and the slight bending does not affect the extending direction of the data lines 12 extending in the column direction as a whole; similarly, the gate lines 11 extend in the row direction as a whole, but in a local area, there is a slight bend that is adaptive to the shape of the pixel, and the slight bend does not affect the extending direction of the gate lines 11 extending in the row direction as a whole.
In this embodiment, the non-display area 20 includes a gate driving circuit 21, and the gate driving circuit 21 is electrically connected to the plurality of gate lines 11 and is configured to transmit a gate driving signal to the gate lines 11. It should be noted that the gate driving circuit 21 may be integrated in one IC chip; the gate driving circuit 21 may also be integrated in an array substrate, and circuit elements are fabricated using the original film structure of the array substrate. The present invention does not limit the specific structure of the gate driving circuit 21. In addition, the embodiment is only described by taking the array substrate including one gate driving circuit 21 as an example, in some alternative implementations, the array substrate may include two or more gate driving circuits 21, for example, the array substrate may include two gate driving circuits 21, the two gate driving circuits are respectively disposed on two sides of the display area 10, and the number of the gate driving circuits 21 is not particularly limited in the embodiment. In addition, in the array substrate provided in this embodiment, the gate driving circuit 21 is electrically connected to both the gate lines 11 in the display area 10, in other alternative implementations, the gate driving circuit 21 may be electrically connected to only a portion of the gate lines 11, for example, the gate driving circuit 21 may be electrically connected to only the odd-numbered gate lines 11, or the gate driving circuit 21 may be electrically connected to only the even-numbered gate lines 11, and a specific electrical connection manner between the gate driving circuit 21 and the gate lines 11 is not particularly limited in this embodiment. The gate driving Circuit 21 is electrically connected to the conductive pads 31 through a plurality of signal connection lines 211, the conductive pads 31 are used for binding a Flexible Printed Circuit (FPC) (not shown in the drawings), the Flexible Printed Circuit has a function of transmitting an electrical signal, the signal connection lines 211 are electrically connected to the conductive pads 31, the conductive pads 31 are electrically connected to the Flexible Printed Circuit, the Flexible Printed Circuit can transmit an electrical signal for the signal connection lines 211, the electrical signal of the signal connection lines 211 is transmitted to the gate driving Circuit 21, and is transmitted to the gate lines 11 after being processed by the gate driving Circuit 21. In order to protect the signal connection lines 211, the non-display area 20 is provided with the static electricity discharge circuit 70, the static electricity discharge circuit 70 is electrically connected with the signal connection lines 211, and the static electricity discharge circuit 70 can lead static electricity out and protect the signal connection lines 211 from being damaged by the static electricity.
In this embodiment, the array substrate further includes a substrate 00, signal traces and circuits such as the gate lines 11 and the data lines 12 are all fabricated on the substrate 00, and the substrate 00 may be rigid, such as a glass substrate, or flexible, such as fabricated by using plastic. Fig. 2 is a schematic diagram of the array substrate, which is obtained by observing the array substrate in a direction perpendicular to the substrate, wherein at least one signal connection line 211a is overlapped with the electrostatic discharge circuit 70. Specifically, the signal connection line 211a and the electrostatic discharge circuit 70 are disposed on different layers. In the array substrate provided by this embodiment, the signal connection line 211a overlaps the electrostatic discharge circuit 70 and shares a part of the non-display area 20, so as to save the space of the non-display area 20 and facilitate the narrow frame of the array substrate.
In some alternative implementations, please refer to fig. 3a, where fig. 3a is another enlarged partial schematic view of the region B in fig. 2. The plurality of signal connection lines 211 and the plurality of electrostatic discharge circuits 70 are overlapped in a direction perpendicular to the substrate base plate. In the array substrate provided by this embodiment, the signal connection line 211 and the electrostatic discharge circuit 70 are overlapped, the signal connection line 211 and the electrostatic discharge circuit 70 are respectively disposed on different films, and the signal connection line 211 and the electrostatic discharge circuit 70 are overlapped and share a part of the area of the non-display area 20, so that the space of the non-display area 20 is further saved, and the narrow frame of the array substrate is facilitated.
In some optional implementation manners, the array substrate provided in the embodiment of the present invention further has a touch function. Specifically, referring to fig. 4 and fig. 4a, fig. 4 is a schematic structural diagram of another array substrate according to an embodiment of the present invention, and fig. 4a is a schematic structural diagram of a cross-section along line XX' in fig. 4. Fig. 4 is only illustrated on the basis of the array substrate provided in the embodiment of fig. 2, and the same parts are not repeated. The array substrate provided in fig. 4 further includes a plurality of touch electrodes 13 and a plurality of touch signal lines 14, and the touch signal lines 14 are electrically connected to the touch electrodes 13; the touch signal lines 14, the gate lines 11 and the data lines 12 are respectively arranged in three different conductive layers; the array substrate further comprises a thin film transistor layer 80, a pixel electrode layer 81 and a common electrode layer 82 which are arranged on the substrate 00, and electronic components of the electrostatic discharge circuit 70 are arranged on the thin film transistor layer 80; the at least one signal connection line 211 and the touch signal line 14 are disposed on the same layer. It should be noted that in the array substrate provided in this embodiment, the touch signal line 14 is electrically connected to the touch electrode 13, and the touch electrode 13 is used for sensing touch information of a user. In this embodiment, only the shape of the touch electrode 13 is illustrated as a rectangle, and in other alternative implementations, the shape of the touch electrode 13 may be a strip shape, a diamond shape, or an irregular pattern, and the shape of the touch electrode 13 and the working principle of the touch electrode 13 are not particularly limited in the present invention. The array substrate provided in this embodiment includes a thin film transistor layer 80, a pixel electrode layer 81 and a common electrode layer 82, wherein, as is known, the thin film transistor layer 80 includes thin film transistors (not shown in the figure) arranged in an array, and the gate lines 11 and the data lines 12 are arranged in the thin film transistor layer 80. In the array substrate provided in the embodiment of fig. 4a, only the pixel electrode layer 81 and the common electrode layer 82 are different in layer, and the common electrode layer 82 is disposed on a side of the pixel electrode layer 81 away from the substrate 00, in other alternative implementations, the pixel electrode layer 81 may be disposed on a side of the common electrode layer 82 away from the substrate 00, or the pixel electrode layer 81 and the common electrode layer 82 may be disposed on the same film layer, and the positional relationship between the pixel electrode layer 81 and the common electrode layer 82 is not particularly limited in the present invention. In this embodiment, the electronic components of the electrostatic discharge circuit 70 are disposed on the thin-film transistor layer 80, and the electronic components of the electrostatic discharge circuit 70 may be fabricated by using a part or all of the film layers of the thin-film transistor layer 80 in the array substrate. The array substrate provided in this embodiment has a touch function, a conductive layer is added for disposing a plurality of touch signal lines 14, at least one signal connection line 211 is disposed on the same layer as the touch signal lines 14, and the electronic components of the electrostatic discharge circuit 70 are disposed on the thin-film transistor layer 80. Compared with the prior art, the signal connection lines are disposed on the conductive layer where the gate lines 11 are located, the array substrate provided in this embodiment can enable at least one signal connection line 211 and the electrostatic discharge circuit 70 to be disposed on different film layers, so that at least one signal connection line 211 and the electrostatic discharge circuit 70 are overlapped and share a part of the area of the non-display area 20, thereby saving the space of the non-display area 20 and being beneficial to narrowing the frame of the array substrate. It should be noted that, in fig. 4a, a part of the structure is omitted for clarity of illustrating the technical features of the present embodiment.
In some alternative implementations, referring to fig. 4b, fig. 4b is a schematic cross-sectional view taken along line XX' in fig. 4. Fig. 4b is different from fig. 4a in that the signal connection lines 211 and the touch signal lines 14 are disposed on the same layer. In the array substrate provided in this embodiment, the signal connection lines 211 are all disposed on the conductive layer where the touch signal lines 14 are located, so that all the signal connection lines 211 and the electrostatic discharge circuit 70 do not share a film structure, which is beneficial to realizing that the signal connection lines 211 and the electrostatic discharge circuit 70 overlap and share a part of the non-display area 20, thereby saving the space of the non-display area 20 and being beneficial to narrowing the frame of the array substrate. Optionally, referring to fig. 4c, fig. 4c is a schematic cross-sectional view taken along line XX' in fig. 4, where fig. 4c is different from fig. 4b in that the common electrode layer 82 is reused as the touch electrode 13. In this embodiment, the common electrode 82 receives the common voltage signal when performing the display function, and the common electrode 82 receives the touch signal when performing the touch function, so that the common electrode layer is reused as the touch electrode in a time division multiplexing manner, thereby reducing the film structure of the array substrate, saving the process, and facilitating the light and thin of the array substrate.
Next, the present invention will be described herein by way of example with respect to a circuit configuration of the electrostatic discharge circuit. The embodiment of the invention herein exemplarily provides two circuit structures of the electrostatic discharge circuit, and the two circuit structures of the electrostatic discharge circuit are suitable for the array substrate provided by any one of the above embodiments of the invention. It should be understood that the electrostatic discharge circuit in the embodiment of the present invention may discharge static electricity on the signal connection line and protect the signal connection line from being damaged by the static electricity, and the exemplary description of the circuit structure of the electrostatic discharge circuit in the present invention should not limit the present invention.
Referring to fig. 5, fig. 5 is a schematic circuit structure of an electrostatic discharge circuit according to an embodiment of the present invention. The electrostatic discharge circuit includes a P-type thin film transistor T1 and an N-type thin film transistor T2, and the P-type thin film transistor T1 and the N-type thin film transistor T2 are electrically connected. Referring to fig. 5, a gate of the P-type tft T1 is electrically connected to the first voltage signal line VGH, a first pole of the P-type tft T1 is electrically connected to the first voltage signal line VGH, and a second pole of the P-type tft T1 is electrically connected to the first node N1; a gate of the N-type thin film transistor T2 is electrically connected to the second voltage signal line VGL, a first pole of the N-type thin film transistor T2 is electrically connected to the second voltage signal line VGL, and a second pole of the N-type thin film transistor T2 is electrically connected to the first node N1; the signal connection line 211 is electrically connected to the first node N1. In the electrostatic discharge circuit provided in this embodiment, the first voltage signal line VGH is used to provide a first voltage signal, the second voltage signal line VGL is used to provide a second voltage signal, and the voltage of the first voltage signal is higher than the voltage of the second voltage signal. The working principle of the electrostatic discharge circuit in this embodiment is as follows: when there is static charge on the signal connection line 211, if the voltage of the static charge is higher than the first voltage signal, the P-type thin film transistor T1 is turned on, and the static charge is conducted away through the first voltage signal line VGH; when there is static charge on the signal connection line 211, if the voltage of the static charge is lower than the second voltage signal, the N-type tft T2 is turned on, and the static charge is conducted away through the second voltage signal line VGL. The electrostatic discharge circuit provided by the embodiment can effectively protect the signal connection line 211 and improve the reliability of the array substrate.
Referring to fig. 5a, fig. 5a is a schematic circuit structure diagram of another electrostatic discharge circuit according to an embodiment of the present invention. The electrostatic discharge circuit includes a first diode D1 and a second diode D2. Referring to fig. 5a, a first pole of a first diode D1 is electrically connected to a first voltage signal line VGH, and a second pole of a first diode D1 is electrically connected to a first node N1; a first pole of the second diode D2 is electrically connected to the second voltage signal line VGL, and a second pole of the second diode D2 is electrically connected to the first node N1; the signal connection line 211 is electrically connected to the first node N1. In the electrostatic discharge circuit provided in this embodiment, the first voltage signal line VGH is used to provide a first voltage signal, the second voltage signal line VGL is used to provide a second voltage signal, and the voltage of the first voltage signal is higher than the voltage of the second voltage signal. The working principle of the electrostatic discharge circuit in this embodiment is as follows: when there is electrostatic charge on the signal connection line 211, if the voltage of the electrostatic charge is higher than the first voltage signal, the first diode D1 is turned on, and the electrostatic charge is conducted away through the first voltage signal line VGH; if the voltage of this electrostatic charge is lower than the second voltage signal, the second diode electrical connection D2 is conductive and the electrostatic charge is conducted away through the second voltage signal line VGL. The electrostatic discharge circuit provided by the embodiment can effectively protect the signal connection line 211 and improve the reliability of the array substrate.
It should be noted that the array substrate provided by any of the above embodiments of the present invention can be applied to a liquid crystal display panel. Optionally, the array substrate provided in any of the above embodiments of the present invention may also include a plurality of organic light emitting diodes, and the array substrate may also be applied to an organic light emitting display panel, which is not limited in this respect.
The invention also provides a display panel, which comprises the array substrate, the opposite substrate and the liquid crystal layer clamped between the array substrate and the opposite substrate. Referring to fig. 6, fig. 6 is a schematic cross-sectional structure diagram of a display panel according to an embodiment of the present invention, and the display panel provided in fig. 6 includes an array substrate 100, an opposite substrate 200, and a liquid crystal layer 300 sandwiched between the array substrate 100 and the opposite substrate 200 according to any of the embodiments of the present invention. The opposite substrate 200 may be a color film substrate or a cover plate, which is not limited in this embodiment. The display panel provided by the embodiment has the beneficial effects of the array substrate provided by the invention, and the details of the embodiment are not repeated herein.
In some alternative implementations, please refer to fig. 6, fig. 7 and fig. 7a, fig. 7 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and fig. 7a is a schematic partial enlarged view of a region C in fig. 7. Fig. 7 follows the reference numerals of fig. 2, and the description of the same parts is omitted. Fig. 7 provides a display panel in which the non-display area further includes a ground line 40, the ground line 40 is disposed around the display area 10, and the ground line 40 is disposed on a side of the plurality of signal connection lines 211 away from the display area 10. The grounding line 40 is grounded, so that external static electricity can be prevented from entering the inside of the display panel and damaging signal traces and circuit elements in the display panel by guiding the static electricity to the ground. The display panel provided by the embodiment further includes the ground line 40, and because the display panel provided by the present invention has the beneficial effects of the array substrate provided by the present invention, in the display panel provided by the present embodiment, at least one signal connection line 211 is overlapped with the electrostatic discharge circuit 70 and shares a part of the area of the non-display area 20, so that the space of the non-display area 20 is saved, and compared with the prior art, the ground line 40 can be arranged to a side close to the display area 10, which is beneficial to narrowing the frame of the array substrate.
In some alternative implementations, please refer to fig. 6, 7 and 7a in combination, the opposite substrate 200 covers the ground line 40 in a direction perpendicular to the array substrate 100. Fig. 7 is a schematic view of the display panel, which is obtained by viewing the display panel in a direction perpendicular to the array substrate 100, wherein the opposite substrate 200 has a boundary b, the array substrate has a boundary c, and the opposite substrate 200 covers a portion of the array substrate 100, exposing the bonding region 30 for bonding the flexible printed circuit board. The ground line 40 is mostly located within the boundary b of the opposite substrate 200 in a direction perpendicular to the array substrate 100, and the ground line 40 is usually used for a ground signal to protect the display panel and to make the display panel not easily damaged by external static charges. It is understood that since the ground line 40 needs to be connected to the bonding area 30, a small portion of the trace of the ground line 40 at the position connected to the bonding area 30 is not covered by the opposite substrate 200. In the display panel provided by the embodiment, at least one signal connection line 211 is overlapped with the electrostatic discharge circuit 70 and shares a part of the area of the non-display area 20, so that the space of the non-display area 20 is saved; the ground line 40 may be disposed toward a side close to the display region 10, so that the opposite substrate 200 covers the ground line 40, and the opposite substrate 200 may protect the ground line 40, so that the ground line 40 is not easily damaged by static charge, and compared with the prior art, the static electricity protection capability of the display panel is improved.
In some alternative implementations, please refer to fig. 6, fig. 8 and fig. 8a continuously, fig. 8 is a schematic structural diagram of another display panel provided in an embodiment of the present invention, and fig. 8a is a schematic partial enlarged view of a region D in fig. 8; fig. 8 is only illustrated on the basis of the display panel provided in fig. 7, where fig. 8 uses the reference numerals in fig. 7, and fig. 8 is different from fig. 7 in that the display panel provided in fig. 8 further includes a sealant 50 for attaching the array substrate 100 and the opposite substrate 200, the sealant 50 is disposed in the non-display region 20, and the sealant 50 is disposed around the display region 10; the sealant 50 covers the ground line 40 in a direction perpendicular to the array substrate 100. Fig. 8 is a schematic view of the display panel, which is obtained by observing the display panel in a direction perpendicular to the array substrate 100, wherein the sealant 50 is annular and disposed around the display region 10, and the array substrate 100, the opposite substrate 200 and the sealant 50 form a closed space to seal the liquid crystal layer 300 between the array substrate 100 and the opposite substrate 200. It should be noted that, in order to clearly illustrate the technical features of the present embodiment, only the orthographic projection 50a of the sealant 50 on the array substrate 100 is illustrated in fig. 8 and 8 a. It can be understood that since the ground wire 40 needs to be connected to the bonding region 30, a small portion of the trace of the ground wire 40 at the position connected to the bonding region 30 is not covered by the sealant 50. In the display panel provided by the embodiment, at least one signal connection line 211 is overlapped with the electrostatic discharge circuit 70 and shares a part of the area of the non-display area 20, so that the space of the non-display area 20 is saved; the ground line 40 may be disposed on a side close to the display region 10, such that the sealant 50 covers the ground line 40, and the sealant 50 may protect the ground line 40, such that the ground line 40 is not easily damaged by static charges, and compared with the prior art, the electrostatic protection capability of the display panel is improved.
The invention also provides another display panel, which comprises the array substrate and the packaging layer provided by any one of the embodiments of the invention; the array substrate further includes a plurality of organic light emitting diodes. Referring to fig. 9, fig. 9 is a schematic cross-sectional view of another display panel according to an embodiment of the present invention, the display panel provided in fig. 9 includes an array substrate 400 and an encapsulation layer 500 provided in any one of the above embodiments of the present invention, the array substrate 400 further includes a plurality of organic light emitting diodes (not shown), and the encapsulation layer 500 has a function of blocking moisture and oxygen, so as to protect the array substrate 400 and prevent the array substrate 400 from being corroded by moisture and oxygen in the air. The display panel provided in this embodiment is an organic light emitting display panel, and in the organic light emitting display panel, there are various structures of the encapsulation layer 500, and in the display panel provided in this embodiment, the encapsulation layer 500 directly covers the array substrate 400, and the specific structure of the encapsulation layer 500 is not particularly limited in this embodiment. The display panel provided by the embodiment is an organic light emitting display panel, and the organic light emitting display panel has the advantages of self luminescence, wide viewing angle, high contrast, low power consumption, high response speed and the like. The display panel provided by the embodiment has the beneficial effects of the array substrate provided by the invention, and the details of the embodiment are not repeated herein.
In some alternative implementations, please refer to fig. 9, 9a and 9b, where fig. 9a is a schematic structural diagram of another display panel provided in an embodiment of the present invention, and fig. 9b is a schematic partial enlarged view of a region C1 in fig. 9 a. Fig. 9 follows the reference numerals of fig. 2, and the description of the same parts is omitted. Fig. 9 provides a display panel in which the non-display area further includes a ground line 40, the ground line 40 is disposed around the display area 10, and the ground line 40 is disposed on a side of the plurality of signal connection lines 211 away from the display area 10. The grounding line 40 is grounded, so that external static electricity can be prevented from entering the inside of the display panel and damaging signal traces and circuit elements in the display panel by guiding the static electricity to the ground. The display panel provided by the embodiment further includes the ground line 40, and because the display panel provided by the present invention has the beneficial effects of the array substrate provided by the present invention, in the display panel provided by the present embodiment, at least one signal connection line 211 is overlapped with the electrostatic discharge circuit 70 and shares a part of the area of the non-display area 20, so that the space of the non-display area 20 is saved, and compared with the prior art, the ground line 40 can be arranged to a side close to the display area 10, which is beneficial to narrowing the frame of the array substrate.
In some alternative implementations, with continued reference to fig. 9, 9a and 9b, the encapsulation layer 500 covers the ground line 40 in a direction perpendicular to the array substrate 400. Fig. 9a is a schematic view of the display panel, which is obtained by viewing the display panel from a direction perpendicular to the array substrate 400, wherein the encapsulation layer 500 has a boundary b1, the array substrate has a boundary c1, and the encapsulation layer 500 covers a portion of the array substrate 400 and exposes the bonding region 30 for bonding the flexible printed circuit board. The ground line 40 is mostly located within the boundary b1 of the encapsulation layer 500 in a direction perpendicular to the array substrate 400, and the ground line 40 is grounded for protecting the display panel and preventing the display panel from being easily damaged by external static charges. It is understood that since the ground wires 40 need to be connected to the bonding areas 30, a small portion of the traces of the ground wires 40 at the positions connected to the bonding areas 30 will not be covered by the packaging layer 500. In the display panel provided by the embodiment, at least one signal connection line 211 is overlapped with the electrostatic discharge circuit 70 and shares a part of the area of the non-display area 20, so that the space of the non-display area 20 is saved; the ground line 40 may be disposed toward a side close to the display area 10, such that the encapsulation layer 500 covers the ground line 40, and the encapsulation layer 500 may protect the ground line 40, such that the ground line 40 is not easily damaged by static charges, and compared with the prior art, the static protection capability of the display panel is improved.
In some optional implementations, please refer to fig. 10, 10a and 10b, fig. 10 is a schematic cross-sectional structure diagram of another display panel provided in an embodiment of the present invention, fig. 10a is a schematic structural diagram of another display panel provided in an embodiment of the present invention, and fig. 10b is a schematic partial enlarged view of a region D1 in fig. 10 a. Fig. 10 follows the reference numerals of fig. 9, fig. 10a is only illustrated on the basis of the display panel provided in fig. 9a, fig. 10a follows the reference numerals of fig. 9a, and fig. 10 is different from fig. 9 in that the display panel provided in fig. 10 further includes an optical paste 501 for attaching the array substrate 400 and the encapsulation layer 500, the optical paste 501 is disposed in the non-display area 20, and the optical paste 501 is disposed around the display area 10; the optical paste 501 covers the ground line 40 in a direction perpendicular to the array substrate 400. Fig. 10a is a schematic view of the display panel, which is obtained by observing the display panel in a direction perpendicular to the array substrate 400. The optical cement 501 is annular and is disposed around the display area 10, and the array substrate 400, the encapsulation layer 500 and the optical cement 501 form a closed space for protecting the array substrate 400 and preventing water vapor and oxygen from corroding the array substrate 400. In the display panel provided in this embodiment, the encapsulation layer 500 needs to be attached to the array substrate 400 through the optical adhesive 501, wherein the encapsulation layer 500 may be a glass cover plate, and the specific structure of the encapsulation layer 500 is not particularly limited in this embodiment. It should be noted that, for clearly illustrating the technical features of the present embodiment, only an orthographic projection 501a of the optical glue 501 on the array substrate 400 is illustrated in fig. 10a and 10 b. It is understood that since the ground wire 40 needs to be connected to the bonding area 30, a small portion of the trace of the ground wire 40 at the position connected to the bonding area 30 is not covered by the optical adhesive 501. In the display panel provided by the embodiment, at least one signal connection line 211 is overlapped with the electrostatic discharge circuit 70 and shares a part of the area of the non-display area 20, so that the space of the non-display area 20 is saved; the ground line 40 may be disposed on a side close to the display area 10, so that the optical adhesive 501 covers the ground line 40, and the optical adhesive 501 may protect the ground line 40, so that the ground line 40 is not easily damaged by static charges, and compared with the prior art, the electrostatic protection capability of the display panel is improved.
The invention also provides a display device comprising the display panel provided by any one of the above embodiments of the invention. Referring to fig. 11, fig. 11 is a schematic view of a display device according to an embodiment of the invention. Fig. 11 provides a display device 1000 including a display panel 1000A according to any of the above embodiments of the present invention. The embodiment of fig. 11 is only an example of a mobile phone, and the display device 1000 is described, it is to be understood that the display device provided in the embodiment of the present invention may be other display devices with a display function, such as a computer, a television, and a vehicle-mounted display device, and the present invention is not limited thereto. The display device provided in the embodiment of the present invention has the beneficial effects of the display panel provided in the embodiment of the present invention, and specific reference may be made to the specific description of the display panel in each of the above embodiments, which is not repeated herein.
In some alternative implementations, please refer to fig. 11a, fig. 11a is a partial structural diagram of the display device provided in fig. 11, and in particular, fig. 11a illustrates a structural diagram of a display panel 1000A and a part of elements electrically connected to the display panel 1000A. The display device 1000 further comprises a flexible circuit board 90, the conductive pad 31 is electrically connected with the flexible circuit board 90, the flexible circuit board 90 is electrically connected with an integrated circuit chip 91, and the integrated circuit chip 91 is located on the flexible circuit board 90. The display device used in the present embodiment uses a COF (Chip on Flex) technology, which is advantageous for realizing a narrow frame of the display device.
The array substrate, the display panel and the display device provided by the invention at least realize the following beneficial effects:
in the array substrate, the display panel and the display device provided by the invention, at least part of the signal connecting lines are overlapped with the electrostatic discharge circuit in the direction vertical to the substrate and share a part of area of the non-display area, so that the space occupied by the signal connecting lines and the electrostatic discharge circuit in the non-display area is reduced, and the narrow frame of the array substrate is facilitated.
Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.
Claims (15)
1. An array substrate, comprising: a display area and a non-display area surrounding the display area;
the display area comprises a plurality of gate lines arranged in parallel and extending along the row direction and a plurality of data lines arranged in parallel and extending along the column direction;
the non-display area comprises a gate driving circuit which is electrically connected with a plurality of gate lines;
the array substrate further comprises a binding region, the binding region comprises a plurality of conductive bonding pads, and the gate driving circuit is electrically connected with the conductive bonding pads through a plurality of signal connecting lines;
the non-display area further comprises a plurality of electrostatic discharge circuits, and the electrostatic discharge circuits are electrically connected with the signal connecting lines;
the array substrate further comprises a substrate, and at least one signal connecting line is overlapped with the electrostatic discharge circuit in the direction perpendicular to the substrate; wherein,
the electrostatic discharge circuit comprises a P-type thin film transistor and an N-type thin film transistor, wherein the grid electrode of the P-type thin film transistor is electrically connected with a first voltage signal line, the first pole of the P-type thin film transistor is electrically connected with the first voltage signal line, and the second pole of the P-type thin film transistor is electrically connected with a first node; the grid electrode of the N-type thin film transistor is electrically connected with a second voltage signal line, the first electrode of the N-type thin film transistor is electrically connected with the second voltage signal line, and the second electrode of the N-type thin film transistor is electrically connected with the first node; and/or the presence of a gas in the gas,
the electrostatic discharge circuit comprises a first diode and a second diode, wherein a first pole of the first diode is electrically connected with a first voltage signal line, and a second pole of the first diode is electrically connected with a first node; a first pole of the second diode is electrically connected with a second voltage signal line, and a second pole of the second diode is electrically connected with the first node;
the signal connection line is electrically connected to the first node.
2. The array substrate of claim 1, wherein the plurality of signal connection lines and the plurality of electrostatic discharge circuits are overlapped in a direction perpendicular to the substrate base plate.
3. The array substrate of claim 1, further comprising a plurality of touch electrodes and a plurality of touch signal lines electrically connected to the touch electrodes;
the touch signal lines, the gate lines and the data lines are respectively arranged in three different conductive layers;
the array substrate further comprises a thin film transistor layer, a pixel electrode layer and a common electrode layer which are arranged on the substrate, and electronic elements of the static discharge circuit are arranged on the thin film transistor layer;
the at least one signal connecting line and the touch signal line are arranged on the same layer.
4. The array substrate of claim 3, wherein the signal connection lines and the touch signal lines are disposed on the same layer.
5. The array substrate of claim 3, wherein the common electrode is reused as the touch electrode.
6. A display panel comprising the array substrate according to any one of claims 1 to 5, a counter substrate, and a liquid crystal layer interposed between the array substrate and the counter substrate.
7. The display panel according to claim 6, wherein the non-display area further comprises a ground line disposed around the display area, the ground line being disposed on a side of the plurality of signal connection lines away from the display area.
8. The display panel according to claim 7, wherein the opposite substrate covers the ground line in a direction perpendicular to the array substrate.
9. The display panel according to claim 7, further comprising a sealant for attaching the array substrate and the opposite substrate, wherein the sealant is disposed in the non-display region and surrounds the display region;
and in the direction vertical to the array substrate, the frame glue covers the grounding wire.
10. A display panel comprising the array substrate of any one of claims 1 to 5 and an encapsulation layer;
the array substrate further comprises a plurality of organic light emitting diodes.
11. The display panel according to claim 10, wherein the non-display area further comprises a ground line disposed around the display area, the ground line being disposed on a side of the plurality of signal connection lines away from the display area.
12. The display panel according to claim 11, wherein the encapsulation layer covers the ground line in a direction perpendicular to the array substrate.
13. The display panel according to claim 11, further comprising an optical adhesive for attaching the array substrate and the encapsulation layer, wherein the optical adhesive is disposed in the non-display area, and the optical adhesive is disposed around the display area;
in the direction perpendicular to the array substrate, the optical cement covers the grounding wire.
14. A display device comprising the display panel according to any one of claims 6 to 13.
15. The display device according to claim 14, further comprising a flexible wiring board, wherein the conductive pad is electrically connected to the flexible wiring board, wherein the flexible wiring board is electrically connected to an integrated circuit chip, and wherein the integrated circuit chip is located on the flexible wiring board.
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| CN107919090B (en) * | 2017-11-30 | 2020-01-07 | 武汉天马微电子有限公司 | Display panel and display device |
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| CN108269836B (en) * | 2018-01-19 | 2021-04-02 | 昆山国显光电有限公司 | Array substrate and manufacturing method thereof, display panel and manufacturing method thereof |
| CN108364936A (en) * | 2018-02-26 | 2018-08-03 | 武汉华星光电技术有限公司 | Array substrate and preparation method thereof, display panel and display device |
| CN108711575B (en) * | 2018-03-27 | 2020-08-04 | 上海中航光电子有限公司 | Display panel and display device |
| CN108281089B (en) * | 2018-03-29 | 2020-04-24 | 上海天马微电子有限公司 | Flexible display panel and flexible display device |
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| CN108470522A (en) * | 2018-05-14 | 2018-08-31 | 昆山国显光电有限公司 | Display panel and its display device |
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