CN109377874B - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN109377874B CN109377874B CN201811570197.7A CN201811570197A CN109377874B CN 109377874 B CN109377874 B CN 109377874B CN 201811570197 A CN201811570197 A CN 201811570197A CN 109377874 B CN109377874 B CN 109377874B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05F—STATIC ELECTRICITY; NATURALLY-OCCURRING ELECTRICITY
- H05F3/00—Carrying-off electrostatic charges
Abstract
The invention discloses a display panel and a display device, comprising: the display device comprises a display area and a non-display area arranged around the display area; the display area comprises a plurality of first signal lines extending along a first direction; the non-display area comprises a fan-out area, the fan-out area comprises a plurality of first signal connecting wires, the first signal connecting wires and the first signal wires are arranged in different layers and are electrically connected through a conductive part; one side of at least one first signal line, which is close to the fan-out area, is provided with an electrostatic blocking structure, and the electrostatic blocking structure and the first signal line are arranged on the same layer; the electrostatic blocking structure includes at least one first electrostatic blocking portion, and an extension line of the first signal line overlaps the first electrostatic blocking portion. Compared with the prior art, when the first signal line discharges static electricity towards the extension direction, the static electricity is firstly discharged onto the first static blocking part, so that the adverse conditions of short circuit, static breakdown and the like caused by the static electricity discharged onto the circuit around the first signal line can be effectively prevented.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
With the development of display technology, the display panel is continuously developing towards high integration and low cost, and from the original Cathode Ray Tube (CRT) display panel to the liquid crystal display panel commonly used nowadays, the display panel has been greatly improved in terms of integration, manufacturing cost, picture quality, and the like.
However, static electricity is often generated when the display screen is manufactured by adopting the prior art, and when static charge is accumulated to a certain degree in the display screen, electrostatic breakdown may be caused, so that the performance of parts in the display screen is affected, and the reject ratio of the display screen is always high. Particularly, in the process of manufacturing the array substrate, since the number of the lines on the array substrate is quite large, in order to reduce the coupling influence between the lines and reduce the wiring difficulty, the lines are generally arranged in a plurality of film layers, static electricity accumulation and release easily occur in the layer of lines in the working procedure of stripping photoresist after the lines are patterned, at this time, the whole array substrate is not completely molded, the antistatic performance is weak, and the longer lines generally release static electricity towards the extending direction of the longer lines at the tail ends, so that the insulating layers between the lines are easily burnt out, and thus, the bad conditions of short circuit, static breakdown and the like often occur between the lines.
Therefore, how to reduce or eliminate the static electricity generated in the display screen manufacturing process to ensure the performance of the display screen is an urgent problem to be solved in the field.
Disclosure of Invention
In view of the above, the present invention provides a display panel and a display device to reduce the occurrence of short circuit and electrostatic breakdown between lines due to static electricity and ensure the display effect.
The present invention provides a display panel, comprising: the display device comprises a display area and a non-display area arranged around the display area; the display area comprises a plurality of first signal lines extending along a first direction; the non-display area comprises a fan-out area, the fan-out area and the display area are arranged along a first direction, the fan-out area comprises a plurality of first signal connecting wires, the first signal connecting wires and the first signal wires are arranged in different layers, and the first signal connecting wires are electrically connected with the first signal wires through conductive parts; one side of at least one first signal line, which is close to the fan-out area, is provided with an electrostatic blocking structure, and the electrostatic blocking structure and the first signal line are arranged on the same layer; the electrostatic blocking structure includes at least one first electrostatic blocking portion, and an extension line of the first signal line overlaps the first electrostatic blocking portion.
In addition, the invention also provides a display device which comprises the display panel provided by the invention.
Compared with the prior art, the display panel and the display device provided by the invention at least realize the following beneficial effects:
the first signal wire and the first signal connecting wire are arranged in different layers and are electrically connected through the conductive part, so that the first signal connecting wire can provide signals for the first signal wire through the conductive part; meanwhile, the circuit arrangement is more flexible and convenient. The electrostatic blocking structure is arranged on one side, close to the fan-out area, of the first signal line, the first signal line and the electrostatic blocking structure are arranged on the same layer, and the first signal line and the electrostatic blocking structure can be formed in a patterning mode at the same time, so that the process difficulty is reduced; meanwhile, the first electrostatic blocking part in the electrostatic blocking structure is intersected with the first signal line along the extension line in the first direction, so that when the first signal line releases static electricity to the extension direction of the first signal line, the static electricity is firstly released to the first electrostatic blocking part, thereby effectively preventing the bad conditions of short circuit, electrostatic breakdown and the like caused by the static electricity released to the peripheral line of the first signal line and ensuring the display effect.
Of course, it is not necessary for any product in which the present invention is practiced to specifically achieve all of the above-described technical effects simultaneously.
Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
Fig. 1 is a schematic plan view of a display panel according to an embodiment of the present invention;
FIG. 2 is an enlarged view of region M of FIG. 1;
FIG. 3 is a schematic view of another enlarged structure of the region M in FIG. 1;
FIG. 4 is a schematic view of a further enlarged structure of region M of FIG. 1;
FIG. 5 is a schematic view of a further enlarged structure of region M of FIG. 1;
FIG. 6 is a schematic cross-sectional view taken along line C-C of FIG. 5;
FIG. 7 is a schematic view of a further enlarged structure of region M of FIG. 1;
FIG. 8 is a schematic cross-sectional view taken along line D-D of FIG. 7;
FIG. 9 is a schematic view of a further enlarged structure of region M of FIG. 1;
FIG. 10 is a schematic view of a further enlarged structure of region M of FIG. 1;
fig. 11 is a schematic circuit diagram of a first thin film transistor according to an embodiment of the present invention;
FIG. 12 is a schematic view of a further enlarged structure of region M of FIG. 1;
fig. 13 is a schematic plan view of another display panel according to an embodiment of the present invention;
FIG. 14 is an enlarged view of the region N in FIG. 13;
FIG. 15 is a schematic view of a cross-sectional view taken along the line E-E in FIG. 14;
FIG. 16 is a schematic diagram of a circuit connection of a conductive part according to an embodiment of the present invention;
fig. 17 is a schematic plan view illustrating a display panel according to another embodiment of the present invention;
fig. 18 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
Referring to fig. 1 and fig. 2 in combination, the present invention provides a display panel, including: a display area AA and a non-display area BB provided around the display area AA; the display area AA includes a plurality of first signal lines 10 extending in a first direction x; the non-display area BB includes a fan-out area F, the fan-out area F and the display area AA are arranged along the first direction x, the fan-out area F includes a plurality of first signal connection lines 20, the first signal connection lines 20 and the first signal lines 10 are arranged in different layers, and the first signal connection lines 20 are electrically connected with the first signal lines 10 through the conductive portions 30; an electrostatic blocking structure 40 is arranged on one side, close to the fan-out area F, of at least one first signal line 10, and the electrostatic blocking structure 40 and the first signal line 10 are arranged on the same layer; the electrostatic blocking structure 40 includes at least one first electrostatic blocking portion 41, and the first electrostatic blocking portion 41 overlaps with the extension line Y1 of the first signal line 10.
Specifically, the fan-out area F is a region where the lines in the display area AA extend to the non-display area BB, and in this embodiment, the first signal connection lines 20 are used as extension portions of the first signal lines 10 and are disposed as fan-shaped lines arranged at intervals in the fan-out area F.
Since the line arrangement density in the fan-out area F is usually relatively large, the arrangement density between the lines in the fan-out area F can be effectively reduced and the coupling influence between the lines can be reduced by arranging the first signal lines 10 and the first signal connecting lines 20 in different layers. The conductive portion 30 may be a film structure with a better conductive performance, and the embodiment is not limited to this, one end of the first signal connection line 20 may be electrically connected to the first signal line 10 through the conductive portion 30, and the other end may be electrically connected to a corresponding pad (not shown), and a driving chip (not shown) bound to the pad provides a driving signal for the first signal line 10, so as to implement the image display of the display area AA.
The static electricity blocking structure 40 is located on one side of the first signal line 10 close to the fan-out area F, on the one hand, the static electricity blocking structure 40 and the first signal line 10 are arranged on the same layer, that is, the static electricity blocking structure 40 and the first signal line 10 can be formed by patterning the same film material, or can be formed by patterning different film materials with the first signal line 10 respectively, as long as the static electricity blocking structure 40 and the first signal line 10 are located on the surface of the same insulating layer, the number of film layers does not need to be additionally increased, the difficulty of the manufacturing process is reduced, the display device is more favorably thinned, and because the first signal connecting line 20 and the first signal line 10 are arranged in different layers, that is, the static electricity blocking structure 40 is also arranged in different layers with the first signal connecting line 20, so that the static electricity blocking structure 40 can be effectively prevented from influencing. On the other hand, the first electrostatic blocking portion 41 in the electrostatic blocking structure 40 is overlapped with the extension line Y1 of the first signal line 10, so that the static electricity released along the first signal line 10 is firstly released onto the first electrostatic blocking portion 41, thereby effectively preventing the bad conditions of short circuit, electrostatic breakdown and the like caused by the direct release of the static electricity onto other effective lines of the display panel, that is, by arranging the electrostatic blocking structure 40, the electrostatic influence between the lines and devices can be effectively reduced, effectively improving the stability of the performance of the display panel, and ensuring the display effect thereof.
The number, shape and included angle between the first static blocking portions 41 and the extension line Y1 can be adjusted according to practical situations, for example, under the condition that the static discharge strength in the display panel is high, if there is enough space on one side of the first signal line 10 close to the fan-out area F, a plurality of first static blocking portions 41 can be provided; in the case where the electrostatic discharge strength in the display panel is small, the first electrostatic blocking portion 41 may be disposed only on one side of a portion of the first signal lines 10 close to the fan-out region F, that is, the electrostatic blocking structure 40 does not need to be disposed for each first signal line 10. For another example, the first electrostatic blocking part 41 may be configured as a rectangular block structure in fig. 2, but in order to facilitate arrangement of other lines or devices in the non-display area BB, the first electrostatic blocking part 41 may also be configured as an arc-shaped block structure or a wave-shaped block structure in fig. 3, which is not limited in this embodiment.
It should be noted that, in order to more intuitively illustrate the technical solution of the present embodiment, other film layer structures are not illustrated in fig. 1 to fig. 3.
The display panel provided by the embodiment at least has the following technical effects:
the first signal wire and the first signal connecting wire are arranged in different layers and are electrically connected through the conductive part, so that the first signal connecting wire can provide signals for the first signal wire through the conductive part; meanwhile, the circuit arrangement is more flexible and convenient. The electrostatic blocking structure is arranged on one side, close to the fan-out area, of the first signal line, the first signal line and the electrostatic blocking structure are arranged on the same layer, and the first signal line and the electrostatic blocking structure can be formed in a patterning mode at the same time, so that the process difficulty is reduced; meanwhile, the first electrostatic blocking part in the electrostatic blocking structure is intersected with the first signal line along the extension line in the first direction, so that when the first signal line releases static electricity to the extension direction of the first signal line, the static electricity is firstly released to the first electrostatic blocking part, thereby effectively preventing the bad conditions of short circuit, electrostatic breakdown and the like caused by the static electricity released to the peripheral line of the first signal line and ensuring the display effect.
In some optional embodiments, referring to fig. 4, the electrostatic blocking structure 40 further includes at least one second electrostatic blocking portion 42 and at least one third electrostatic blocking portion 43, and both the second electrostatic blocking portion 42 and the third electrostatic blocking portion 43 are electrically connected to the first electrostatic blocking portion 41; the at least one second electrostatic blocking portion 42 and the at least one third electrostatic blocking portion 43 are located at opposite sides of the first signal line 10 in a direction perpendicular to the first direction x.
In this embodiment, the second static blocking portion 42 and the third static blocking portion 43 both extend along the first direction x, that is, the same as the extending direction of the first signal line 10, so that the lengths of the second static blocking portion 42 and the third static blocking portion 43 can be flexibly adjusted according to actual conditions, and a line abnormal condition caused by the intersection of the second static blocking portion 42, the third static blocking portion 43 and the first signal line 10 does not need to be considered.
Along the direction perpendicular to the first direction x, the second static blocking portion 42 and the third static blocking portion 43 are located on two opposite sides of the first signal line 10, and the second static blocking portion 42 and the third static blocking portion 43 are both electrically connected to the first static blocking structure 41, so that the second static blocking portion 42 and the third static blocking portion 43 can be arranged on the same layer as the first static blocking portion 41, and at this time, the half-surrounded static blocking structure 40 is arranged on one side of the first signal line 10 close to the fan-out area F, which can effectively improve the antistatic performance of the display panel, and the static blocking structure 40 can be formed by patterning the same film layer material, so as to reduce the difficulty of the manufacturing process; of course, the second static blocking portion 42 and the third static blocking portion 43 may also be disposed in different layers from the first static blocking portion 41, and at this time, the second static blocking portion 42 and the third static blocking portion 43 may provide static protection for the circuit in the same film layer and may be patterned together with the circuit in the same film layer to reduce the difficulty of the manufacturing process.
In each electrostatic blocking structure 40, the number of the second electrostatic blocking portions 42 may be one or more, and the number of the third electrostatic blocking portions 43 may also be one or more, which is not particularly limited in this embodiment.
Optionally, as shown in fig. 4, the second electrostatic blocking portion 42 and the third electrostatic blocking portion 43 both extend along the first direction x, that is, the extending direction of the second electrostatic blocking portion 42 and the third electrostatic blocking portion 43 is the same as the extending direction of the first signal line 10, so that the lengths of the second electrostatic blocking portion 42 and the third electrostatic blocking portion 43 along the first direction x can be flexibly designed according to actual situations, and a certain gap can be formed between the second electrostatic blocking portion 42 and the first signal line 10, which can effectively prevent the second signal line 11 from generating bad situations such as short circuit and electrostatic breakdown, and ensure the effectiveness of the second signal line 11.
Optionally, referring to fig. 5 and fig. 6, the fan-out area F further includes a plurality of electrostatic connection lines 44, and the plurality of electrostatic connection lines 44 and the plurality of first signal connection lines 20 are arranged in different layers; the electrostatic connection line 44 is electrically connected to at least one of the first electrostatic barrier 41, the second electrostatic barrier 42, and the third electrostatic barrier 43.
In this embodiment, the electrostatic connection line 44 is electrically connected to at least one of the first electrostatic blocking portion 41, the second electrostatic blocking portion 42, and the third electrostatic blocking portion 43, so that static electricity on the electrostatic blocking structure 40 can be led out through the electrostatic connection line 44, and the electrostatic blocking structure 40 can be effectively prevented from being broken down due to excessive static accumulation, which is beneficial to prolonging the service life of the electrostatic blocking structure 40. The electrostatic connection line 44 may be electrically connected to a ground line (not shown) in the display panel, and the electrostatic connection line may discharge static electricity through the ground line, which is not limited in this embodiment.
Due to the different layer arrangement of the electrostatic connection line 44 and the first signal connection line 20, the electrostatic connection line 44 is prevented from influencing the first signal connection line 20 in the process of releasing static electricity, so that the stability of the first signal line 10 electrically connected with the first signal connection line 20 can be effectively ensured. At this time, the electrostatic connection line 44 may be patterned together with the electrostatic blocking structure 40, or may be patterned by using another conductive material, which is not particularly limited in this embodiment.
It should be noted that there may be a plurality of ways for electrically connecting the electrostatic connection line 44 and the electrostatic blocking structure 40, and fig. 5 only illustrates the case where the electrostatic connection line 44 and the third electrostatic blocking portion 43 are electrically connected, it is understood that the width and the number of the electrostatic connection lines 44 may be set according to actual situations, and at this time, the electrostatic connection line 44 may also be electrically connected to other electrostatic blocking portions in the electrostatic blocking structure 40, but this embodiment does not specifically limit this.
Alternatively, as shown in fig. 7 and fig. 8, the electrostatic connection line 44 and the first signal connection line 20 at least partially overlap in a direction perpendicular to the display panel.
In the present embodiment, the electrostatic connection line 44 may partially overlap the first signal connection line 20 in a direction perpendicular to the display panel, such as shown in fig. 8; certainly, the two circuits can be completely overlapped, so that the space required by the circuit arrangement of the fan-out area F is reduced, and the circuit arrangement in the display panel is more flexible and convenient.
Optionally, referring to fig. 9, the non-display area BB further includes an electrostatic discharge bus 50; the electrostatic connection line 44 is electrically connected to the electrostatic discharge bus 50 through the electrostatic control unit 51.
In this embodiment, the electrostatic connection line 44 may be electrically connected to the electrostatic discharge bus 50 through one or more electrostatic control portions 51, so that static electricity on the electrostatic connection line 44 may be conducted to the electrostatic discharge bus 50 for discharging, so as to ensure that the display performance of the display panel is not greatly affected by the static electricity. The electrostatic discharge bus 50 may be electrically connected to a ground line (not shown) in the display panel, and finally, the electrostatic discharge may be realized through the ground line, of course, the electrostatic discharge manner of the electrostatic discharge bus 50 may be other, and this embodiment does not specifically limit this.
Alternatively, referring to fig. 10 and fig. 11, the electrostatic control portion 51 includes a first thin film transistor 60, a first electrode 61 of the first thin film transistor 60 is electrically connected to the electrostatic connection line 44, a second electrode 62 of the first thin film transistor 60 is electrically connected to the electrostatic discharge bus 50, and a gate 63 of the first thin film transistor 60 is in a floating state.
In this embodiment, the gate 63 of the first thin film transistor 60 is in a floating state, that is, no signal is applied to the gate 63 during the manufacturing and using of the display panel, and when the static electricity on the static electricity connection line 44 is strong, the first pole 61 and the second pole 62 of the first thin film transistor 60 can be short-circuited by the static electricity, so that the static electricity can be conducted to the static electricity discharge bus 50 by the static electricity connection line 44 electrically connected to the first pole 61 for discharging. Of course, the gate 63 of the first thin film transistor 60 may also be in a non-floating state, that is, the first thin film transistor 60 may be connected to a common potential or a ground potential, so that the first thin film transistor 60 is in a conducting state, and then the electrostatic connection line 44 may directly conduct the electrostatic to the electrostatic discharge bus 50 for discharging, but this embodiment is not limited to this, and only the example that the gate 63 is in a floating state is taken as an example for explanation.
In order to more intuitively illustrate the technical solution of the present embodiment, other film layer structures are not illustrated in fig. 11, and the first electrode 61 of the first thin film transistor 60 and the electrostatic connection line 44 are filled with the same pattern, and the second electrode 62 of the first thin film transistor 60 and the electrostatic discharge bus 50 are filled with the same pattern.
Alternatively, as shown in fig. 12, along the first direction x, the length of the second electrostatic barrier 42 is H1, and the length of the third electrostatic barrier 43 is H2; wherein H1 is not less than H2 or H1 is not less than H2.
In this embodiment, the lengths of the second electrostatic blocking portion 42 and the third electrostatic blocking portion 43 along the first direction x may be the same or different, and this embodiment is not limited in particular. Therefore, the lengths of the second static blocking portion 42 and the third static blocking portion 43 along the first direction x may be set according to practical situations, so that static electricity in the display panel may be better conducted to the first static blocking portion 41 through the second static blocking portion 42 and the third static blocking portion 43, and then discharged through the static electricity connection line 44.
In some alternative embodiments, please refer to fig. 13 and 14 in combination, the fan-out area F further includes a plurality of second signal connection lines 21; the display area AA further includes a plurality of second signal lines 11 extending along the first direction x, the second signal lines 11, the second signal connection lines 21 and the first signal lines 10 are disposed in the same layer, and the second signal lines 11 and the second signal connection lines 21 are electrically connected; the extension line Y2 of the second signal line 11 and the first electrostatic blocking portion 41 have a gap therebetween.
In the present embodiment, the second signal line 11 and the second signal connection line 21 are disposed on the same layer, that is, a film layer line-changing structure such as the conductive part 30 is not required to be disposed therebetween; meanwhile, the second signal connection line 21 and the first signal line 10 are disposed in the same layer, and the electrostatic blocking structure 40 and the first signal line 10 are disposed in the same layer, that is, the second signal connection line 21 and the first electrostatic blocking portion 41 in the electrostatic blocking structure 40 are disposed in the same layer, and because a gap is formed between the extension line Y2 of the second signal line 11 and the first electrostatic blocking portion 41, the first electrostatic blocking portion 41 can be effectively prevented from generating bad conditions such as short circuit and electrostatic breakdown on the second signal line 11, and the effectiveness of the second signal line 11 is ensured.
One end of the second signal connection line 21 may be electrically connected to the second signal line 11, and the other end may also be electrically connected to a corresponding pad (not shown), and a driving chip (not shown) bound to the pad provides a driving signal for the second signal line 11, so that the first signal line 10 and the second signal line 11 may jointly implement image display in the display area AA.
Alternatively, as shown in fig. 14 and fig. 15, the second signal connection lines 21 and the first signal connection lines 20 at least partially overlap in a direction perpendicular to the display panel.
In the present embodiment, the second signal connection line 21 may partially overlap the first signal connection line 20 in a direction perpendicular to the display panel, as shown in fig. 15; certainly, the two circuits can be completely overlapped, so that the space required by the circuit arrangement of the fan-out area F is reduced, and the circuit arrangement in the display panel is more flexible and convenient.
In some alternative embodiments, please refer to fig. 13, 14 and 16 in combination, the conductive portion 30 includes a transparent conductive layer 31; the first signal line 10 is electrically connected to the transparent conductive layer 31 through at least one first via hole 32; the first signal connection line 20 is electrically connected to the transparent conductive layer 31 through at least one second via 33.
In this embodiment, fig. 16 is a circuit connection cross-sectional view of the transparent conductive layer 31 along the first direction x, specifically, the first signal line 10 and the first signal connection line 20 may be electrically connected to the transparent conductive layer 31 of the conductive part 30 through the first via 32 and the second via 33, respectively, so that the driving signal on the first signal connection line 20 may be indirectly transmitted to the first signal line 10 through the transparent conductive layer 31, and the transparent conductive layer 31 has a high light transmittance, so that the size of the transparent conductive layer 31 may be flexibly adjusted according to the thickness of the signal line, and at the same time, the conductive part 30 may be better prevented from affecting the display of the AA screen in the display area.
Optionally, as shown in fig. 16, the material of the transparent conductive layer 31 includes any one of indium tin oxide, indium tin zinc oxide, indium zinc oxide, tin oxide, and indium oxide, which has high light transmittance and good conductivity, and can be used as a film material of the transparent electrode, such as a pixel electrode, a common electrode, and the like, so that the transparent conductive layer 31 can be patterned together with the film structures, which is beneficial to reducing the meaning difficulty and improving the production efficiency of the display panel.
Of course, the transparent conductive layer 31 can also be made of other transparent or opaque materials with better conductive performance according to practical situations, and this embodiment does not limit this embodiment specifically.
In some alternative embodiments, please refer to fig. 17, at least one of the first signal lines 10 and/or at least one of the second signal lines 11 is a data line D.
In this embodiment, under the condition that the number of the data lines D in the display panel is certain, the conditions that only the first signal line 10 is the data line D, only the second signal line 11 is the data line D, and a part of the first signal line 10 and a part of the second signal line 11 are the data line D may be set according to actual conditions, so that the line arrangement in the display panel is more flexible and convenient, but the present embodiment does not specifically limit this.
Optionally, as shown in fig. 17, the display area AA further includes a plurality of first scan lines G1 and a plurality of second scan lines G2, and the plurality of first scan lines G1 and the plurality of second scan lines G2 extend along the second direction y; wherein the second direction y intersects the first direction x; the first scanning line G1, the second scanning line G2 and the data line D are insulated and crossed to define a plurality of pixel regions P, and the pixel regions P include pixel electrodes P1; in the second direction y, the second thin film transistors 70 are disposed between the data line D and two adjacent pixel electrodes P1, and a gate of one of the second thin film transistors 70 is electrically connected to the first scan line G1, and a gate of the other second thin film transistor 70 is electrically connected to the second scan line G2.
In this embodiment, the plurality of pixel regions P are defined by the first scan line G1, the second scan line G2, and the data line D crossing each other in an insulating manner, so that the plurality of pixel regions P are arranged in the first direction x and the second direction y to form a plurality of rows and columns, and one first scan line G1 and one second scan line G2 may exist between two adjacent rows of pixel regions P. For each row of pixel regions P, the even-numbered pixel electrodes P1 in the row of pixel regions P may be electrically connected to the first scan line G1 through the gate electrode of the second thin film transistor 70, and the odd-numbered pixel electrodes P1 may be electrically connected to the second scan line G2 through the gate electrode of the second thin film transistor 70; alternatively, the odd pixel electrodes P1 in the pixel region P in the row may also be electrically connected to the first scan line G1 through the gate of the second thin film transistor 70, and the even pixel electrodes P1 may also be electrically connected to the second scan line G2 through the gate of the second thin film transistor 70, which is not limited in this embodiment. So that the pixel electrode P1 in each row of the pixel region P can be commonly controlled by the first scan line G1 and the second scan line G2.
Two columns of pixel regions P are included between two adjacent data lines D, and in the second direction y, each data line D may be electrically connected to two adjacent pixel electrodes P1 through the second thin film transistor 70, so that each data line D may provide data signals for two columns of pixel electrodes P1, which is beneficial to reducing the number of data lines D, and the circuit arrangement in the display panel is more flexible.
The invention also provides a display device which comprises the display panel provided by the invention.
Referring to fig. 18, a display device 200 of the present embodiment includes the display panel 100 according to any one of the above embodiments of the present invention. Fig. 18 illustrates the display device 200 by taking a mobile phone as an example. It should be understood that the display device 200 provided in the embodiment of the present invention may also be a tablet computer, a television, a vehicle-mounted display, or other display devices with a display function, and the present invention is not limited thereto. The display device provided in the embodiment of the present invention has the beneficial effects of the display panel provided in the embodiment of the present invention, and specific reference may be made to the specific description of the display panel in each of the above embodiments, which is not repeated herein.
As can be seen from the above embodiments, the display panel and the display device provided by the present invention at least achieve the following beneficial effects:
the first signal wire and the first signal connecting wire are arranged in different layers and are electrically connected through the conductive part, so that the first signal connecting wire can provide signals for the first signal wire through the conductive part; meanwhile, the circuit arrangement is more flexible and convenient. The electrostatic blocking structure is arranged on one side, close to the fan-out area, of the first signal line, the first signal line and the electrostatic blocking structure are arranged on the same layer, and the first signal line and the electrostatic blocking structure can be formed in a patterning mode at the same time, so that the process difficulty is reduced; meanwhile, the first electrostatic blocking part in the electrostatic blocking structure is intersected with the first signal line along the extension line in the first direction, so that when the first signal line releases static electricity to the extension direction of the first signal line, the static electricity is firstly released to the first electrostatic blocking part, thereby effectively preventing the bad conditions of short circuit, electrostatic breakdown and the like caused by the static electricity released to the peripheral line of the first signal line and ensuring the display effect.
Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.
Claims (13)
1. A display panel, comprising: the display device comprises a display area and a non-display area arranged around the display area;
the display area comprises a plurality of first signal lines extending along a first direction;
the non-display area comprises a fan-out area, the fan-out area and the display area are arranged along the first direction, the fan-out area comprises a plurality of first signal connecting lines, the first signal connecting lines and the first signal lines are arranged in different layers, and the first signal connecting lines are electrically connected with the first signal lines through conductive parts;
a semi-surrounded electrostatic blocking structure is arranged on one side, close to the fan-out area, of at least one first signal line, and the electrostatic blocking structure and the first signal line are arranged on the same layer;
the electrostatic blocking structure comprises at least one first electrostatic blocking part, and the first electrostatic blocking part is overlapped with the extension line of the first signal line;
the static blocking structure further comprises at least one second static blocking part and at least one third static blocking part, and the second static blocking part and the third static blocking part are electrically connected with the first static blocking part;
the at least one second electrostatic blocking portion and the at least one third electrostatic blocking portion are located on opposite sides of the first signal line in a direction perpendicular to the first direction.
2. The display panel according to claim 1,
the fan-out area further comprises a plurality of electrostatic connecting wires, and the plurality of electrostatic connecting wires and the plurality of first signal connecting wires are arranged in different layers;
the electrostatic connection line is electrically connected to at least one of the first electrostatic blocking portion, the second electrostatic blocking portion, and the third electrostatic blocking portion.
3. The display panel according to claim 2,
the electrostatic connection line and the first signal connection line at least partially overlap in a direction perpendicular to the display panel.
4. The display panel according to claim 2,
the non-display area further comprises an electrostatic discharge bus;
the electrostatic connection line is electrically connected with the electrostatic discharge bus through an electrostatic control part.
5. The display panel according to claim 4,
the static control part comprises a first thin film transistor, a first pole of the first thin film transistor is electrically connected with the static connecting line, a second pole of the first thin film transistor is electrically connected with the static discharge bus, and a grid electrode of the first thin film transistor is in a floating state.
6. The display panel according to claim 1,
the second electrostatic barrier has a length of H1 and the third electrostatic barrier has a length of H2 in the first direction;
wherein H1 is not less than H2 or H1 is not less than H2.
7. The display panel according to claim 1,
the fan-out area also comprises a plurality of second signal connecting lines;
the display area further comprises a plurality of second signal lines extending along the first direction, the second signal lines, the second signal connecting lines and the first signal lines are arranged in the same layer, and the second signal lines are electrically connected with the second signal connecting lines;
a gap is formed between the extension line of the second signal line and the first electrostatic blocking portion.
8. The display panel according to claim 7,
the second signal connection lines and the first signal connection lines at least partially overlap in a direction perpendicular to the display panel.
9. The display panel according to claim 7,
at least one of the first signal lines and/or at least one of the second signal lines is a data line.
10. The display panel according to claim 9,
the display area further comprises a plurality of first scanning lines and a plurality of second scanning lines, and the plurality of first scanning lines and the plurality of second scanning lines extend along a second direction; wherein the second direction intersects the first direction;
the first scanning line, the second scanning line and the data line are crossed in an insulating mode to define a plurality of pixel areas, and the pixel areas comprise pixel electrodes;
and second thin film transistors are arranged between the data line and two adjacent pixel electrodes along the second direction, the grid electrode of one of the second thin film transistors is electrically connected with the first scanning line, and the grid electrode of the other second thin film transistor is electrically connected with the second scanning line.
11. The display panel according to claim 1,
the conductive part comprises a transparent conductive layer;
the first signal line is electrically connected with the transparent conductive layer through at least one first via hole;
the first signal connecting line is electrically connected with the transparent conductive layer through at least one second via hole.
12. The display panel according to claim 11,
the material of the transparent conductive layer includes any one of indium tin oxide, indium tin zinc oxide, indium zinc oxide, tin oxide, and indium oxide.
13. A display device characterized by comprising the display panel according to any one of claims 1 to 12.
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| CN201811570197.7A CN109377874B (en) | 2018-12-21 | 2018-12-21 | Display panel and display device |
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| CN201811570197.7A CN109377874B (en) | 2018-12-21 | 2018-12-21 | Display panel and display device |
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| CN109377874B true CN109377874B (en) | 2021-07-09 |
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| CN110265448B (en) * | 2019-06-24 | 2021-11-02 | 京东方科技集团股份有限公司 | Display panel and display device |
| CN110286532B (en) * | 2019-07-19 | 2022-04-22 | 昆山国显光电有限公司 | Array substrate and display panel |
| CN111338139B (en) * | 2020-02-18 | 2023-11-24 | 合肥鑫晟光电科技有限公司 | Display substrate and display device |
| CN111090201B (en) * | 2020-03-22 | 2020-06-23 | 深圳市华星光电半导体显示技术有限公司 | Display panel and electronic device |
| CN111599847B (en) * | 2020-05-29 | 2023-06-30 | 京东方科技集团股份有限公司 | Display panel, manufacturing method thereof and display device |
| CN111983858B (en) * | 2020-08-07 | 2022-07-12 | 深圳市华星光电半导体显示技术有限公司 | Display panel |
| CN112687191A (en) * | 2020-12-30 | 2021-04-20 | 厦门天马微电子有限公司 | Display panel and display device |
| CN114115598B (en) * | 2021-11-24 | 2024-03-22 | 武汉天马微电子有限公司 | Display panel and display device |
| WO2023122981A1 (en) * | 2021-12-28 | 2023-07-06 | 京东方科技集团股份有限公司 | Display substrate, display substrate motherboard and display apparatus |
| CN117351880A (en) * | 2022-06-29 | 2024-01-05 | 京东方科技集团股份有限公司 | Display module and terminal equipment |
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| JPH10268794A (en) * | 1997-03-26 | 1998-10-09 | Sharp Corp | Display panel |
| JP4846244B2 (en) * | 2005-02-15 | 2011-12-28 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
| KR20080067535A (en) * | 2007-01-16 | 2008-07-21 | 엘지이노텍 주식회사 | Ground structure of liquid crystal display apparatus |
| CN201828747U (en) * | 2010-10-13 | 2011-05-11 | 京东方科技集团股份有限公司 | Liquid crystal display substrate |
| CN104571758B (en) * | 2014-12-23 | 2017-11-07 | 上海天马微电子有限公司 | A kind of array base palte and display panel |
| CN105182645B (en) * | 2015-10-12 | 2018-09-11 | 京东方科技集团股份有限公司 | Display base plate and preparation method thereof and display device |
| CN205264316U (en) * | 2015-12-30 | 2016-05-25 | 京东方科技集团股份有限公司 | Array substrate and display device |
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| CN107219660B (en) * | 2017-07-12 | 2020-09-25 | 厦门天马微电子有限公司 | Array substrate, display panel and display device |
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| CN107479283B (en) * | 2017-08-30 | 2020-07-07 | 厦门天马微电子有限公司 | Array substrate, display panel and display device |
| CN207896092U (en) * | 2018-03-22 | 2018-09-21 | 京东方科技集团股份有限公司 | array substrate and display device |
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