CN107195640A - 阵列基板及其制备方法和显示装置 - Google Patents

阵列基板及其制备方法和显示装置 Download PDF

Info

Publication number
CN107195640A
CN107195640A CN201710512261.5A CN201710512261A CN107195640A CN 107195640 A CN107195640 A CN 107195640A CN 201710512261 A CN201710512261 A CN 201710512261A CN 107195640 A CN107195640 A CN 107195640A
Authority
CN
China
Prior art keywords
array base
base palte
insulating barrier
shading light
light part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201710512261.5A
Other languages
English (en)
Inventor
张正东
周刚
田华
杨小飞
代科
苏磊
牟勋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN201710512261.5A priority Critical patent/CN107195640A/zh
Publication of CN107195640A publication Critical patent/CN107195640A/zh
Priority to US16/327,697 priority patent/US10797087B2/en
Priority to PCT/CN2018/091320 priority patent/WO2019001285A1/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1296—Multistep manufacturing methods adapted to increase the uniformity of device parameters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78672—Polycrystalline or microcrystalline silicon transistor
    • H01L29/78675—Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78672—Polycrystalline or microcrystalline silicon transistor
    • H01L29/78678—Polycrystalline or microcrystalline silicon transistor with inverted-type structure, e.g. with bottom gate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/40—Arrangements for improving the aperture ratio
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/02—Materials and properties organic material
    • G02F2202/022—Materials and properties organic material polymeric
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/04—Materials and properties dye

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

本发明提供了阵列基板及其制备方法和显示装置。该阵列基板包括绝缘层，绝缘层包括透明部分和遮光部分，且遮光部分在阵列基板衬底上的投影覆盖栅线、源极、漏极和数据线在阵列基板衬底上的投影。由此，遮光部分可以替代常规黑矩阵，简化产品结构、减小产品厚度，且遮光部分的尺寸可以小于常规黑矩阵的尺寸，增大开口率。

Description

阵列基板及其制备方法和显示装置
技术领域
本发明涉及显示领域，具体地，涉及阵列基板及其制备方法和显示装置。
背景技术
在高像素产品边缘场效应型(ADS)显示模式或低温多晶硅(LTPS)中，一般为增加存储电容需要做亚克力层，亚克力是一种可塑性高分子材料，有较好的透过性和易染色的特点。亚克力层可以增加透过率和平坦度，但还是存在开口率不足的情况。且传统黑矩阵挡光层设计在彩膜基板上，黑矩阵挡光层的宽度较宽，从而使液晶屏的开口率较小，不能满足高像素产品对高开口率的需求。
因此，关于显示器件开口率的研究有待深入。
发明内容
本发明旨在至少在一定程度上解决相关技术中的技术问题之一。为此，本发明的一个目的在于提出一种可以提高显示器件开口率的阵列基板。
在本发明的一个方面，本发明提供了一种阵列基板。根据本发明的实施例，该阵列基板包括绝缘层，绝缘层包括透明部分和遮光部分，且遮光部分在阵列基板衬底上的投影覆盖栅线、源极、漏极和数据线在阵列基板衬底上的投影。由此，遮光部分可以替代常规黑矩阵，简化产品结构、减小产品厚度，且遮光部分的尺寸可以小于常规黑矩阵的尺寸，增大开口率；绝缘层还可以起到提高亮度和平坦化的作用，后续工艺可以直接在此之上进行操作，操作简单方便。
根据本发明的实施例，遮光部分在阵列基板衬底上的投影与栅线、源极、漏极和数据线在阵列基板衬底上的投影重叠。
根据本发明的实施例，形成绝缘层的材料为亚克力。
根据本发明的实施例，遮光部分掺杂有黑色粒子。
根据本发明的实施例，黑色粒子包括四氧化三铁粒子。
根据本发明的实施例，源极、漏极和数据线设置于绝缘层靠近栅极的一侧，公共电极设置于绝缘层远离栅极的一侧。
在本发明的另一方面，本发明提供了一种显示装置。根据本发明的实施例，该显示装置包括前面所述的阵列基板。由此，结构简单，厚度较薄，且开口率较大，显示品质高。
在本发明的又一方面，本发明提供了一种制备阵列基板的方法。根据本发明的实施例，该方法包括形成绝缘层的步骤，该绝缘层包括透明部分和遮光部分，且遮光部分在阵列基板衬底上的投影覆盖栅线、源极、漏极和数据线在所述阵列基板衬底上的投影。由此，工艺成熟，操作简便，易于工业化生产，且获得的阵列基板可以大大提高显示器件的开口率。
根据本发明的实施例，形成所述绝缘层的步骤包括：形成透明层；利用掩膜对所述透明层进行掺杂处理，形成遮光部分，以得到所述绝缘层。
根据本发明的实施例，利用掩膜对透明层进行掺杂处理，形成遮光部分包括：在透明层上形成光刻胶层；利用掩膜对光刻胶层进行曝光；对经过曝光的光刻胶层进行显影；利用化学气相沉积法对透明层掺杂黑色粒子；去除光刻胶层。
附图说明
图1是本发明一个实施例的阵列基板的结构示意图。
图2是本发明另一个实施例的阵列基板的结构示意图。
图3是本发明一个实施例的阵列基板的平面照片；
图4是图3所示的阵列基板沿A-A线的剖面结构示意图。
图5是本发明再一个实施例的阵列基板的结构示意图。
图6是本发明又一个实施例制备绝缘层的流程图。
图7是本发明又一个实施例制备绝缘层的流程图。
图8A至图8E是本发明一个实施例的制备绝缘层的流程示意图。
具体实施方式
下面详细描述本发明的实施例。下面描述的实施例是示例性的，仅用于解释本发明，而不能理解为对本发明的限制。实施例中未注明具体技术或条件的，按照本领域内的文献所描述的技术或条件或者按照产品说明书进行。所用试剂或仪器未注明生产厂商者，均为可以通过市购获得的常规产品。
在本发明的一个方面，本发明提供了一种阵列基板。根据本发明的实施例，参照图1，该阵列基板包括绝缘层10，绝缘层10包括透明部分12和遮光部分11，且遮光部分11在阵列基板衬底20上的投影覆盖栅线30、源极40、漏极50和数据线130在阵列基板衬底20上的投影。由此，绝缘层的遮光部分可以替代常规黑矩阵，与该阵列基板对盒的彩膜基板上不需要制作黑矩阵，简化产品结构、减小产品厚度，且遮光部分的尺寸可以小于常规黑矩阵的尺寸，增大开口率；绝缘层还可以起到提高亮度和平坦化的作用，后续工艺可以直接在此之上进行操作，操作简单方便。
根据本发明的实施例，为了进一步减小绝缘层中遮光部分的面积，增大开口率，参照图2，遮光部分11在阵列基板衬底20上的投影可以与栅线30、源极40、漏极50和数据线130在阵列基板衬底20上的投影重叠。由此，在保证栅线、源极、漏极和数据线被遮光部分完全遮住的前提下，可以进一步减小遮光部分的尺寸，有效增大开口率。
根据本发明的实施例，形成绝缘层的材料没有特殊的限制，只要满足阵列基板的使用要求，透明且通过一些操作可以在该绝缘层上形成遮光部分即可。在本发明的一些实施例中，形成绝缘层的材料为亚克力。由此，绝缘效果好，透过率高，易染色，可以起到平坦化的作用，而且，现有阵列基板中通常会设置亚克力层，由此可以直接利用现有结构作为上述绝缘层，产品结构大大简化。进一步的，为了在绝缘层上形成遮光部分，可以遮光部分掺杂黑色粒子。由此，可以有效遮挡光线，且掺杂黑色粒子的操作简单、易于控制，且不会增加产品厚度。
根据本发明的实施例，可以采用的黑色粒子的具体种类没有特殊要求，只要其能够有效掺杂到绝缘层的相应位置，且能够起到良好的遮光效果即可。根据本发明的一些实施例，黑色粒子可以为四氧化三铁粒子。由此，来源广泛，成本较低，遮光效果好，且易于掺杂到绝缘层中。
根据本发明的实施例，绝缘层在阵列基板中的具体设置位置没有特别限制，只要不影响阵列基板的正常工作，且同时能够有效发挥遮光作用即可。在本发明的一些实施例中，绝缘层设置于公共电极与源极、漏极和数据线之间，即源极、漏极和数据线设置于所述绝缘层靠近栅极的一侧，公共电极设置于所述绝缘层远离所述栅极的一侧。由此，绝缘层可以同时具有绝缘、平坦化、增加透过率和存储电容和遮光的作用，且遮光部分的面积可以小于常规黑矩阵的面积，进而有效增大开口率。
本领域技术人员可以理解，除了上述绝缘层之外，本发明的阵列基板可以具有本领域常规阵列基板的结构，如包括但不限于ADS模式阵列基板，LTPS(低温多晶硅)模式阵列基板等。下面以ADS模式阵列基板，LTPS(低温多晶硅)模式阵列基板为例说明本发明的阵列基板的具体结构。
在本发明的一些实施例中，参照图3(形成源极和漏极后获得的实际产品照片)和图4，本发明的阵列基板为ADS模式阵列基板，且该阵列基板包括衬底20，栅极100与栅线30同层设置，设置于衬底靠近绝缘层10的一侧；栅绝缘层90设置于衬底靠近绝缘层的一侧，且覆盖栅极100和栅线30；有源层80设置于栅绝缘层90远离衬底20的一侧，且与栅极100对应；像素电极60位于栅绝缘层90远离衬底20的一侧，源极40、漏极50和数据线130同层设置，位于栅绝缘层90远离衬底20的一侧；绝缘层10设置于栅绝缘层90远离衬底20的一侧，且覆盖像素电极60、源极40、漏极50和数据线130；公共电极70设置于绝缘层10远离衬底20的一侧，其中，需要说明的是，栅极100和栅线30相连且共同构成同一导电图案，其中，位于开关器件部分的结构(与有源层对应的部分)构成栅极100，其他部分构成栅线30，源极40和数据线130相连且共同构成同一导电图案，其中，靠近有源层且与有源层相连的部分构成源极40，其他部分构成数据线130。
在本发明的另一些实施例中，本发明的阵列基板为LTPS模式阵列基板，参照图5，该阵列基板可以包括：衬底20；设置于衬底20一侧的缓冲层22；设置于缓冲层22远离衬底20一侧的有源层80；设置于缓冲层22远离衬底20一侧，且覆盖有源层80的栅绝缘层90；设置于栅绝缘层90远离衬底20一侧、且同层设置的栅极100和栅线30；设置于栅绝缘层90远离衬底20的一侧、且覆盖栅极100和栅线30的层间绝缘层110；设置于层间绝缘层110远离衬底20的一侧，且贯穿层间绝缘层100与有源层80电连接的源极40和漏极50；设置于层间绝缘层110远离衬底20的一侧，且覆盖源极40和漏极50的绝缘层10；设置于绝缘层10远离衬底20一侧的公共电极70；设置于绝缘层10远离衬底20一侧、且贯穿绝缘层10与漏极50电连接的连接电极72；设置于绝缘层10远离衬底20一侧、且覆盖公共电极70和连接电极72的第二绝缘层120；设置于第二绝缘层120远离衬底20的一侧、且贯穿第二绝缘层120与连接电极电连接的像素电极60，其中，需要说明的是，源极40与数据线130连接，绝缘层中的遮光部分同样覆盖数据线，只是图5中未示出数据线130。另外，出于制作方便等的考虑，图5所示的阵列基板中还可以将与有源层对应的绝缘层部分均设置为遮光部分。由此将制作步骤简单，且将整个开光器件部分全部遮挡，显示效果更佳。
由此，可以对传统ADS显示模式阵列基板或LTPS模式阵列基板上的亚克力层进行适当处理形成上述绝缘层10，其不仅可以增加透过率、发挥平坦化作用，还可以替代传统黑矩阵的作用，且其遮光面积可以小于传统黑矩阵的面积，大大提高开口率。另外，并未增加新的结构，不会增加产品厚度，且与该阵列基板对盒的彩膜基板不需要设置黑矩阵，简化了产品结构。另外，本领域技术人员可以理解，ADS显示模式阵列基板或LTPS模式阵列基板上的像素电极和公共电极均是可以互换的，图4和图5仅示出了一种情况，并不能理解为对本发明的限制。
在本发明的另一方面，本发明提供了一种显示装置。根据本发明的实施例，该显示装置前面所述的阵列基板。由此，结构简单，厚度较薄，且开口率较大，显示品质高。且该显示装置具有前面所述的所有特征和优点，在此不再一一赘述。
根据本发明的实施例，该显示装置的具体种类没有特别限制，可以为本领域任何具有显示功能的装置、设备，例如包括但不限于手机、平板电脑、计算机显示器、游戏机、电视机、显示屏幕、可穿戴设备及其他具有显示功能的生活电器或家用电器等。
当然，本领域技术人员可以理解，除了前面所述的阵列基板，本发明所述的显示装置还可以包括常规显示装置所具有的必要的结构和部件，以手机为例进行说明，除了具有本发明的阵列基板件外，其还可以具有触控屏、外壳、CPU、照相模组、指纹识别模组、声音处理系统等等常规手机所具有的结构和部件，在此不再过多赘述。
在本发明的又一方面，本发明提供了一种制备阵列基板的方法。根据本发明的实施例，该方法包括形成绝缘层10的步骤，参照图1，该绝缘层10包括透明部分12和遮光部分11，且遮光部分11在阵列基板衬底20上的投影覆盖栅线30、源极40和漏极50在所述阵列基板衬底20上的投影。由此，工艺成熟，操作简便，易于工业化生产，且由于绝缘层具有遮光部分，可以替代传统黑矩阵，与获得的阵列基板对盒的彩膜基板上不再需要设置黑矩阵，简化了产品结构，且遮光部分的面积可以小于传统黑矩阵，大大提高了开口率。
根据本发明的实施例，参照图6，形成所述绝缘层的步骤包括：
S100：形成透明层。
根据本发明的实施例，形成绝缘层的材料没有特殊的限制，只要满足阵列基板的使用要求，透明且通过一些操作可以在该绝缘层上形成遮光部分即可。在本发明的一些实施例中，形成绝缘层的材料为亚克力。由此，绝缘效果好，透过率高，易染色，可以起到平坦化的作用，而且，现有阵列基板中通常会设置亚克力层，由此可以直接利用现有结构作为上述绝缘层，产品结构大大简化。进一步的，为了在绝缘层上形成遮光部分，可以遮光部分掺杂黑色粒子。由此，可以有效遮挡光线，且掺杂黑色粒子的操作简单、易于控制，且不会增加产品厚度。
根据本发明的实施例，形成透明层的方法也没有特殊要求，本领域人员可以根据实际需求灵活选择。根据本发明的一些实施例，形成透明层的方法包括但不限于沉积、涂覆、印刷等。由此，工艺简单、成熟，成本较低，易于工业化生产。
S200：利用掩膜对所述透明层进行掺杂处理，形成遮光部分，以得到所述绝缘层。
根据本发明的实施例，该步骤逇具体操作方式没有特别限制，只要能够有效将嫩具有遮光作用的物质掺杂到透明层的相应位置以形成遮光部分即可。在本发明的一些实施例中，参照图7，利用掩膜对透明层进行掺杂处理，形成遮光部分包括：
S210：在透明层1上形成光刻胶层2，结构示意图参见图8A。
根据本发明的实施例，该步骤中形成光刻胶层的具体方法没有特别限制，本领域技术人员可以根据需要灵活选择，例如可以为本领域任何已知的形成光刻胶的方法，包括但不限于涂覆、印刷等方法。根据本发明的实施例，光刻胶的具体种类也没有特别限制，如可以为正性光刻胶，也可以为负性光刻胶。
S220：利用掩膜3对光刻胶层2进行曝光，结构示意图参见图8B。
根据本发明的实施例，该步骤可以按照本领域常规操作进行。采用的掩膜版上可以具有与遮光图案对应或相反的图案。
S230：对经过曝光的光刻胶层进行显影，显影后的产品的结构示意图参见图8C。
根据本发明的实施例，该步骤可以按照本领域常规操作进行。
S240：利用化学气相沉积法对透明层掺杂黑色粒子，结构示意图参见图8D。
根据本发明的实施例，黑色粒子的具体种类没有特殊要求，能够有效掺杂到绝缘层的相应位置，且能够起到良好的遮光效果即可。根据本发明的一些实施例，黑色粒子可以为四氧化三铁粒子。由此，来源广泛，成本较低，遮光效果好，且易于掺杂到绝缘层中。
在本发明的一些具体实施例中，采用化学气相沉积CVD方式向亚克力层透明层中掺杂微小黑色粒子Fe3O4，Fe3O4可以与聚甲基丙烯酸甲酯(亚克力)以副价交联共聚或固化交联后，形成具有遮光效果的黑色亚克力材料，从而形成能够起到黑矩阵(BM)挡光作用的遮光部分11。
S250：去除光刻胶层，结构示意图参见图8E。
根据本发明的实施例，该步骤中，可以通过剥离(Strip)工艺剥离掉剩余的光刻胶，得到所需要的同时作为BM挡光层设计的绝缘层。当然，本领域技术人员可以理解，除了上述形成绝缘层的步骤，还可以包括形成常规阵列基板的其他结构的步骤，如还可以包括形成栅极、栅线、栅绝缘层、有源层、源极、漏极、公共电极、层间绝缘层、像素电极等步骤。而上述形成绝缘层的步骤，可以在形成源极、漏极的步骤之后，形成公共电极的步骤之前。
下面以图3至图5所示的阵列基板为例说明本申请的制备阵列基板的具体方法。
在本发明的一些实施例中，本发明的阵列基板为图3所示的ADS显示模式阵列基板，其制备步骤具体包括：首先，通过一次构图工艺在衬底20上形成栅极100和栅线30，然后在衬底20的一侧沉积覆盖栅极100和栅线30的栅绝缘层90，然后通过一次构图工艺在栅绝缘层90远离衬底20的一侧形成有源层80，接着通过一次构图工艺形成源极40、漏极50和数据线130，再通过一个构图工艺形成像素电极60，然后在栅绝缘层90远离衬底20的一侧沉积亚克力层10，接着采用类似BM Mask曝光显影方式沉积所需用的掺杂了黑色粒子的绝缘层，具体方法为在沉积透明亚克力层后，在透明亚克力层上涂上光刻胶(PR胶)，采用BM Mask曝光，将对应栅线30、源极40、漏极50和数据线130上方的PR胶曝光，显影后去掉PR胶，再采用CVD方式掺杂微小黑色粒子Fe3O4，Fe3O4与聚甲基丙烯酸甲酯(亚克力)以副价交联共聚或固化交联后，形成具有遮光效果的黑色亚克力材料，即遮光部分11，从而能够起到BM挡光作用。掺杂工艺完成后，再进行Strip工艺剥离掉其它地方的PR胶，得到所需要的同时作为BM挡光层设计的亚克力层10，然后通过一次构图工艺在亚克力层10远离衬底20的一侧形成公共电极70。
在本发明的另一些实施例中，本发明的阵列基板为图5所示的LTPS模式阵列基板，其制备步骤具体包括：
1、在衬底20上沉积缓冲层22。具体的，可以通过化学气相沉积或物理气相沉积形成缓冲层22，形成缓冲层22的材料可以为SiNx和SiO2中的至少一种，也可以为不同材料形成的多层结构，例如可以为一层SiNx层和一层SiO2层的双层结构。
2、通过构图工艺形成有源层80。具体的，可以先在缓冲层22上形成整层的非晶硅层，然后进行脱氢、HF清洗、激光退火、刻蚀、剥离光刻胶和Vth掺杂，形成有源层80。其中，脱氢可以去除非晶硅内氢，使得激光退火时不会发生氢爆，Vth掺杂可以调节多晶硅的电学特性，使其满足产品设计规格。
3、在缓冲层22上沉积覆盖有源层80的栅绝缘层90，并利用掩膜对有源层80进行Cst掺杂步骤。该步骤中，Cst掺杂可以使得多晶硅具有导电特性并与栅极之间形成储存电容。
4、通过构图工艺在栅绝缘层90远离衬底20的一侧形成栅极100和栅线30。具体的，可以在栅绝缘层90远离衬底20的一侧形成Mo镀层，然后对Mo镀层进行刻蚀、掺杂等步骤，形成栅极100和栅线30。
5、在栅绝缘层90远离衬底20的一侧沉积层间绝缘层110。具体的，该步骤中，依次进行层间绝缘层镀膜、活化、加氢、过孔刻蚀等步骤，形成层间绝缘层110。形成层间绝缘层110的材料可以为SiNx和SiO2中的至少一种，也可以为不同材料形成的多层结构，例如可以为一层SiO2层和一层SiNx层的双层结构。
6、在层间绝缘层110远离衬底20的一侧形成源极40、漏极50和数据线130(图中未示出)。具体的，可以在层间绝缘层110远离衬底20的一侧形成Ti/Al/Ti镀膜，然后进行刻蚀形成贯穿层间绝缘层110与有源层80电连接的源极40、漏极50和数据线130。
7、在层间绝缘层110远离衬底20的一侧形成亚克力层。具体的，可以先通过涂覆或沉积方法形成透明亚克力层，然后在透明亚克力层上涂上PR胶，采用BM Mask曝光，将对应栅线30和源极40、漏极50上方的PR胶曝光，显影后去掉PR胶，再采用CVD方式掺杂微小黑色粒子Fe3O4，Fe3O4与聚甲基丙烯酸甲酯(亚克力)以副价交联共聚或固化交联后，形成具有遮光效果的黑色亚克力材料，即遮光部分11，从而能够起到BM挡光作用。掺杂工艺完成后，再进行Strip工艺剥离掉其它地方的PR胶，得到所需要的同时作为BM挡光层设计的亚克力层10。
8、通过一次构图工艺在亚克力层10远离衬底20的一侧形成公共电极70和连接电极72。具体的，可以先在亚克力层10远离衬底20的一侧形成a-ITO镀膜，然后进行刻蚀、退火等处理，形成公共电极70和连接电极72。其中，退火处理可以将a-ITO形成P-ITO(多晶ITO)，使其更加稳定。
9、在亚克力层10远离衬底20的一侧形成第二绝缘层120。具体的，可以形成绝缘层镀膜，然后进行刻蚀，形成第二绝缘层120。
10、在第二绝缘层120远离衬底20的一侧形成像素电极60。具体的，可以先形成a-ITO镀膜，然后进行刻蚀，退火处理，形成像素电极60。
在本说明书的描述中，参考术语“一个实施例”、“一些实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本发明的至少一个实施例或示例中。在本说明书中，对上述术语的示意性表述不必须针对的是相同的实施例或示例。而且，描述的具体特征、结构、材料或者特点可以在任一个或多个实施例或示例中以合适的方式结合。此外，在不相互矛盾的情况下，本领域的技术人员可以将本说明书中描述的不同实施例或示例以及不同实施例或示例的特征进行结合和组合。
尽管上面已经示出和描述了本发明的实施例，可以理解的是，上述实施例是示例性的，不能理解为对本发明的限制，本领域的普通技术人员在本发明的范围内可以对上述实施例进行变化、修改、替换和变型。

Claims (10)

1.一种阵列基板，其特征在于，包括绝缘层，所述绝缘层包括透明部分和遮光部分，且所述遮光部分在阵列基板衬底上的投影覆盖栅线、源极、漏极和数据线在所述阵列基板衬底上的投影。
2.根据权利要求1所述的阵列基板，其特征在于，所述遮光部分在阵列基板衬底上的投影与所述栅线、源极、漏极和数据线在所述阵列基板衬底上的投影重叠。
3.根据权利要求1所述的阵列基板，其特征在于，形成所述绝缘层的材料为亚克力。
4.根据权利要求1所述的阵列基板，其特征在于，所述遮光部分掺杂有黑色粒子。
5.根据权利要求1所述的阵列基板，其特征在于，所述黑色粒子包括四氧化三铁粒子。
6.根据权利要求1-5中任一项所述的阵列基板，其特征在于，所述源极、漏极和数据线设置于所述绝缘层靠近栅极的一侧，公共电极设置于所述绝缘层远离所述栅极的一侧。
7.一种显示装置，其特征在于，包括权利要求1-6中任一项所述的阵列基板。
8.一种制备阵列基板的方法，其特征在于，包括形成绝缘层的步骤，所述绝缘层包括透明部分和遮光部分，且所述遮光部分在阵列基板衬底上的投影覆盖栅线、源极、漏极和数据线在所述阵列基板衬底上的投影。
9.根据权利要求8所述的方法，其特征在于，形成所述绝缘层的步骤包括：
形成透明层；
利用掩膜对所述透明层进行掺杂处理，形成遮光部分，以得到所述绝缘层。
10.根据权利要求9所述的方法，其特征在于，利用掩膜对所述透明层进行掺杂处理，形成遮光部分包括：
在所述透明层上形成光刻胶层；
利用所述掩膜对所述光刻胶层进行曝光；
对经过曝光的光刻胶层进行显影；
利用化学气相沉积法对所述透明层掺杂黑色粒子；
去除所述光刻胶层。
CN201710512261.5A 2017-06-28 2017-06-28 阵列基板及其制备方法和显示装置 Pending CN107195640A (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201710512261.5A CN107195640A (zh) 2017-06-28 2017-06-28 阵列基板及其制备方法和显示装置
US16/327,697 US10797087B2 (en) 2017-06-28 2018-06-14 Array substrate manufacturing method thereof and display device
PCT/CN2018/091320 WO2019001285A1 (zh) 2017-06-28 2018-06-14 阵列基板及其制备方法和显示装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710512261.5A CN107195640A (zh) 2017-06-28 2017-06-28 阵列基板及其制备方法和显示装置

Publications (1)

Publication Number Publication Date
CN107195640A true CN107195640A (zh) 2017-09-22

Family

ID=59881582

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710512261.5A Pending CN107195640A (zh) 2017-06-28 2017-06-28 阵列基板及其制备方法和显示装置

Country Status (3)

Country Link
US (1) US10797087B2 (zh)
CN (1) CN107195640A (zh)
WO (1) WO2019001285A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108461505A (zh) * 2018-02-14 2018-08-28 京东方科技集团股份有限公司 阵列基板及其制作方法、显示面板
WO2019001285A1 (zh) * 2017-06-28 2019-01-03 京东方科技集团股份有限公司 阵列基板及其制备方法和显示装置

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109313704A (zh) * 2018-09-06 2019-02-05 深圳市汇顶科技股份有限公司 光学图像采集单元、光学图像采集系统和电子设备
CN111916463B (zh) * 2020-08-20 2023-03-24 武汉华星光电技术有限公司 阵列基板、其制备方法及显示面板
CN114967209B (zh) * 2021-02-26 2023-11-17 京东方科技集团股份有限公司 显示面板及其制备方法、显示装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05249455A (ja) * 1992-03-06 1993-09-28 Toshiba Corp 液晶表示素子
CN101013221A (zh) * 2007-01-16 2007-08-08 友达光电股份有限公司 彩色滤光层的制造方法
US20110157534A1 (en) * 2003-10-09 2011-06-30 Lg Display Co., Ltd. In plane switching mode liquid crystal display device and fabrication method thereof

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100297599B1 (ko) * 1995-11-29 2001-09-22 다카노 야스아키 표시장치 및 표시장치의 제조방법
KR100857133B1 (ko) * 2002-06-28 2008-09-05 엘지디스플레이 주식회사 액정표시장치용 어레이기판 및 그 제조방법
TW200410029A (en) 2002-12-05 2004-06-16 Chunghwa Picture Tubes Ltd Liquid crystal displayer with ink jet color filter and manufacture method thereof
TWI312882B (en) * 2003-03-24 2009-08-01 Dainippon Printing Co Ltd Curable resin composition, curable resin composition for photo-process patterning, color filter, substrate for liquid crystal panel and liquid crystal panel
US8148895B2 (en) * 2004-10-01 2012-04-03 Semiconductor Energy Laboratory Co., Ltd. Display device and manufacturing method of the same
KR101177720B1 (ko) * 2005-09-20 2012-08-28 엘지디스플레이 주식회사 액정표시장치와 그 제조방법
CN103676376B (zh) * 2013-12-10 2016-01-06 深圳市华星光电技术有限公司 阵列基板及其制作方法及应用该阵列基板的液晶显示面板
CN105093746B (zh) 2015-08-10 2017-10-17 深圳市华星光电技术有限公司 阵列基板及液晶显示面板
CN107195640A (zh) 2017-06-28 2017-09-22 京东方科技集团股份有限公司 阵列基板及其制备方法和显示装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05249455A (ja) * 1992-03-06 1993-09-28 Toshiba Corp 液晶表示素子
US20110157534A1 (en) * 2003-10-09 2011-06-30 Lg Display Co., Ltd. In plane switching mode liquid crystal display device and fabrication method thereof
CN101013221A (zh) * 2007-01-16 2007-08-08 友达光电股份有限公司 彩色滤光层的制造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019001285A1 (zh) * 2017-06-28 2019-01-03 京东方科技集团股份有限公司 阵列基板及其制备方法和显示装置
US10797087B2 (en) 2017-06-28 2020-10-06 Chengdu Boe Optoelectronics Technology Co., Ltd. Array substrate manufacturing method thereof and display device
CN108461505A (zh) * 2018-02-14 2018-08-28 京东方科技集团股份有限公司 阵列基板及其制作方法、显示面板

Also Published As

Publication number Publication date
US20190214411A1 (en) 2019-07-11
US10797087B2 (en) 2020-10-06
WO2019001285A1 (zh) 2019-01-03

Similar Documents

Publication Publication Date Title
CN107195640A (zh) 阵列基板及其制备方法和显示装置
CN208111444U (zh) 薄膜晶体管阵列基板及显示装置
CN103715137B (zh) 阵列基板及其制造方法、显示装置
CN102629664B (zh) 一种阵列基板及其制作方法和显示装置
CN106847744A (zh) 阵列基板的制备方法、阵列基板及显示装置
CN104678643B (zh) 显示基板及显示面板的制作方法
CN106597770B (zh) 一种阵列基板及其制作方法、显示装置
CN105957867B (zh) 阵列基板母板及其制作方法、显示装置
CN108336100A (zh) 一种阵列基板及其制备方法、显示面板、显示装置
CN102637636A (zh) 有机薄膜晶体管阵列基板及其制作方法和显示装置
CN103454798B (zh) 阵列基板及其制作方法、显示装置
CN109360828A (zh) 显示基板及其制造方法、显示装置
CN104779256B (zh) 阵列基板及其制备方法、液晶面板
US10663820B2 (en) Display substrate, its manufacturing method, and display device
TW200921228A (en) Liquid crystal display device and fabrication method thereof
CN106898710A (zh) 一种oled显示面板及其制备方法、显示器
CN102800630A (zh) 一种阵列基板及其制备方法和显示装置
CN102709234A (zh) 薄膜晶体管阵列基板及其制造方法和电子器件
CN107527927A (zh) 一种阵列基板及其制备方法、显示装置
CN105977210A (zh) 一种阵列基板及其制备方法
CN107086181A (zh) 薄膜晶体管及其制作方法、阵列基板和显示器
CN109786257A (zh) 薄膜晶体管的制作方法、阵列基板和显示面板
CN102931138B (zh) 阵列基板及其制造方法、显示装置
CN109031833A (zh) 用于ads显示模式的阵列基板及其制作方法和应用
CN104576527B (zh) 一种阵列基板的制备方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20170922