CN107147394A - A kind of high-voltage signal sample circuit based on double-sampling - Google Patents

A kind of high-voltage signal sample circuit based on double-sampling Download PDF

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Publication number
CN107147394A
CN107147394A CN201710311485.XA CN201710311485A CN107147394A CN 107147394 A CN107147394 A CN 107147394A CN 201710311485 A CN201710311485 A CN 201710311485A CN 107147394 A CN107147394 A CN 107147394A
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switch
sampling
voltage
sampling capacitance
fully differential
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CN107147394B (en
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段权珍
丁月民
黄胜明
刘慧敏
苏林
郭天
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Tju Binhai Industrial Research Institute Co ltd
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Tianjin University of Technology
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/124Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/1245Details of sampling arrangements or methods

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

A kind of high-voltage signal sample circuit based on double-sampling.It includes the 3rd sampling capacitance CS3, the 4th sampling capacitance CS4, fully differential trsanscondutance amplifier S, third integral electric capacity CI3, the 4th integrating capacitor CI4, first switch c1, second switch c2, the 3rd switch c3, the 4th switch c4, the 5th switch c5, the 6th switch c6, the 7th switch c7 and the 8th switch c8.The effect and advantage for the high-voltage signal sample circuit based on double-sampling that the present invention is provided:The circuit utilizes double-sampling, can effectively solve in low voltage CMOS process because that can not be realized without high-voltage capacitance to high pressure lithium battery voltage acquisition problems, i.e., HVCMOS can be replaced using low voltage CMOS process, so as to reduce cost.

Description

A kind of high-voltage signal sample circuit based on double-sampling
Technical field
The invention belongs to high voltage Sampling techniques field, more particularly to a kind of high-voltage signal based on double-sampling is adopted Sample circuit.
Background technology
With the continuous improvement of people's living standards, requirement of the people to living environment there has also been higher pursuit.Therefore, In order to reduce the exhaust emissions of automobile, reduce environmental pollution, the novel traffic such as electric bicycle, electric automobile, scooter Instrument increasingly by people concern and like.Wherein, battery its security and makes as the core of these products Become the consideration emphasis of product design with the life-span.Thus, in order to improve the service life of battery and ensure what battery was used Security, is suggested to battery charging and discharging monitoring, management and control circuit chip, and has been effectively used in different electronics productions Among product.Fig. 1 is a kind of more piece tandem cell group monitor simple block diagram, as shown in figure 1, the monitor is first by switching Si The monitored battery of selection, then will detect analog signal and be converted into data signal by an analog-digital converter and send to Circuit is detected, the voltage condition of selected battery is measured by detection circuit, so as to control the discharge and recharge to battery.Its In, switch in S1, S2 to Sn only allows a switch to be opened every time, and rest switch is closure state, i.e., and each only one Batteries are measured.Due to being cascaded multiple batteries, therefore the cell voltage positioned at battery pack top is higher.
Fig. 2 is typical analog-digital converter mesohigh signal sample circuit, and the circuit is used to sample to cell voltage Circuit, it includes:First sampling capacitance CS1, the second sampling capacitance CS2, fully differential trsanscondutance amplifier S, first integral electric capacity CI1、 Second integral electric capacity CI2, first switch c1, second switch c2, the 3rd switch c3, the 4th switch c4, the 5th switch c5, the 6th open C6, the 7th switch c7 and the 8th switch c8 are closed, wherein:
First switch c1 one end is the positive input terminal of this sample circuit, and input signal vinp, the other end passes sequentially through the One sampling capacitance CS1It is connected with the 7th switch c7 with fully differential trsanscondutance amplifier S in-phase input end, second switch c2 one end For the negative input end of this sample circuit, input signal vinn, the other end passes sequentially through the second sampling capacitance CS2With the 8th switch c8 It is connected with fully differential trsanscondutance amplifier S inverting input, the 3rd switch c3 one end and the second sampling capacitance CS2Opened with the 8th The tie point for closing c8 is connected, another termination reference voltage vcm, the 4th switch c4 one end and the first sampling capacitance CS1With the 7th Switch c7 tie point is connected, and another termination reference voltage vcm, the 5th switch c5 one end is adopted with first switch c1 and first Sample electric capacity CS1Tie point be connected, another termination reference voltage vcm, the 6th switch c6 one end and second switch c2 and second Sampling capacitance CS2Tie point be connected, another termination reference voltage vcm, first integral electric capacity CI1One end and fully differential across Amplifier S in-phase input end connection is led, the other end is connected with fully differential trsanscondutance amplifier S negative output terminal;Second integral electricity Hold CI2One end be connected with fully differential trsanscondutance amplifier S inverting input, the other end and fully differential trsanscondutance amplifier S it is just defeated Go out end connection.
Described fully differential trsanscondutance amplifier S is double-width grinding, the fully differential trsanscondutance amplifier of both-end output, and amplifier is defeated It is amplifier gain, i.e. V to go on business divided by input differenceoutp-Voutn=A (Vinp-Vinn), A is amplifier gain.
The first described sampling capacitance CS1With the second sampling capacitance CS2Capacity it is equal, and capacity=CS;Described first Integrating capacitor CI1With second integral electric capacity CI2Capacity it is equal, and capacity=CI
The positive input terminal of this described sample circuit by gating switch S1-Sn one group of contact with battery v1-vn just Pole is connected, another group contact and multiple battery v1-vns of the negative input end of this sample circuit by multiple gating switch S1-Sn Negative pole be connected.
Described first is to the 8th switch c1-c8 under the first clock signal clk 1 and second clock signal CLK2 control Gated and closed, when the first clock signal clk 1 is high level, second clock signal CLK2 is low level, at first The lower first switch c1 of clock signal CLK1 high level effect, second switch c2, the 3rd switch c3 and the 4th switch c4 are strobed; The lower 5th switch c5 of the low level of two clock signal clk 2 effect, the 6th switch c6, the 7th switch c7 and the 8th switch c8 closures, quilt The upper terminal voltage vinp of battery is selected to be charged to the first sampling capacitance C on circuit topS1On, i.e. first sampling capacitance on circuit top CS1The voltage at two ends is voltage difference of the anode voltage to reference voltage vcm (vcm is low voltage) of battery.Meanwhile, it is chosen electricity The lower terminal voltage in pond is charged to the second sampling capacitance C of circuit bottomS2On, i.e. the second sampling capacitance of circuit bottom CS2Two ends Voltage is voltage difference of the cathode voltage to voltage vcm of battery.When second clock signal CLK2 is high level, the first clock letter Number CLK1 is low level, and the 5th to the 8th switch c5-c8 is opened under second clock signal CLK2 effects, in the first clock signal The lower first to fourth switch c1-c4 closures of CLK1 effects, the first sampling capacitance CS1With the second sampling capacitance CS2Both end voltage is Reference voltage vcm.Now, in the presence of amplifier, electric capacity and switch, sampling capacitance is discharged the electric charge of collection, electricity Lotus is transferred in integrating capacitor, and voltage vcm1=vcm.It can be seen that, from the first clock signal clk 1 to second clock signal CLK2, Circuit top the first sampling capacitance CS1Charge variation amount be [(vip-vcm)-(vcm-vcm)] * CS=(vip-vcm) * CS, electricity Road bottom the second sampling capacitance CS2Charge variation amount be [(vin-vcm)-(vcm-vcm)] * CS=(vin-vcm) * CS, because This, the voltage difference being chosen on battery is [(vip-vcm) * CS–(vin-vcm)*CS]/CS=vip-vin.
For example:The battery of top, i.e. the first batteries are strobed, and switch S1 is opened, the cell top end voltage to ground Voltage difference is vinp=v1+v2+ ...+vn, and the voltage difference of the battery bottom voltage to ground is vinn=v2+ ...+vn, wherein, v1 For the voltage on the battery, the like, vn is the voltage in the n-th batteries, i.e. voltage on lowermost end battery.At first When clock signal CLK1 is high level, the anode voltage of the batteries of top first is charged to the first sampling capacitance CS1, the first economize on electricity The cathode voltage in pond is charged to the second sampling capacitance CS2;When second clock signal CLK2 is high level, sampling capacitance will be gathered To electric charge discharged, from the first clock signal clk 1 to second clock signal CLK2, the voltage difference in the first batteries is [(vinp-vcm)*CS–(vinn-vcm)*CS]/CS=vinp-vinn=v1.It can be seen that, switch (first batteries when S1 is opened It is selected), due to the cascade of n batteries, charging voltage (vinp-vcm) and (vinn-vcm) on two sampling capacitances all compare Height, therefore, two sampling capacitances are required for " high-voltage capacitance " to realize in circuit, but some techniques do not provide " high pressure Electric capacity " model, and it is of a relatively high to provide the technique typically cost of " high-voltage capacitance ".
The content of the invention
In order to solve the above problems, it is an object of the invention to provide a kind of high-voltage signal sampling based on double-sampling Circuit.
In order to achieve the above object, the high-voltage signal sample circuit based on double-sampling that the present invention is provided includes:The Three sampling capacitance CS3, the 4th sampling capacitance CS4, fully differential trsanscondutance amplifier S, third integral electric capacity CI3, the 4th integrating capacitor CI4、 First switch c1, second switch c2, the 3rd switch c3, the 4th switch c4, the 5th switch c5, the 6th switch c6, the 7th switch c7 C8 is switched with the 8th, wherein:
First switch c1 one end is the positive input terminal of this sample circuit, and input signal vinp, the other end passes sequentially through the Three sampling capacitance CS3It is connected with the 7th switch c7 with fully differential trsanscondutance amplifier S in-phase input end, second switch c2 one end For the negative input end of this sample circuit, input signal vinn, the other end passes sequentially through the 4th sampling capacitance CS4With the 8th switch c8 It is connected with fully differential trsanscondutance amplifier S inverting input, the 3rd switch c3 one end and the 4th sampling capacitance CS4Opened with the 8th The tie point for closing c8 is connected, another termination reference voltage vinp, the 4th switch c4 one end and the 3rd sampling capacitance CS3With Seven switch c7 tie points are connected, another termination reference voltage vinn, the 5th switch c5 one end and first switch c1 and the Three sampling capacitance CS3Tie point be connected, another termination reference voltage vcm, the 6th switch c6 one end and second switch c2 and 4th sampling capacitance CS4Tie point be connected, another termination reference voltage vcm, third integral electric capacity CI3One end with it is complete poor Divide trsanscondutance amplifier S in-phase input end connection, the other end is connected with fully differential trsanscondutance amplifier S negative output terminal;4th product Divide electric capacity CI4One end be connected with fully differential trsanscondutance amplifier S inverting input, the other end and fully differential trsanscondutance amplifier S's Positive output end is connected.
The effect and advantage for the high-voltage signal sample circuit based on double-sampling that the present invention is provided:The circuit utilizes double Sampling techniques, can effectively solve in low voltage CMOS process because can not be realized without high-voltage capacitance to high pressure lithium battery voltage collection ask Topic, i.e., can replace HVCMOS, so as to reduce cost using low voltage CMOS process.
Brief description of the drawings
Fig. 1 is more piece tandem cell group monitor simple block diagram;
Fig. 2 is typical analog-digital converter mesohigh signal sample circuit schematic diagram;
The schematic diagram for the high-voltage signal sample circuit based on double-sampling that Fig. 3 provides for the present invention.
Embodiment
The high-voltage signal based on double-sampling that the present invention is provided is sampled with specific embodiment below in conjunction with the accompanying drawings electric Road is described in detail.
As shown in figure 3, the high-voltage signal sample circuit based on double-sampling that the present invention is provided includes:3rd sampling electricity Hold CS3, the 4th sampling capacitance CS4, fully differential trsanscondutance amplifier S, third integral electric capacity CI3, the 4th integrating capacitor CI4, first switch C1, second switch c2, the 3rd switch c3, the 4th switch c4, the 5th switch c5, the 6th switch c6, the 7th switch c7 and the 8th are opened C8 is closed, wherein:
First switch c1 one end is the positive input terminal of this sample circuit, and input signal vinp, the other end passes sequentially through the Three sampling capacitance CS3It is connected with the 7th switch c7 with fully differential trsanscondutance amplifier S in-phase input end, second switch c2 one end For the negative input end of this sample circuit, input signal vinn, the other end passes sequentially through the 4th sampling capacitance CS4With the 8th switch c8 It is connected with fully differential trsanscondutance amplifier S inverting input, the 3rd switch c3 one end and the 4th sampling capacitance CS4Opened with the 8th The tie point for closing c8 is connected, another termination reference voltage vinp, the 4th switch c4 one end and the 3rd sampling capacitance CS3With Seven switch c7 tie points are connected, another termination reference voltage vinn, the 5th switch c5 one end and first switch c1 and the Three sampling capacitance CS3Tie point be connected, another termination reference voltage vcm, the 6th switch c6 one end and second switch c2 and 4th sampling capacitance CS4Tie point be connected, another termination reference voltage vcm, third integral electric capacity CI3One end with it is complete poor Divide trsanscondutance amplifier S in-phase input end connection, the other end is connected with fully differential trsanscondutance amplifier S negative output terminal;4th product Divide electric capacity CI4One end be connected with fully differential trsanscondutance amplifier S inverting input, the other end and fully differential trsanscondutance amplifier S's Positive output end is connected.
The high-voltage signal sample circuit based on double-sampling that the present invention is provided is to turn the typical modulus shown in Fig. 2 First sampling capacitance C in parallel operation mesohigh signal sample circuitS1With the 3rd sampling capacitance CS3To replace, the second sampling capacitance CS2 With the 4th sampling capacitance CS4To replace, first integral electric capacity CI1With third integral electric capacity CI3To act on behalf of, second integral electric capacity CI2With 4th integrating capacitor CI4To replace, and the reference voltage vcm connected on the 4th switch c4 is changed to connect input signal vinn, the The reference voltage vcm connected on three switch c3 is changed to connection input signal vinp.
Now, when the first clock signal clk 1 is high level, and second clock signal CLK2 is low level, in the first clock The lower first to fourth switch c1-c4 of signal CLK1 effects is strobed, and the 5th to the 8th opens under second clock signal CLK2 effects Close c5-c8 to be closed, the upper-end anode voltage and lower-end cathode voltage difference of selected battery are charged to the 3rd sampling on circuit top Electric capacity CS3On, i.e. the 3rd sampling capacitance C on circuit topS3The voltage at two ends is voltage difference of the galvanic anode to cell cathode.Together When, the lower-end cathode voltage and upper-end anode voltage of selected battery are charged to the 4th sampling capacitance C of circuit bottomS4On, i.e., it is electric 4th sampling capacitance C of road bottomS4The voltage at two ends is voltage difference of the cathode voltage to galvanic anode of battery.When the first clock Signal CLK1 is low level, when second clock signal CLK2 is high level, and the 5th is switched under second clock signal CLK2 effects Opened to the 8th c5-c8, switching first to fourth c1-c4 under the effect of the first clock signal clk 1 closes.In amplifier, electric capacity In the presence of switch and common mode input control circuit, the electric charge of collection is discharged and is transferred to the by sampling capacitance Three integrating capacitor CI3With the 4th integrating capacitor CI4On, if voltage vcm1=vcm can be obtained by circuit control.It can be seen that, from first when Clock signal CLK1 to second clock signal CLK2, the 3rd sampling capacitance C on circuit topI3Charge variation amount be [(vinp- vin)-(vcm-vcm)]*CS/ 2=(vinp-vinn) * CS/ 2, the 4th sampling capacitance C of circuit bottomS4Charge variation amount be [(vinn-vinp)-(vcm-vcm)]*CS/ 2=(vin-vip) * CS/ 2, therefore, the voltage difference being chosen on battery is [(vinp- vinn)*CS/2–(vinn-vinp)*CS/2]/CS/ 2=vinp-vinn.It can be seen that, when the first clock signal clk 1 is acted on, adopt Voltage difference (vip-vin) on sample electric capacity is low-voltage, therefore " low-voltage capacitance " can be utilized to realize the sampling to high-voltage signal.

Claims (1)

1. a kind of high-voltage signal sample circuit based on double-sampling, it is characterised in that:It is described based on double-sampling High-voltage signal sample circuit includes:3rd sampling capacitance CS3, the 4th sampling capacitance CS4, fully differential trsanscondutance amplifier S, the 3rd product Divide electric capacity CI3, the 4th integrating capacitor CI4, first switch c1, second switch c2, the 3rd switch c3, the 4th switch c4, the 5th switch C5, the 6th switch c6, the 7th switch c7 and the 8th switch c8, wherein:
First switch c1 one end is the positive input terminal of this sample circuit, and input signal vinp, the other end passes sequentially through the 3rd and adopted Sample electric capacity CS3It is connected with the 7th switch c7 with fully differential trsanscondutance amplifier S in-phase input end, second switch c2 one end is this The negative input end of sample circuit, input signal vinn, the other end passes sequentially through the 4th sampling capacitance CS4With the 8th switch c8 and entirely Differential transconductance S inverting input connection, the 3rd switch c3 one end and the 4th sampling capacitance CS4With the 8th switch c8 Tie point be connected, another termination reference voltage vinp, the 4th switch c4 one end and the 3rd sampling capacitance CS3Opened with the 7th The tie point for closing c7 is connected, and another termination reference voltage vinn, the 5th switch c5 one end is adopted with first switch c1 and the 3rd Sample electric capacity CS3Tie point be connected, another termination reference voltage vcm, the 6th switch c6 one end and second switch c2 and the 4th Sampling capacitance CS4Tie point be connected, another termination reference voltage vcm, third integral electric capacity CI3One end and fully differential across Amplifier S in-phase input end connection is led, the other end is connected with fully differential trsanscondutance amplifier S negative output terminal;4th integration electricity Hold CI4One end be connected with fully differential trsanscondutance amplifier S inverting input, the other end is just defeated with fully differential trsanscondutance amplifier S's Go out end connection.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113063981A (en) * 2021-03-03 2021-07-02 上海摩芯半导体技术有限公司 Battery pack voltage acquisition circuit and voltage acquisition method
CN113078717A (en) * 2021-05-06 2021-07-06 北京时代民芯科技有限公司 Voltage dump circuit applied to voltage sampling of multiple batteries
CN113507287A (en) * 2021-06-18 2021-10-15 深圳天德钰科技股份有限公司 Sample-and-hold circuit and electronic device with same
CN113625034A (en) * 2021-07-19 2021-11-09 北京知存科技有限公司 Sampling circuit, sampling array, integrated storage and calculation chip and electronic equipment

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CN104283565A (en) * 2013-06-24 2015-01-14 硅实验室股份有限公司 Capacitance to Digital Converter and Method
JP2016042627A (en) * 2014-08-14 2016-03-31 旭化成エレクトロニクス株式会社 Fully differential switched capacitor circuit
CN105490649A (en) * 2014-09-15 2016-04-13 万高(杭州)科技有限公司 Instrument amplifier

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Publication number Priority date Publication date Assignee Title
US7843232B2 (en) * 2009-02-27 2010-11-30 Atmel Corporation Dual mode, single ended to fully differential converter structure
CN104283565A (en) * 2013-06-24 2015-01-14 硅实验室股份有限公司 Capacitance to Digital Converter and Method
JP2016042627A (en) * 2014-08-14 2016-03-31 旭化成エレクトロニクス株式会社 Fully differential switched capacitor circuit
CN105490649A (en) * 2014-09-15 2016-04-13 万高(杭州)科技有限公司 Instrument amplifier

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113063981A (en) * 2021-03-03 2021-07-02 上海摩芯半导体技术有限公司 Battery pack voltage acquisition circuit and voltage acquisition method
CN113063981B (en) * 2021-03-03 2024-03-22 上海摩芯半导体技术有限公司 Battery pack voltage acquisition circuit and voltage acquisition method
CN113078717A (en) * 2021-05-06 2021-07-06 北京时代民芯科技有限公司 Voltage dump circuit applied to voltage sampling of multiple batteries
CN113507287A (en) * 2021-06-18 2021-10-15 深圳天德钰科技股份有限公司 Sample-and-hold circuit and electronic device with same
US11610638B2 (en) 2021-06-18 2023-03-21 Jadard Technology Inc. Sample holding circuit of reduced complexity and electronic device using the same
TWI810598B (en) * 2021-06-18 2023-08-01 大陸商深圳天德鈺科技股份有限公司 Sample and hold circuit and electronic devices with same
CN113625034A (en) * 2021-07-19 2021-11-09 北京知存科技有限公司 Sampling circuit, sampling array, integrated storage and calculation chip and electronic equipment
CN113625034B (en) * 2021-07-19 2024-05-24 杭州知存算力科技有限公司 Sampling circuit, sampling array, integrated memory chip and electronic equipment

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