CN207518263U - A kind of current foldback circuit - Google Patents
A kind of current foldback circuit Download PDFInfo
- Publication number
- CN207518263U CN207518263U CN201720894870.7U CN201720894870U CN207518263U CN 207518263 U CN207518263 U CN 207518263U CN 201720894870 U CN201720894870 U CN 201720894870U CN 207518263 U CN207518263 U CN 207518263U
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Abstract
A kind of current foldback circuit, including battery pack, switch unit, signal sampling unit, signal comparing unit, logic circuit unit and current sampling resistor.The signal sampling unit includes first resistor, second resistance, 3rd resistor, the 4th resistance, the 5th resistance and the first operational amplifier.The signal comparing unit includes first comparator and the second comparator.The logic circuit unit includes the first AND gate circuit, the second AND gate circuit and third AND gate circuit.The signal sampling unit samples the operating current of the current sampling resistor and is amplified and input voltage signal is to signal comparing unit.The signal comparing unit outputs signals to the logic circuit unit after processing is compared to input signal.The output signal of the electric current comparing unit and pulse signal are carried out logic judgment by the logic circuit unit.When overcurrent, logic circuit unit output low level, switch unit is not turned on, so as to play the purpose of overcurrent protection.
Description
【Technical field】
The utility model is related to electric vehicle engineering field more particularly to a kind of current foldback circuits.
【Background technology】
As electric vehicle is more and more universal, BMS's (Battery Management System, battery management system)
It is safe and reliable just particularly important particularly in the state of equilibrium using more and more.In the case of overcurrent, ensure balanced
For size of current in rational range, overcurrent protection is played in fast reaction, uncontrollable factor can be avoided to deposit well
So as to ensure the reliability of BMS systems.Current technology takes loop feedback longer, and signal is acquired by microcontroller
It is not only of high cost, if but also microcontroller damage after lack necessary safeguard measure, it is difficult to play the role of quickly and effectively to motor.
In consideration of it, it is really necessary to provide a kind of new current foldback circuit to overcome drawbacks described above.
【Utility model content】
The purpose of this utility model is to provide a kind of current foldback circuit at low cost, efficient and high security performance.
To achieve these goals, the utility model provides a kind of current foldback circuit, including battery pack, switch unit and
Current sampling resistor；The anode of the battery pack connects the battery pack after being sequentially connected in series switch unit, current sampling resistor
Cathode；The current foldback circuit further includes signal sampling unit, signal comparing unit and logic circuit unit；The signal
Both ends of two input terminals of sampling unit respectively with the current sampling resistor are connected；The signal comparing unit and the letter
Number sampling unit output terminal is connected, by the voltage value of signal sampling unit output and preset reference voltage upper limit value, base
Quasi- voltage lower limit value is compared, and judges whether the voltage value has exceeded preset reference voltage upper limit value or lower limiting value, and
Export comparison result, realize to whether the detection of overcurrent；The input terminal of the logic circuit unit is respectively compared with the signal
Two output terminals of unit are connected, and the output terminal of the logic circuit unit is connected with one end of the switch unit；It is described to patrol
It collects circuit unit and logic judgment is carried out to the output signal and pulse signal of the signal comparing unit, output voltage signal is simultaneously controlled
Make whether the switch unit is connected.
Further, the signal sampling unit includes first resistor, second resistance, 3rd resistor, the 4th resistance, the 5th
Resistance and the first operational amplifier；One end of wherein described first resistor and second resistance is respectively as the signal sampling unit
Two input terminals, output terminal of the 5th resistance as the signal sampling unit；The other end of the first resistor connects
Connect the inverting input of first operational amplifier；The other end of the second resistance connects the positive of the first operational amplifier
Input terminal；One end of the 3rd resistor connects the inverting input of first operational amplifier, other end connection described the
The output terminal of one operational amplifier；4th resistance is connected with the normal phase input end of first operational amplifier, the other end
It is connected with the first bias voltage；One end of 5th resistance is connected with the output terminal of first operational amplifier, the other end
It is connected with the input terminal of the signal comparing unit.
Further, the signal comparing unit includes first comparator and the second comparator；The first comparator
Normal phase input end is connected with the output terminal of the signal sampling unit, and inverting input is connected with the first reference voltage；It is described
The inverting input of second comparator is connected with the output terminal of the signal sampling unit, normal phase input end and the second benchmark electricity
Pressure is connected；First reference voltage is a reference value of lower limit, if the voltage signal values are less than first reference voltage,
It is considered as that lower limit overcurrent has occurred；Second reference voltage is a reference value of the upper limit, if the voltage signal values are higher than the
Two reference voltages are considered as then that upper limit overcurrent has occurred；If the voltage signal values are higher than first reference voltage, institute
First comparator output high level is stated, it is on the contrary then export low level；If the voltage signal values are less than second reference voltage,
Then second comparator output high level, it is on the contrary then export low level.
Further, the logic circuit unit includes the first AND gate circuit, the second AND gate circuit and third AND gate circuit；
The first end of first AND gate circuit is connected with the output terminal of the first comparator, the second end of first AND gate circuit
It is connected with pulse signal input terminal；The second AND gate circuit first end is connected with the output terminal of second comparator, described
The second end of second AND gate circuit is connected with the pulse signal input terminal；The first end of the third AND gate circuit and described the
The output terminal of one AND gate circuit is connected, the output terminal phase of the second end of the third AND gate circuit and second AND gate circuit
Even；The logic circuit unit further includes the 6th resistance, one end of the 6th resistance and the output of the third AND gate circuit
End is connected, and other end one end single with the switch is connected；When the first comparator output signal is high level and input
When pulse signal is high level, first AND gate circuit exports high level, otherwise exports low level；When second comparator
Output signal is the pulse signal of high level and input when being high level, and second AND gate circuit exports high level, otherwise defeated
Go out low level；The output signal of first AND gate circuit and the output signal of the second AND gate circuit are transferred to the third and door
Circuit；When the output signal that the output signal of first AND gate circuit is high level and the second AND gate circuit is high level,
The third AND gate circuit exports high level；When the output signal of first AND gate circuit or the output letter of the second AND gate circuit
When number being low level, the third AND gate circuit exports low level.
Further, the switch unit is mos pipe switching circuits, and the mos pipes switching circuit high level is connected；Institute
The input terminal for stating mos pipe switching circuits is connected with the output terminal of the logic circuit unit, when the mos pipes switching circuit receives
When the output signal of the logic circuit unit arrived is high level, the mos pipes switching circuit conducting, entire circuit opens charge and discharge
Electricity；When the output signal of logic circuit unit that the mos pipes switching circuit receives is low level, the mos pipes switch
Circuit is not turned on, and entire circuit stops charge and discharge.
Further, the grid of the mos pipes be connected through the 6th resistance with third with the output terminal of door, the source electrode of mos pipes
It is connected through current sampling resistor with the cathode of battery pack, the drain electrode of mos pipes is connected with the anode of battery pack.
Compared with the prior art, the current foldback circuit can quickly finish acquisition, over-current detection and the overcurrent of signal
Protection, circuit is simple, and cost is relatively low, and safety coefficient is high；Wherein described first operational amplifier forms difference channel to major loop
Electric current carry out accurate acquisition, sampling error is small；Realize that quick overcurrent protection is responded compared with software overcurrent by the method for hardware
For protection more quickly with reliably.
【Description of the drawings】
Fig. 1 is the circuit diagram of overcurrent protection provided by the utility model.
【Specific embodiment】
It is clear in order to be more clear the purpose of this utility model, technical solution and advantageous effects, below in conjunction with
Attached drawing in the utility model embodiment clearly and completely retouches the technical solution in the utility model embodiment
It states, it is clear that described embodiment is only the embodiment of a part of embodiment of the utility model rather than whole.
Based on the embodiment in the utility model, those of ordinary skill in the art are obtained without making creative work
Every other embodiment, shall fall within the protection scope of the present invention.
When an element was considered with another element " being connected ", it can be directly to another element or
It may be simultaneously present centering elements.Unless otherwise defined, all of technologies and scientific terms used here by the article is with belonging to this reality
It is identical with the novel normally understood meaning of those skilled in the art.Made in the specification of the utility model herein
Term is intended merely to the purpose of description specific embodiment, it is not intended that in limitation the utility model.
Referring to Fig. 1, a kind of current foldback circuit 100 provided by the utility model, the current foldback circuit 100 wraps
Include battery pack 10, switch unit 20, signal sampling unit 30, signal comparing unit 40, logic circuit unit 50 and current sample
Resistance Rs.One end of the battery pack 10 connects the switch unit 20, and the other end connects the current sampling resistor Rs's
One end.In present embodiment, the anode of the battery pack 10 connects institute after being sequentially connected in series switch unit 20, current sampling resistor Rs
State the cathode of battery pack 10.Two input terminals of the signal sampling unit 30 both ends with the current sampling resistor Rs respectively
It is connected, output terminal is connected with the signal comparing unit 40.Two input terminals of the logic circuit unit 50 respectively with it is described
Two output terminals of signal comparing unit 40 are connected, the output terminal of the logic circuit unit 50 and the one of the switch unit 20
End is connected.
Specifically, the signal sampling unit 30 includes first resistor R1, second resistance R2,3rd resistor R3, the 4th electricity
R4, the 5th resistance R5 and the first operational amplifier U1 are hindered, wherein one end of the first resistor R1 and second resistance R2 is made respectively
For two input terminals of the signal sampling unit 30, outputs of the 5th resistance R5 as the signal sampling unit 30
End.The other end of the first resistor R1 connects the inverting input of the first operational amplifier U1.The second resistance R2
The other end connect the first operational amplifier U1 normal phase input end.One end of the 3rd resistor R3 connects first operation
The inverting input of amplifier U1, the other end connect the output terminal of the first operational amplifier U1.The 4th resistance R4 mono-
End is connected with the normal phase input end of the first operational amplifier U1, and the other end is connected with the first bias voltage Vr.Described 5th
One end of resistance R5 is connected with the output terminal of the first operational amplifier U1, and the other end is defeated with the signal comparing unit 40
Enter end to be connected.
Specifically, the signal comparing unit 40 includes first comparator B1 and the second comparator B2.Described first compares
The normal phase input end of device B1 is connected with the output terminal of the signal sampling unit 30, inverting input and the first reference voltage
Vr1 is connected.The inverting input of the second comparator B2 is connected with the output terminal of the signal sampling unit 30, and positive is defeated
Enter end with the second reference voltage V r2 to be connected.
Specifically, the logic circuit unit 50 includes the first AND gate circuit A1, the second AND gate circuit A2 and third and door
Circuit A3.The first end of the first AND gate circuit A1 is connected with the output terminal of the first comparator B1, and described first and door
The second end of circuit A1 is connected with pulse signal Vp input terminals.The second AND gate circuit A2 first ends and second comparator
The output terminal of B2 is connected, and the second end of the second AND gate circuit A2 is connected with the pulse signal Vp input terminals.The third
The first end of AND gate circuit A3 is connected with the output terminal of the first AND gate circuit A1, the second end of the third AND gate circuit A3
It is connected with the output terminal of the second AND gate circuit A2.The logic circuit unit 50 further includes the 6th resistance R6, and the described 6th
One end of resistance R6 is connected with the output terminal of the third AND gate circuit A3, one end phase of the other end and the switch unit 20
Even.
It should be noted that the battery pack that the battery pack 10 is made of single battery core with different series-parallel systems.
The operation principle of current foldback circuit a kind of to the utility model is illustrated below.
The current signal that the battery pack 10 exports is changed into voltage signal, the signal by the current sampling resistor Rs
Collected voltage signal is converted to effectively by the first operational amplifier U1 in sampling unit 30 by certain ratio enlargement
Voltage signal.It should be noted that the resistance in the battery sampling unit 30, which is chosen, wants suitable, you can after conversion
Faint voltage signal carries out the amplification output of certain multiple, and to ensure that normal phase input end is balanced with negative-phase input, it is poor to reduce
Mould interferes.In addition, it is also necessary to select the power and internal resistance value of suitable current sampling resistor Rs, if power is 1W, internal resistance value is
10m Ω, then can by electric current Is be 10A.Amplification factor Av=R3/R1, amplified signal Vol=Vr1-Is*Rs* (R3/R1),
The amplitude of amplified signal needs to be maintained in the treatable range of input terminal of the signal comparing unit 40, you can completes to letter
Number conversion, amplification, acquisition.It should also be noted that, the 3rd resistor R3 forms negative-feedback circuit, the 4th resistance R4
Form differential amplifier circuit.The positive incoming line of the first amplifier U1 is equidistantly walked with negative incoming line keeping parallelism
Line, for eliminating interference of the differential mode noise to sampled signal when system works.
The signal comparing unit 40 realize to power module whether the detection of overcurrent.The first comparator B1 and
Two comparator B2 receive the voltage signal Vol, the first comparator B1 and the second ratio that the signal sampling unit 30 exports
The voltage signal Vol is compared with the first reference voltage V r1 and the second reference voltage V r2 compared with device B2.In this circuit
The first reference voltage V r1 is a reference value of lower limit, if the voltage signal Vol values are less than the first reference voltage V r1,
It is considered as then that lower limit overcurrent has occurred.The second reference voltage V r2 is a reference value of the upper limit, if the voltage signal Vol
Value is then considered as that upper limit overcurrent has occurred higher than the second reference voltage V r2.If the voltage signal Vol values are higher than described the
One reference voltage V r1, then first comparator B1 output high level are on the contrary then export low level.If the voltage signal Vol
Value is less than the second reference voltage V r2, then the second comparator B2 outputs high level, on the contrary then export low level.
Logic judgment is carried out followed by 40 output signal of electric current comparing unit and pulse signal Vp.Described first
Comparator B1 output signals are transferred to the first AND gate circuit A1, and the second comparator B2 output signals are transferred to second and door electricity
Road A2.According to the characteristics of AND gate circuit, when the first comparator B1 output signals are high level and the pulse signal Vp of input
During for high level, the first AND gate circuit A1 exports high level, otherwise exports low level.When the second comparator B2 is exported
Signal is the pulse signal Vp of high level and input when being high level, and the second AND gate circuit A2 exports high level, otherwise defeated
Go out low level.The output signal of the first AND gate circuit A1 and the output signal of the second AND gate circuit A2 are transferred to the third
AND gate circuit A3.When the output signal that the output signal of the first AND gate circuit A1 is high level and the second AND gate circuit A2 is
During high level, the third AND gate circuit A3 exports high level.The high level signal is transferred to the switch by resistance R6
Unit 20, the switch unit 20 is mos pipe switching circuits, and the mos pipes switching circuit high level is connected.Specifically, institute
The grid for stating mos pipes is connected through the 6th resistance with the output terminal of A3, the source electrode of mos pipes is connected through Rs with the cathode of battery pack,
The drain electrode of mos pipes is connected with the anode of battery pack.It is described when the signal that the mos pipes switching circuit receives is high level
Mos pipes switching circuit is connected, and entire circuit opens charge and discharge.When the first AND gate circuit A1 or the second AND gate circuit A2 are defeated
When going out low level, the third AND gate circuit A3 exports high level, and the mos pipes switching circuit is not turned on, and entire circuit stops
The overcurrent protection to entire circuit is realized in charge and discharge with this.
The utility model proposes a kind of current foldback circuits 100, are compared by the first operational amplifier U1, first
Device B1, the second comparator B2, the first AND gate circuit A1, the second AND gate circuit A2, third AND gate circuit A3 and switch unit 20 are complete
Into the acquisition of signal, over-current detection and overcurrent protection, circuit is simple, and cost is relatively low, and safety coefficient is high.Wherein described first operation
Amplifier U1 forms difference channel and carries out accurate acquisition to the electric current of major loop, and sampling error is small.Pass through the first comparator
B1, the second comparator B2, the first AND gate circuit A1, the second AND gate circuit A2 and the control of third AND gate circuit A3 output voltage signals
Switch unit 20 and then the charging and discharging state for controlling entire circuit, by the method for hardware realize quick overcurrent protection response compared with
For software overcurrent protection more quickly with reliably.
The utility model is not restricted to described in specification and embodiment, therefore for the personnel of familiar field
For other advantage and modification is easily implemented, therefore in the universal limited without departing substantially from claim and equivalency range
Spirit and scope in the case of, the utility model is not limited to specific details, representative equipment and shown here as with retouching
The diagram example stated.
Claims (6)
1. a kind of current foldback circuit, including battery pack, switch unit and current sampling resistor；The anode of the battery pack is successively
The cathode of the battery pack is connected after tandem tap unit, current sampling resistor；The current foldback circuit further includes signal and adopts
Sample unit, signal comparing unit and logic circuit unit；Two input terminals of the signal sampling unit respectively with the electricity
The both ends of stream sampling resistor are connected；The signal comparing unit is connected with the signal sampling unit output terminal, by the signal
The voltage value of sampling unit output is compared with preset reference voltage upper limit value, reference voltage lower limiting value, judges the electricity
Whether pressure value has exceeded preset reference voltage upper limit value or lower limiting value, and exports comparison result, realize to whether the inspection of overcurrent
It surveys；The input terminal of the logic circuit unit is connected respectively with two output terminals of the signal comparing unit, the logic electricity
The output terminal of road unit is connected with one end of the switch unit；The logic circuit unit is defeated to the signal comparing unit
Go out signal and pulse signal carries out logic judgment, output voltage signal simultaneously controls whether the switch unit is connected.
2. current foldback circuit as described in claim 1, it is characterised in that：The signal sampling unit include first resistor,
Second resistance, 3rd resistor, the 4th resistance, the 5th resistance and the first operational amplifier；Wherein described first resistor and the second electricity
One end of resistance is respectively as two input terminals of the signal sampling unit, and the 5th resistance is as the signal sampling unit
Output terminal；The other end of the first resistor connects the inverting input of first operational amplifier；The second resistance
The other end connect the first operational amplifier normal phase input end；One end of the 3rd resistor connects first operation amplifier
The inverting input of device, the other end connect the output terminal of first operational amplifier；4th resistance and the described first fortune
The normal phase input end for calculating amplifier is connected, and the other end is connected with the first bias voltage；One end of 5th resistance and described the
The output terminal of one operational amplifier is connected, and the other end is connected with the input terminal of the signal comparing unit.
3. current foldback circuit as claimed in claim 2, it is characterised in that：The signal comparing unit includes first comparator
With the second comparator；The normal phase input end of the first comparator is connected with the output terminal of the signal sampling unit, reverse phase
Input terminal is connected with the first reference voltage；The output terminal of the inverting input of second comparator and the signal sampling unit
It is connected, normal phase input end is connected with the second reference voltage；First reference voltage is a reference value of lower limit, if the voltage
Signal value is less than first reference voltage, then is considered as that lower limit overcurrent has occurred；Second reference voltage is the upper limit
A reference value is considered as that upper limit overcurrent has occurred if the voltage signal values are higher than the second reference voltage；If the voltage letter
Number value is higher than first reference voltage, then the first comparator output high level, on the contrary then export low level；If the electricity
Signal value is pressed less than second reference voltage, then the second comparator output high level, it is on the contrary then export low level.
4. current foldback circuit as claimed in claim 3, it is characterised in that：The logic circuit unit includes first and door electricity
Road, the second AND gate circuit and third AND gate circuit；The first end of first AND gate circuit and the output of the first comparator
End is connected, and the second end of first AND gate circuit is connected with pulse signal input terminal；The second AND gate circuit first end with
The output terminal of second comparator is connected, and the second end of second AND gate circuit is connected with the pulse signal input terminal；
The first end of the third AND gate circuit is connected with the output terminal of first AND gate circuit, and the second of the third AND gate circuit
End is connected with the output terminal of second AND gate circuit；The logic circuit unit further includes the 6th resistance, the 6th resistance
One end be connected with the output terminal of the third AND gate circuit, other end one end single with the switch is connected；When described first
Comparator output signal is the pulse signal of high level and input when being high level, and first AND gate circuit exports high level,
Otherwise output low level；When second comparator output signal be high level and input pulse signal be high level when, institute
The second AND gate circuit output high level is stated, otherwise exports low level；The output signal of first AND gate circuit and second and door
The output signal of circuit is transferred to the third AND gate circuit；When the output signal of first AND gate circuit is high level and the
When the output signal of two AND gate circuits is high level, the third AND gate circuit exports high level；When first AND gate circuit
Output signal or the output signal of the second AND gate circuit when being low level, the third AND gate circuit exports low level.
5. current foldback circuit as claimed in claim 4, it is characterised in that：The switch unit is mos pipe switching circuits, and
The mos pipes switching circuit high level conducting；The input terminal of the mos pipes switching circuit and the output of the logic circuit unit
End is connected, when the output signal of logic circuit unit that the mos pipes switching circuit receives is high level, the mos pipes
Switching circuit is connected, and entire circuit opens charge and discharge；When the logic circuit unit that the mos pipes switching circuit receives
When output signal is low level, the mos pipes switching circuit is not turned on, and entire circuit stops charge and discharge.
6. a kind of current foldback circuit as claimed in claim 5, it is characterised in that：The grid of the mos pipes is through the described 6th
Resistance is connected with the third with the output terminal of door, and the source electrode of the mos pipes is through the current sampling resistor and the battery pack
Cathode be connected, the drain electrode of the mos pipes is connected with the anode of the battery pack.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720894870.7U CN207518263U (en) | 2017-07-21 | 2017-07-21 | A kind of current foldback circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720894870.7U CN207518263U (en) | 2017-07-21 | 2017-07-21 | A kind of current foldback circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207518263U true CN207518263U (en) | 2018-06-19 |
Family
ID=62531965
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720894870.7U Expired - Fee Related CN207518263U (en) | 2017-07-21 | 2017-07-21 | A kind of current foldback circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207518263U (en) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108767810A (en) * | 2018-08-31 | 2018-11-06 | 重庆惠科金渝光电科技有限公司 | Current limiting circuit and current limiting device |
| CN108847652A (en) * | 2018-06-08 | 2018-11-20 | 苏州舜唐新能源电控设备有限公司 | Current foldback circuit and its control method, electronic equipment, storage medium |
| CN109672140A (en) * | 2018-12-21 | 2019-04-23 | 重庆国翰能源发展有限公司 | A kind of power supply protection device |
| CN110119117A (en) * | 2019-06-13 | 2019-08-13 | 河北爱其科技有限公司 | Motor circuit and unmanned plane including motor circuit |
| CN110515007A (en) * | 2019-08-13 | 2019-11-29 | 科华恒盛股份有限公司 | A kind of battery failures detection circuit and equipment |
| CN111463745A (en) * | 2020-04-14 | 2020-07-28 | 湖南三一智能控制设备有限公司 | Method and system for removing interference signals in overcurrent protection |
| US11018500B2 (en) | 2018-08-31 | 2021-05-25 | Chongqing Hkc Optoelectronics Technology Co., Ltd. | Current-limiting circuit, current-limiting device and display device |
| CN112986803A (en) * | 2021-03-15 | 2021-06-18 | 深圳慧能泰半导体科技有限公司 | Fault detection circuit and method, power adapter and electronic equipment |
| CN113746066A (en) * | 2020-05-29 | 2021-12-03 | 比亚迪股份有限公司 | Current converter overcurrent protection method and circuit and current converter controller |
| CN114123100A (en) * | 2020-09-01 | 2022-03-01 | 株洲中车时代电气股份有限公司 | Overcurrent protection logic control circuit and multiple overcurrent protection electromagnetic valve drive circuit |
-
2017
- 2017-07-21 CN CN201720894870.7U patent/CN207518263U/en not_active Expired - Fee Related
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108847652A (en) * | 2018-06-08 | 2018-11-20 | 苏州舜唐新能源电控设备有限公司 | Current foldback circuit and its control method, electronic equipment, storage medium |
| US11018500B2 (en) | 2018-08-31 | 2021-05-25 | Chongqing Hkc Optoelectronics Technology Co., Ltd. | Current-limiting circuit, current-limiting device and display device |
| CN108767810A (en) * | 2018-08-31 | 2018-11-06 | 重庆惠科金渝光电科技有限公司 | Current limiting circuit and current limiting device |
| CN109672140A (en) * | 2018-12-21 | 2019-04-23 | 重庆国翰能源发展有限公司 | A kind of power supply protection device |
| CN110119117A (en) * | 2019-06-13 | 2019-08-13 | 河北爱其科技有限公司 | Motor circuit and unmanned plane including motor circuit |
| CN110515007A (en) * | 2019-08-13 | 2019-11-29 | 科华恒盛股份有限公司 | A kind of battery failures detection circuit and equipment |
| CN111463745A (en) * | 2020-04-14 | 2020-07-28 | 湖南三一智能控制设备有限公司 | Method and system for removing interference signals in overcurrent protection |
| CN111463745B (en) * | 2020-04-14 | 2022-03-18 | 湖南三一智能控制设备有限公司 | Method and system for removing interference signals in overcurrent protection |
| CN113746066A (en) * | 2020-05-29 | 2021-12-03 | 比亚迪股份有限公司 | Current converter overcurrent protection method and circuit and current converter controller |
| CN113746066B (en) * | 2020-05-29 | 2022-12-09 | 比亚迪股份有限公司 | Current converter overcurrent protection method and circuit and current converter controller |
| CN114123100A (en) * | 2020-09-01 | 2022-03-01 | 株洲中车时代电气股份有限公司 | Overcurrent protection logic control circuit and multiple overcurrent protection electromagnetic valve drive circuit |
| CN114123100B (en) * | 2020-09-01 | 2022-10-11 | 株洲中车时代电气股份有限公司 | Overcurrent protection logic control circuit and multiple overcurrent protection electromagnetic valve drive circuit |
| CN112986803A (en) * | 2021-03-15 | 2021-06-18 | 深圳慧能泰半导体科技有限公司 | Fault detection circuit and method, power adapter and electronic equipment |
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Effective date of registration: 20191015 Address after: 518000 Shenyu Science and Technology Park, No. 68 Lanjingbei Road, Laokeng Community, Longtian Street, Pingshan District, Shenzhen City, Guangdong Province, 101 Patentee after: Shenzhen Anding New Energy Technology Development Co., Ltd. Address before: 518000 Guangdong Province, Shenzhen City Pingshan Pingshan community Zhu Keng Industrial Zone 9 1-3 Patentee before: Shenzhen Optimum Battery Co., Ltd. |
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Granted publication date: 20180619 Termination date: 20200721 |