CN107092297A - Second order compensation band-gap reference circuit for signal amplifier - Google Patents
Second order compensation band-gap reference circuit for signal amplifier Download PDFInfo
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- CN107092297A CN107092297A CN201710443246.XA CN201710443246A CN107092297A CN 107092297 A CN107092297 A CN 107092297A CN 201710443246 A CN201710443246 A CN 201710443246A CN 107092297 A CN107092297 A CN 107092297A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/561—Voltage to current converters
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Abstract
The invention discloses the second order compensation band-gap reference circuit for signal amplifier, including PMOS current mirrors, VBG generation modules, positive temperature coefficient voltage difference generation module, and with NPN triode input to amplifier, wherein, positive temperature coefficient voltage difference generation module includes two NPN triode series arms, VBG generation modules and two NPN triode series arms are connected with PMOS current mirrors, two inputs of amplifier are connected on the circuit between two NPN triode series arms and PMOS current mirrors correspondingly, amplifier is provided with the NMOS current mirrors powered for its interior NPN triode emitter stage mirror image, two inputs of amplifier are NPN triode base stage composition in amplifier.Accurate voltage and current can be provided during present invention application, and the constant gain of total temperature scope can be realized.
Description
Technical field
The present invention relates to band-gap reference circuit, the second order compensation band-gap reference circuit of signal amplifier is particularly used for.
Background technology
Signal amplifier is widely used in communicating, broadcasted, radar, TV, the field such as automatically control, during it is signal transacting
Critical component, effect is to amplify signal, so that rear end is used.High-precision signal amplifier is, it is necessary to accurately faint
Linearly amplification, it is therefore desirable to accurate voltage and current is provided.Lacked of proper care at random introducing to reduce amplifier in closed loop
Error, the input of amplifier is to usually using NPN triode, NPN triode is inputted to there is smaller mistake compared to metal-oxide-semiconductor
Adjust, the current gain of NPN triode declines under low temperature, the electric current that VBG paths flow through under low temperature is increased at low temperature,
Second order compensation effect is produced, -40 degree are obtained to 150 degree of more accurately magnitudes of voltage.However, the input of signal amplifier is to using
After NPN triodes, being declined by NPN triode current gain under low temperature is influenceed, and signal amplifier can be caused to realize entirely
The constant gain of temperature range, this have impact on popularization of the input to the signal amplifier using NPN triode to a certain extent should
With.
The content of the invention
It is an object of the invention to solve input to realize total temperature scope to the signal amplifier using NPN triode
The problem of constant-gain, it can be provided when applying there is provided a kind of second order compensation band-gap reference circuit for signal amplifier
Accurate voltage and current, and the constant gain of total temperature scope can be realized.
The purpose of the present invention is achieved through the following technical solutions：Second order compensation band-gap reference for signal amplifier
Circuit, including PMOS current mirrors, VBG generation modules, positive temperature coefficient voltage difference generation module and defeated with NPN triode
Enter to amplifier, the positive temperature coefficient voltage difference generation module includes two NPN triode series arms, the VBG lifes
It is connected into module and two NPN triode series arms with PMOS current mirrors, a pair of two inputs one of the amplifier
On the circuit being connected between two NPN triode series arms and PMOS current mirrors answered, it is its interior NPN that amplifier, which is provided with,
The NMOS current mirrors that transistor emitter mirror image is powered, two inputs of amplifier are NPN triode base stage structure in amplifier
Into；
Positive temperature coefficient voltage difference generation module, for exporting PTAT current；
PMOS current mirrors, for PTAT current and the electric current that the electric current of the input of amplifier two is superimposed to be supplied into NMOS electricity
Flow mirror and VBG generation modules；
NMOS current mirrors, the electric current for receiving the offer of PMOS current mirrors, and be NPN triode emitter stage in amplifier
Mirror image is powered；
VBG generation modules, the electric current for receiving the offer of PMOS current mirrors, the temperature independent voltage for generating.This
Inventing described PTAT current (proportional to absolute temperature) is and PTAT
Electric current.The present invention at low temperature, the current gain of NPN triode diminishes in amplifier, thus input to extraction base stage electricity
Rheology is big, flow into the electric current of PMOS current mirrors for standard PTAT current and triode input to base current be added, after addition
PTAT current of the electric current at low temperature than standard it is big, this electric current is mirrored to VBG generation modules by PMOS current mirrors, and VBG is adjusted
It is made into a temperature independent voltage.The specific emitter terminal to NPN pipes is supplied when input of the invention to amplifier is to power supply
Electricity, base terminal can flow into some electric currents, and this caused result is that the electric current of collector terminal will be more smaller, therefore the present invention
Compensate for that, it is therefore an objective to allow collector terminal electric current be standard PTAT current.
Further, the PMOS current mirrors include the first PMOS, the second PMOS, the 3rd PMOS, the 4th PMOS
Pipe, the 5th PMOS and the 6th PMOS, first PMOS, the second PMOS, the 3rd PMOS pipes, the 4th PMOS, the
The grid of five PMOSs and the 6th PMOS is connected with the output end of amplifier, and six source electrode is all connected with power supply, institute
State two NPN triode series arms of positive temperature coefficient voltage difference generation module respectively with the drain electrode of the first PMOS, second
PMOS drain electrode connection, the NMOS current mirrors connection in the drain electrode and amplifier of the 3rd PMOS, the drain electrode of the 4th PMOS is hanged
Sky, the drain electrode of the 5th PMOS is connected with VBG generation modules, and the drain electrode of the 6th PMOS pipes is used to export PTAT current and amplification
The electric current of the electric current superposition of the input of device two.
Further, two articles of NPN triode series arms of the positive temperature coefficient voltage difference generation module are respectively
One NPN triodes series arm and the second NPN triode series arm, the first NPN triode series arm include first
NPN triodes and the second NPN triode, the base stage of both first NPN triode and the second NPN triode is and current collection
Pole is connected, and the first NPN triode emitter stage is connected with the colelctor electrode of the second NPN triode, the emitter stage of the second NPN triode
Ground connection, the first NPN triode colelctor electrode and PMOS current mirrors, the inverting input of the amplifier are connected to PMOS electricity
Flow on the circuit between mirror and the first NPN triode colelctor electrode；
The second NPN triode series arm includes the 3rd NPN triode, the 4th NPN triode and first resistor, institute
The base stage for stating both the 3rd NPN triode and the 4th NPN triode is connected with colelctor electrode, the 3rd NPN triode emitter stage with
The colelctor electrode connection of 4th NPN triode, the grounded emitter of the 4th NPN triode, described first resistor one end and the 3rd
NPN triode colelctor electrode is connected, and the first resistor other end is connected with PMOS current mirrors, and the in-phase input end of the amplifier connects
It is connected on the circuit between PMOS current mirrors and first resistor.First NPN triode, the second NPN triode, in the present invention
The base stage of three NPN triodes and the 4th NPN triode with colelctor electrode short circuit, it is only necessary to base stage is to the positive guide of emitter stage
Be powered pressure, therefore used as diode in fact.
Further, the emitter area of NPN triode and the 2nd NPN tri- in the first NPN triode series arm
The ratio of the emitter area of NPN triode is 1 in pole pipe series arm：8.The positive temperature coefficient voltage difference generation of the present invention
The 1 of two-stage series connection in module:The triode of 8 ratios, can generate the 1 of twice single-stage：The PTAT voltage of 8 ratios is poor, can carry
The precision of high circuit, reduces the influence lacked of proper care at random.
Further, the VBG generation modules include the 5th NPN triode and second resistance, the 5th NPN triode
Base stage be connected with its colelctor electrode, its grounded emitter, second resistance one end is connected with the 5th NPN triode colelctor electrode, and its is another
One end is connected with PMOS current mirrors.When the present invention is applied, circuit outputs of the VBG between second resistance and PMOS current mirrors.
Further, the second order compensation band-gap reference circuit for signal amplifier, in addition to start-up circuit, the startup
Circuit is connected with PMOS current mirrors, is risen to for supply voltage after operating voltage, and a drop-down is provided for PMOS current mirrors
Electric current, promotes each path generation current path in PMOS current mirrors.
Further, the start-up circuit includes the 7th NMOS tube (MN7), the 15th PMOS (MP15) and the 16th
PMOS (MP16), the 7th NMOS tube (MN7) grid, the 15th PMOS (MP15) source electrode and the 16th PMOS
(MP16) source electrode is all connected with power supply (VDD), and the 7th NMOS tube (MN7) source electrode, the drain electrode of the 16th PMOS (MP16) are grounded,
7th NMOS tube (MN7) drains to be connected with the drain electrode of the 15th PMOS (MP15), the 15th PMOS (MP15) grid and amplification
The output end connection of device (A1), the 16th PMOS (MP16) grid is connected to the 7th NMOS tube (MN7) drain electrode and the 15th
On circuit between PMOS (MP15) drain electrode.
In summary, the invention has the advantages that：(1) present invention makes output by introducing second order compensation effect
Voltage shows good temperature characterisitic under low temperature, and increases second order compensation electric current on the basis of standard PTAT current with reality
Existing signal amplifier gain is not varied with temperature, and realizes the constant gain of total temperature scope.
(2) present invention can realize accurately bandgap voltage reference and electric current.Wherein, voltage is to need temperature independent band
2 ranks compensate constant voltage；Electric current needs to compensate under standard PTAT current so that the input of the triode of amplifier to collection
Electrode current is standard PTAT current.
Brief description of the drawings
Accompanying drawing described herein is used for providing further understanding the embodiment of the present invention, constitutes one of the application
Point, do not constitute the restriction to the embodiment of the present invention.In the accompanying drawings：
Fig. 1 is schematic structural view of the invention；
Fig. 2 is the structural representation of hall signal amplifiers.
Embodiment
For the object, technical solutions and advantages of the present invention are more clearly understood, with reference to embodiment and accompanying drawing, to this
Invention is described in further detail, and exemplary embodiment and its explanation of the invention is only used for explaining the present invention, does not make
For limitation of the invention.
Embodiment
As shown in figure 1, the second order compensation band-gap reference circuit for signal amplifier, including PMOS current mirrors, VBG generation
Module, start-up circuit, positive temperature coefficient voltage difference generation module and with NPN triode input to amplifier A1, its
In, positive temperature coefficient voltage difference generation module includes two NPN triode series arms, VBG generation modules, start-up circuit, with
And two NPN triode series arms are connected with PMOS current mirrors.The amplifier A1 of the present embodiment two inputs are one by one
On the corresponding circuit being connected between two NPN triode series arms and PMOS current mirrors, amplifier A1 is provided with as in it
The NMOS current mirrors that NPN triode emitter stage mirror image is powered, amplifier A1 two inputs are the poles of NPN tri- in amplifier A1
Pipe base stage is constituted.The positive temperature coefficient voltage difference generation module of the present embodiment, for exporting PTAT current；PMOS current mirrors, are used
In PTAT current is supplied into NMOS current mirrors and VBG generation modules with the electric current that the electric current of the inputs of amplifier A1 two is superimposed；
NMOS current mirrors, the electric current for receiving the offer of PMOS current mirrors, and supplied for NPN triode emitter stage mirror image in amplifier A1
Electricity；VBG generation modules, the electric current for receiving the offer of PMOS current mirrors, the temperature independent voltage for generating；Start electricity
Road, rises to after operating voltage for supply voltage, provides a pull-down current for PMOS current mirrors, promotes PMOS electric currents
Each path generation current path in mirror.
The PMOS current mirrors of the present embodiment include the first PMOS MP1, the second PMOS MP2, the 3rd PMOS MP3, the
Four PMOS MP4, the 5th PMOS MP5 and the 6th PMOS MP6, wherein, the first PMOS pipes MP1, the second PMOS MP2,
Three PMOS MP3, the 4th PMOS MP4, the 5th PMOS MP5 and the 6th PMOS MP6 grid with amplifier A1
Output end connection, six source electrode is all connected with power vd D, two NPN triodes of positive temperature coefficient voltage difference generation module
Series arm respectively with the first PMOS MP1 drain electrode, the second PMOS MP2 drain electrode be connected, the 3rd PMOS MP3 drain electrode and
NMOS current mirrors connection in amplifier A1, the 4th PMOS MP4 drain electrode is hanging, the 5th PMOS MP5 drain electrode and VBG
Generation module is connected, and the 6th PMOS pipes MP6 drain electrode is superimposed for exporting PTAT current with the electric current of the inputs of amplifier A1 two
Electric current.
Two NPN triode series arms of the positive temperature coefficient voltage difference generation module of the present embodiment are respectively first
NPN triode series arm and the second NPN triode series arm, wherein, the first NPN triode series arm includes first
NPN triodes Q1 and the second NPN triode Q2, the base stage of both the first NPN triode Q1 and the second NPN triode Q2 with
Colelctor electrode is connected, and the first NPN triode Q1 emitter stage is connected with the second NPN triode Q2 colelctor electrode, the second NPN triode
Q2 grounded emitter.The first NPN triode Q1 colelctor electrode of the present embodiment and PMOS current mirrors, amplifier A1's is anti-phase defeated
Enter end to be connected on the circuit between PMOS current mirrors and the first NPN triode Q1 colelctor electrode.First NPN tri- of the present embodiment
Pole pipe series arm and the specific attachment structure of PMOS current mirrors are：First PMOS MP1 drain electrode is by being connected to first
It is connected on NPN triode Q1 colelctor electrode with the first NPN triode series arm.
The second NPN triode series arm of the present embodiment include the 3rd NPN triode Q3, the 4th NPN triode Q4 and
First resistor R1, wherein, both the 3rd NPN triode Q3 and the 4th NPN triode Q4 base stage are connected with colelctor electrode, the
Three NPN triode Q3 emitter stages are connected with the 4th NPN triode Q4 colelctor electrode, and the 4th NPN triode Q4 emitter stage connects
Ground, first resistor R1 one end is connected with the 3rd NPN triode Q3 colelctor electrodes, and the first resistor R1 other ends connect with PMOS current mirrors
Connect, amplifier A1 in-phase input end is connected on the circuit between PMOS current mirrors and first resistor R1.The of the present embodiment
Two NPN triode series arms and the specific attachment structure of PMOS current mirrors are：Second PMOS MP1 drain electrode is by being connected to
The other end at the 3rd NPN triode Q3 ends of the relative connections of first resistor R1 is connected with the second NPN triode series arm.This reality
Example is applied in specific set, the emitter area and the second NPN triode of NPN triode in the first NPN triode series arm
The ratio of the emitter area of NPN triode is 1 in series arm：8.
The VBG generation modules of the present embodiment include the 5th NPN triode Q5 and second resistance R2, wherein, the 5th NPN tri-
Pole pipe Q5 base stage is connected with its colelctor electrode, its grounded emitter, second resistance R2 one end and the 5th NPN triode Q5 current collections
Pole is connected, and its other end is connected with PMOS current mirrors, one end of second resistance R2 connection PMOS current mirrors specifically with the 5th PMOS
Pipe MP5 drain electrode connections.The present invention is after PTAT current flows into VBG generation modules, and second resistance R2 two ends are PATA voltages, the
Five NPN triode Q5 both end voltages are NTAT voltages, wherein, PATA voltages are the voltage for raising and increasing with temperature, NTAT electricity
The voltage to raise and reducing with temperature is pressed, both are added by a certain percentage, are made into just temperature-independent electricity
Pressure, as bandgap voltage reference.
As shown in Fig. 2 the amplifier A1 of the present embodiment is hall signal amplifiers, it is used to enter faint hall signals
Row amplification, wherein, Hall signals refer to the voltage signal of the uV ranks produced according to hall principle, electric current by conductor.Amplification
Device A1 includes the 6th NPN triode Q6, the 7th NPN triode Q7, the first NMOS tube MN1, the 2nd NMOS pipes MN2, the 3rd NMOS
Pipe MN3, the 4th NMOS tube MN4, the 5th NMOS tube MN5, the 6th NMOS tube MN6, the 7th PMOS MP7, the 8th PMOS MP8,
9th PMOS MP9, the tenth PMOS MP10, the 11st PMOS MP11, the 12nd PMOS MP12, the 13rd PMOS
MP13 and the 14th PMOS MP14, wherein, the first NMOS tube MN1, the second NMOS tube MN2, the 3rd NMOS tube MN3 and the 4th
NMOS pipes MN4 source grounding, the first NMOS tube MN1 grid is connected with the second NMOS tube MN2 grid, and first
NMOS tube MN1 drain electrode is connected with the 3rd PMOS M93 drain electrode, the electric current for receiving the output of PMOS current mirrors.This implementation
The 6th NPN triode Q6 base stage is used as amplifier A1 in-phase input end, the 7th NPN triode Q7 base stage conduct in example
Amplifier A1 inverting input, the 6th NPN triode Q6 emitter stage is connected with the 7th NPN triode Q7 emitter stage, the
Two NMOS tube MN2 drain electrode is connected between the 6th NPN triode Q6 emitter stage and the 7th NPN triode Q7 emitter stage
Circuit on.The first NMOS tube MN1 and the 2nd NMOS pipes MN2 of the present embodiment constitute amplifier A1 NMOS current mirrors, the 6th
NPN triode Q6 and the 7th NPN triode Q7 constitutes amplifier A1 NPN triode input pair.6th NPN triode Q6's
Colelctor electrode is connected with the 11st PMOS MP11 drain electrode, the 7th NPN triode Q7 colelctor electrode and the 12nd PMOS MP12
Drain electrode connection, the 11st PMOS MP11 grid is connected with the 12nd PMOS MP12 grid.7th PMOS MP7,
8th PMOS pipes MP8, the 9th PMOS MP9 and the tenth PMOS MP10 source electrode are all connected with power vd D, the 7th PMOS
Pipe MP7 grid is connected on the circuit between the 6th NPN triode Q6 colelctor electrodes and the 11st PMOS MP11 drain electrodes, the
Seven PMOS MP7 drain electrode is connected with the 11st PMOS MP11 source electrode.8th PMOS MP8 grid is connected to the 7th
On circuit between NPN triode Q7 colelctor electrodes and the 12nd PMOS MP12 drain electrodes, the 8th PMOS MP8 drain electrode and the tenth
Two PMOS MP12 source electrode connection.3rd NMOS tube MN3 grid is connected with the 4th NMOS tube MN4 grid, the 5th NMOS
Pipe MN5 grid is connected with the 6th NMOS tube MN6 grid, the leakage of the 5th NMOS tube MN5 source electrode and the 3rd NMOS tube MN3
Pole is connected, and the 6th NMOS tube MN6 source electrode is connected with the 4th NMOS tube MN4 drain electrode.13rd PMOS MP13 drain electrode with
5th NMOS tube MN5 drain electrode connection, the 13rd PMOS MP13 source electrode is connected with the 9th PMOS MP9 drain electrode, and the tenth
Three PMOS pipes MP13 grid is connected to the circuit between the 11st PMOS MP11 grids and the 12nd PMOS MP12 grids
On, the 9th PMOS MP9 grids connect the line between the 7th NPN triode Q7 colelctor electrodes and the 12nd PMOS MP12 drain electrodes
Lu Shang.14th PMOS MP14 drain electrode is connected with the 6th NMOS tube MN6 drain electrode, and amplifier A1 output end is arranged on
On the circuit that 14th PMOS MP14 drains between the 6th NMOS tube MN6 drain electrodes.14th PMOS MP14 source electrode with
Tenth PMOS MP10 drain electrode connection, the 14th PMOS MP14 grid be connected to the 11st PMOS MP11 grids with
On circuit between 12nd PMOS MP12 grids, the tenth PMOS pipe MP10 grids are connected to the 6th NPN triode Q6 current collections
On circuit between pole and the 11st PMOS MP11 drain electrodes.The amplifier A1 of the present embodiment is under closed loop states, two inputs
End is same voltage, and this is the output by amplifier A1 to adjust.
In specific application, after supply voltage VDD rises to operating voltage, start-up circuit is to PMOS electricity for the present embodiment
The grid for flowing the PMOS in mirror provides a pull-down current, promotes each path generation current path, and amplifier A1 starts work
Make and make two input terminal voltages consistent by closed loop feedback, circuit enters after normal operating conditions, start-up circuit shut-off, no
Influence loop work.
The start-up circuit of the present embodiment includes the 7th NMOS tube MN7, the 15th PMOS MP15 and the 16th PMOS is managed
MP16, wherein, the 7th NMOS tube MN7 grids, the 15th PMOS MP15 source electrodes and the 16th PMOS MP16 source electrodes are all connected with
Power vd D, the 7th NMOS tube MN7 source electrodes, the 16th PMOS MP16 drain electrodes are grounded, the 7th NMOS tube MN7 drain electrodes and the tenth
Five PMOS MP15 drain electrode connections, the 15th PMOS MP15 grids are connected with amplifier A1 output end, the 16th PMOS
MP16 grids are connected on the circuit between the 7th NMOS tube MN7 drain electrodes and the 15th PMOS MP15 drain electrodes.The present embodiment
7th NMOS tube MN7 grid meets power vd D, is constantly in conducting state, and M/L very littles, about 0.6um/50um, can
To be considered a very big coarse resistance, after electricity on VDD, loop is not set up, therefore the 15th PMOS MP15
There is no electric current to pass through, while the 15th PMOS MP15 grid voltage is also VDD, now the 16th PMOS MP16 grid
Pole pulls down to GND by the 7th NMOS tube MN7, the 7th NMOS tube MN7 conductings, the grid of the PMOS in PMOS current mirrors and
15th PMOS MP15 grids are pulled down, and are produced starting current, are made amplifier A1 two input terminal voltages consistent.
When the present embodiment is applied, the first NPN triode series arm generation standard PTAT current I1, the second NPN triode
Series arm generates standard PTAT current I2, and the base current of amplifier A1 in-phase input end is I5, and amplifier A1's is anti-phase
The base current of input is I6, and the first PMOS MP1 drain electrode output currents I3 is I1 and I6 sums, the 2nd PMOS pipes MP2 leakages
Pole output current I4 is I2 and I5 sums.There is provided in amplifier A1 by the PMOS current mirrors mirror image output ib1 of the present embodiment
Prime amplifier, the input pipe of prime amplifier is managed for NPN, and this electric current ib1 is powered by NMOS current mirror mirror images, equal to NPN inputs
The emitter current of pipe, the base current of now prime amplifier input NPN triode is exactly equal to increased band-gap reference input
To the base current of generation, collector current is exactly the PTAT current of standard, therefore obtained mutual conductance is not vary with temperature
Constant.
The present embodiment does input pair using NPN triode as prime amplifier, when the present embodiment is applied by with
Put and input to electric current, allow the input of prime amplifier to be standard PTAT current to pipe collector electric current；By according to 2 grades of series connection
Triode structure increase PTAT voltage, reduce random voltages mismatch；By configuring the resistance of VBG generation modules, and amplification
The base current of device A1 input NPN triode, realizes 2 rank bandgap voltage references of 0 temperature coefficient.
Above-described embodiment, has been carried out further to the purpose of the present invention, technical scheme and beneficial effect
Describe in detail, should be understood that the embodiment that the foregoing is only the present invention, be not used to limit this hair
Bright protection domain, within the spirit and principles of the invention, any modification, equivalent substitution and improvements done etc. all should
Within protection scope of the present invention.
Claims (7)
1. the second order compensation band-gap reference circuit for signal amplifier, it is characterised in that generated including PMOS current mirrors, VBG
Module, positive temperature coefficient voltage difference generation module and with NPN triode input to amplifier (A1), the positive temperature
Coefficient voltages difference generation module includes two NPN triode series arms, the VBG generation modules and two NPN triode strings
Connection branch road is connected with PMOS current mirrors, and two inputs of the amplifier (A1) are connected to two NPN tri- correspondingly
On circuit between pole pipe series arm and PMOS current mirrors, it is its interior NPN triode emitter stage mirror image that amplifier (A1), which is provided with,
The NMOS current mirrors of power supply, two inputs of amplifier (A1) are NPN triode base stage composition in amplifier (A1)；
Positive temperature coefficient voltage difference generation module, for exporting PTAT current；
PMOS current mirrors, for PTAT current and the electric current that the electric current of the input of amplifier (A1) two is superimposed to be supplied into NMOS electricity
Flow mirror and VBG generation modules；
NMOS current mirrors, the electric current for receiving the offer of PMOS current mirrors, and be NPN triode emitter stage mirror in amplifier (A1)
As power supply；
VBG generation modules, the electric current for receiving the offer of PMOS current mirrors, the temperature independent voltage for generating.
2. the second order compensation band-gap reference circuit according to claim 1 for signal amplifier, it is characterised in that described
PMOS current mirrors include the first PMOS (MP1), the second PMOS (MP2), the 3rd PMOS (MP3), the 4th PMOS
(MP4), the 5th PMOS (MP5) and the 6th PMOS (MP6), first PMOS (MP1), the second PMOS (MP2),
Three PMOSs (MP3), the 4th PMOS (MP4), the 5th PMOS (MP5) and the 6th PMOS (MP6) six grid with
The output end connection of amplifier (A1), six source electrode is all connected with power supply (VDD), the positive temperature coefficient voltage difference generation module
Two NPN triode series arms respectively with the first PMOS (MP1) drain electrode, the second PMOS (MP2) drain electrode be connected, the 3rd
The drain electrode of PMOS (MP3) is connected with the NMOS current mirrors in amplifier (A1), and the drain electrode of the 4th PMOS (MP4) is hanging, the
The drain electrode of five PMOSs (MP5) is connected with VBG generation modules, the drain electrode of the 6th PMOS (MP6) be used to exporting PTAT current with
The electric current of the electric current superposition of the input of amplifier (A1) two.
3. the second order compensation band-gap reference circuit according to claim 1 for signal amplifier, it is characterised in that described
Two NPN triode series arms of positive temperature coefficient voltage difference generation module be respectively the first NPN triode series arm and
Second NPN triode series arm, the first NPN triode series arm includes the first NPN triode (Q1) and the 2nd NPN
Triode (Q2), the base stage of both first NPN triode (Q1) and the second NPN triode (Q2) is connected with colelctor electrode,
First NPN triode (Q1) emitter stage is connected with the colelctor electrode of the second NPN triode (Q2), the hair of the second NPN triode (Q2)
Emitter grounding, the first NPN triode (Q1) colelctor electrode and PMOS current mirrors, the inverting input of the amplifier (A1) connect
It is connected on the circuit between PMOS current mirrors and the first NPN triode (Q1) colelctor electrode；
The second NPN triode series arm includes the 3rd NPN triode (Q3), the 4th NPN triode (Q4) and the first electricity
Hinder (R1), the base stage of both the 3rd NPN triode (Q3) and the 4th NPN triode (Q4) is connected with colelctor electrode, the 3rd
NPN triode (Q3) emitter stage is connected with the colelctor electrode of the 4th NPN triode (Q4), the emitter stage of the 4th NPN triode (Q4)
Ground connection, described first resistor (R1) one end is connected with the 3rd NPN triode (Q3) colelctor electrode, first resistor (R1) other end and
PMOS current mirrors are connected, and the in-phase input end of the amplifier (A1) is connected between PMOS current mirrors and first resistor (R1)
On circuit.
4. the second order compensation band-gap reference circuit according to claim 1 for signal amplifier, it is characterised in that described
The emitter area of NPN triode and the poles of NPN tri- in the second NPN triode series arm in first NPN triode series arm
The ratio of the emitter area of pipe is 1：8.
5. the second order compensation band-gap reference circuit according to claim 1 for signal amplifier, it is characterised in that described
VBG generation modules include the 5th NPN triode (Q5) and second resistance (R2), the base stage of the 5th NPN triode (Q5) and
Its colelctor electrode is connected, and its grounded emitter, second resistance (R2) one end is connected with the 5th NPN triode (Q5) colelctor electrode, and its is another
One end is connected with PMOS current mirrors.
6. the second order compensation band-gap reference circuit for signal amplifier according to any one in Claims 1 to 5, its
It is characterised by, in addition to start-up circuit, the start-up circuit is connected with PMOS current mirrors, work electricity is risen to for supply voltage
After pressure, a pull-down current is provided for PMOS current mirrors, promotes each path generation current path in PMOS current mirrors.
7. the second order compensation band-gap reference circuit according to claim 6 for signal amplifier, it is characterised in that described
Start-up circuit includes the 7th NMOS tube (MN7), the 15th PMOS (MP15) and the 16th PMOS (MP16), the described 7th
NMOS tube (MN7) grid, the 15th PMOS (MP15) source electrode and the 16th PMOS (MP16) source electrode are all connected with power supply
(VDD), the 7th NMOS tube (MN7) source electrode, the 16th PMOS (MP16) drain electrode be grounded, the 7th NMOS tube (MN7) drain electrode with
15th PMOS (MP15) drain electrode connection, the 15th PMOS (MP15) grid is connected with the output end of amplifier (A1), the
16 PMOSs (MP16) grid is connected to the line between the drain electrode of the 7th NMOS tube (MN7) and the drain electrode of the 15th PMOS (MP15)
Lu Shang.
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| CN110187166A (en) * | 2019-06-26 | 2019-08-30 | 成都芯进电子有限公司 | A kind of current sensor temperature-compensation circuit to float for low temperature |
| CN112506262A (en) * | 2020-12-29 | 2021-03-16 | 上海华力微电子有限公司 | High-utilization-rate band-gap reference circuit |
| US10958227B2 (en) | 2019-05-07 | 2021-03-23 | Analog Devices, Inc. | Amplifier nonlinear offset drift correction |
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| CN110187166A (en) * | 2019-06-26 | 2019-08-30 | 成都芯进电子有限公司 | A kind of current sensor temperature-compensation circuit to float for low temperature |
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| CN107092297B (en) | 2019-04-16 |
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