CN107086803A - A kind of capacitor voltage balance control strategy of modularization multi-level converter - Google Patents

A kind of capacitor voltage balance control strategy of modularization multi-level converter Download PDF

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Publication number
CN107086803A
CN107086803A CN201710464858.7A CN201710464858A CN107086803A CN 107086803 A CN107086803 A CN 107086803A CN 201710464858 A CN201710464858 A CN 201710464858A CN 107086803 A CN107086803 A CN 107086803A
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submodule
bridge arm
mrow
voltage
labeled
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CN107086803B (en
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陆翌
李继红
裘鹏
徐政
徐雨哲
肖晃庆
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State Grid Corp of China SGCC
State Grid Zhejiang Electric Power Co Ltd
Electric Power Research Institute of State Grid Zhejiang Electric Power Co Ltd
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State Grid Corp of China SGCC
State Grid Zhejiang Electric Power Co Ltd
Electric Power Research Institute of State Grid Zhejiang Electric Power Co Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • H02M7/4835Converters with outputs that each can have more than two voltages levels comprising two or more cells, each including a switchable capacitor, the capacitors having a nominal charge voltage which corresponds to a given fraction of the input voltage, and the capacitors being selectively connected in series to determine the instantaneous output voltage
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • H02M7/49Combination of the output voltage waveforms of a plurality of converters

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The invention discloses a kind of capacitor voltage balance control strategy of modularization multi-level converter, it is different from conventional measures, the present invention considers the current switching state of submodule and capacitance voltage when putting into submodule, and the higher submodule of relative importance value will be put into labeled as 1, cut off the higher submodule of relative importance value and be labeled as 0, then the submodule of two kinds of marks is ranked up and switching operation respectively, under the premise of ensureing that voltage fluctuation of capacitor is less, reduce the switching frequency of submodule, and reduce the capacitance voltage sequence shared time, transverter can be made under relatively low submodule switching frequency, complete submodule capacitor voltage balance control.

Description

A kind of capacitor voltage balance control strategy of modularization multi-level converter
Technical field
The invention belongs to power electronic system technical field, and in particular to a kind of electric capacity electricity of modularization multi-level converter Flatten weighing apparatus control strategy.
Background technology
With flourishing for Power Electronic Technique, based on modularization multi-level converter (modular multilevel Converter, MMC) D.C. high voltage transmission (high voltage direct current, HVDC) technology be considered as most It is appropriate for one of technology of mesohigh transmission of electricity.Compared with other voltage source converter topologys, modularization multi-level converter With significant advantage;Due to the form using basic operation sub-module cascade, the topology avoids a large amount of switching devices and directly gone here and there Connection, the problems such as in the absence of consistent triggering, reduces the manufacture difficulty of equipment;The topology also possess simultaneously relatively low switching frequency and Transverter is lost, with very strong economy, therefore the topology is applied to rapidly new-energy grid-connected, offshore wind farm and sent in recent years The occasion such as go out.
The emphasis paid close attention in the submodule capacitor voltage balance control always Practical Project of transverter, typical three-phase The system architectures of MMC transverters as shown in figure 1, transverter is altogether comprising 6 bridge arms, wherein per bridge arm comprising N number of submodule with And a bridge arm reactance.Bridge arm current positive direction is made as shown in figure 1, when bridge arm current is the just submodule electric capacity of input state It is electrically charged, when bridge arm current is negative, the submodule of input state is discharged.Each submodule electric capacity is independent mutually, and submodule It is unbalanced that the difference of discharge and recharge time and electric capacity will occur its capacitance voltage, the overall normal operation of influence transverter.
Traditional capacitor voltage balance control strategy is:First detect the capacitance voltage of bridge arm current direction and each submodule And be ranked up;If bridge arm current charges to sub- module capacitance, correspondence is put into according to the order of capacitance voltage from low to high The submodule of quantity;If bridge arm current is discharged sub- module capacitance, phase is put into according to the order of capacitance voltage from high to low The submodule answered.The problem of this method, is the original state for not accounting for submodule, greatly increases in running Submodule switching frequency, this is by the switching frequency for causing power electronic devices and the rising of switching loss, so as to reduce module Change the operational efficiency of multilevel converter.In addition, when voltage class rises, bridge arm submodule quantity can be greatly increased, So that all submodules, which are ranked up, can take the more time, larger delay is introduced in triggering control.
The content of the invention
In view of above-mentioned, the invention provides a kind of capacitor voltage balance control strategy of modularization multi-level converter, energy Under the premise of ensureing that voltage fluctuation of capacitor is less, the switching frequency of submodule is reduced, and it is shared to reduce capacitance voltage sequence Time.
A kind of capacitor voltage balance control strategy of modularization multi-level converter, comprises the following steps:
(1) for any bridge arm of transverter, the submodule in input state in current bridge arm is labeled as 1, is in The submodule of excision state is labeled as 0;
(2) wave component of each submodule capacitor voltage in bridge arm is calculated, and then tries to achieve the capacitance voltage of whole bridge arm Stability bandwidth ε;
(3) voltage fluctuation of capacitor rate ε and stability bandwidth threshold epsilon are comparedmSize:If ε >=εm, then into step (4);If ε < εm, then step (5) is jumped directly to;
(4) upper lower limit value of determination sub-module capacitance voltage, makes the bridge arm current be from the direction that high-pressure side flows to low-pressure end Just, on the contrary is negative;And then according to bridge arm current direction and the submodule capacitor voltage relation interval with upper lower limit value, to submodule Block mark is updated;
(5) according to formula Δ Non=Non-NmarkCalculate the input departure Δ N of bridge arm submoduleon, NmarkTo count Current markers are 1 bridge arm submodule number, NonCounted for control system by respective algorithms (nearest level approaches modulation algorithm) Input submodule quantity needed for obtained current bridge arm;
(6) according to input departure Δ NonAnd bridge arm current carries out switching control to bridge arm submodule.
The wave component of each submodule capacitor voltage in bridge arm is calculated in the step (2) according to following formula:
Δuc,i=uc,i-Ucn
Wherein:Δuc,iFor the wave component of i-th of submodule capacitor voltage in bridge arm, uc,iFor i-th of submodule in bridge arm The capacitance voltage of block, UcnFor submodule capacitor voltage rated value and Ucn=Udc/ N, UdcFor the DC side rated voltage of transverter, i It is the submodule number in bridge arm for natural number and 1≤i≤N, N.
The voltage fluctuation of capacitor rate ε of whole bridge arm is calculated in the step (2) according to following formula:
Stability bandwidth threshold epsilon in the step (3)mIt is set as 5%~10%.
According to the upper lower limit value of following formula determination sub-module capacitance voltage in the step (4):
Uup=Ucn(1+εm) Ulow=Ucn(1-εm)
Wherein:UupAnd UlowThe respectively higher limit and lower limit of submodule capacitor voltage, UcnFor submodule capacitor voltage Rated value and Ucn=Udc/ N, UdcFor the DC side rated voltage of transverter, N is the submodule number in bridge arm.
The standard being updated in the step (4) to sub- module marks is as follows:
If bridge arm current >=0, the submodule that capacitance voltage in bridge arm is more than higher limit is labeled as 0, capacitance voltage is small 1 is labeled as in the submodule of lower limit, submodule of the capacitance voltage in upper lower limit value interval keeps former mark constant;If bridge arm Electric current < 0, then be labeled as 1, capacitance voltage is less than the submodule of lower limit by the submodule that capacitance voltage in bridge arm is more than higher limit Block is labeled as 0, and submodule of the capacitance voltage in upper lower limit value interval keeps former mark constant.
The standard for carrying out switching control to bridge arm submodule in the step (6) is as follows:
As Δ NonDuring > 0:If bridge arm current >=0, by bridge arm it is all mark be submodule input and from labeled as The minimum Δ N of capacitance voltage is put into 0 submoduleonIndividual submodule, while by remaining submodule complete resection;If bridge arm is electric < 0 is flowed, then marks the submodule for being input and the input capacitance voltage highest from the submodule labeled as 0 by all in bridge arm Δ NonIndividual submodule, while by remaining submodule complete resection;
As Δ NonDuring < 0:If bridge arm current >=0, the minimum N of capacitance voltage is put into from the submodule labeled as 1on Individual submodule, while by remaining submodule complete resection;If bridge arm current < 0, electricity is put into from the submodule labeled as 1 Hold voltage highest NonIndividual submodule, while by remaining submodule complete resection;
As Δ NonWhen=0:Then the submodule for being is marked to put into by all in bridge arm, it is all to mark the submodule for being to cut Remove.
Different from conventional measures, the present invention considers the current switching state of submodule and electric capacity electricity when putting into submodule Pressure, and the higher submodule of relative importance value will be put into labeled as 1, the higher submodule of excision relative importance value is then right respectively labeled as 0 The submodule of two kinds of marks is ranked up and switching operation, under the premise of ensureing that voltage fluctuation of capacitor is less, reduces submodule The switching frequency of block, and the capacitance voltage sequence shared time is reduced, transverter can be made in relatively low submodule switching frequency Under rate, the balance requirement of submodule capacitor voltage is met.Therefore, advantageous effects of the invention are summarized as follows:
(1) control strategy of the present invention simply and efficiently realizes the capacitance voltage equilibrium of a large amount of submodules.
(2) control strategy of the present invention not substantially increase submodule capacitor voltage degree of unbalancedness and stability bandwidth on the premise of, Significantly reduce the switching frequency of submodule and the switching loss of power electronic devices.
(3) control strategy of the present invention can be by setting voltage fluctuation of capacitor threshold value, to regulate and control the submodule throwing of controlled bridge arm Cut frequency and voltage fluctuation of capacitor rate.
Brief description of the drawings
Fig. 1 is the structural representation of modularization multi-level converter.
Fig. 2 is the schematic flow sheet of capacitor voltage balance control strategy of the present invention.
Fig. 3 is the simulation waveform that voltage fluctuation of capacitor threshold value is each submodule capacitor voltage of bridge arm in A phases in the case of 9% Figure.
Embodiment
In order to more specifically describe the present invention, below in conjunction with the accompanying drawings and embodiment is to technical scheme And its relative theory is described in detail.
As shown in figure 1, in the present embodiment modularization multi-level converter use the bridge arm structure of three-phase six, each bridge arm by Several half-bridge submodules and a bridge arm reactor are composed in series, for the three-phase alternating current of AC network to be converted into direct current Electricity.Half-bridge submodule output voltage exist just with 0 two kinds of level, bridge arm reactor can suppress the bridge arm change of current, in DC Line Fault When play suppression fault current and rise, the effect of the protection device such as IGBT.Half-bridge submodule is by two IGBT pipes T1~T2 and one Individual electric capacity C is constituted;Wherein, IGBT pipes T1 output end is connected and constituted the one of half-bridge submodule with IGBT pipes T2 input End, IGBT pipes T1 input is connected with electric capacity C one end, and IGBT pipes T2 output end is connected and structure with the electric capacity C other end Into the other end of half-bridge submodule.
Capacitor voltage balance control strategy of the present invention is used for above-mentioned converter structure, detailed process is as shown in Figure 2:
(1) submodule for being now in input state is labeled as 1 first, the submodule in excision state is labeled as 0.
(2) by taking bridge arm in A phases as an example, the wave component of each submodule capacitor voltage is calculated using following formula:
Δuc,i=uc,i-Ucn(i=1,2 ..., N)
Wherein, uc,iFor the capacitance voltage of i-th of submodule in bridge arm in A phases, the rated value U of submodule capacitor voltagecnBy Following formula is calculated, UdcFor the DC side rated voltage of transverter, N is the submodule number in bridge arm.
(3) the voltage fluctuation of capacitor rate ε of whole bridge arm is calculated using following formula:
Wherein:max|ΔuC, i| for voltage fluctuation of capacitor component maximum in N number of submodule.
(4) ε and threshold epsilon are comparedmSize, when ε be more than or equal to εmWhen, carry out step (5);When ε is less than εmWhen, directly enter Row step (7).
(5) the higher limit U of following formula calculating sub module capacitance voltage is utilizedupWith lower limit Ulow
Uup=Ucn(1+εm)
Ulow=Ucn(1-εm)
(6) bridge arm current i is madearm,apDirection is with being all mutually that just, on the contrary is negative in Fig. 1.Work as iarm,ap, will during more than or equal to 0 The submodule that all capacitance voltages are more than higher limit is labeled as 0, and the submodule that all capacitance voltages are less than lower limit is labeled as 1, Holding mark between upper lower limit value is constant;Work as iarm,apDuring less than 0, all capacitance voltages are more than to the submodule of higher limit Labeled as 1, the submodule that all capacitance voltages are less than lower limit is labeled as 0, and the holding mark between upper lower limit value is constant.
(7) statistics is N labeled as the quantity of 1 submodulemark, what the calculating of top level control device was obtained is currently needed for input Submodule quantity is Non, both departure Δ N are calculated with following formulaon
ΔNon=Non-Nmark
(8) as Δ NonDuring more than 0:If iarm,apMore than or equal to 0, the submodule for being is marked to put into by all, and in mark To put into the minimum Δ N of voltage in 0 submoduleonIndividual submodule, by remaining submodule complete resection;If iarm,apLess than 0, The submodule for being is marked to put into by all, and the input voltage highest Δ N in the submodule labeled as 0onIndividual submodule, will Remaining submodule complete resection.
As Δ NonDuring less than 0:If iarm,apMore than or equal to 0, the minimum N of voltage is put into the submodule labeled as 1onIt is individual Submodule, by remaining submodule complete resection;If iarm,apLess than 0, voltage highest is put into the submodule labeled as 1 NonIndividual submodule, by remaining submodule complete resection.
As Δ NonDuring equal to 0:The submodule for being is marked to put into by all, it is all to mark the submodule excision for being.
So far the capacitor voltage balance control of modularization multi-level converter is completed.
It is as shown in table 1 using the modularization multi-level converter parameter of present embodiment control strategy with reference to Fig. 1:
Table 1
The voltage fluctuation of capacitor threshold epsilon of setting is taken respectivelymFor 0% to 14%, wherein εmElectric capacity i.e. traditional electricity when taking 0% Press balance control method.According to simulation result, the average switching frequency f of the submodule of bridge arm in the A phases under different settingssw,ave With maximum capacitor voltage fluctuation rate εmaxAs shown in table 2:
Table 2
Use after capacitor voltage balance strategy of the present invention, substantially do not increase in voltage fluctuation of capacitor rate as can be seen from Table 2 In the case of big, the average switching frequency of submodule has obtained significant reduction.Simultaneously as voltage fluctuation of capacitor threshold epsilonmIt is one The individual value that can be set so that control of the transverter to voltage fluctuation of capacitor rate and submodule switching frequency becomes more flexible.
When the voltage fluctuation of capacitor threshold epsilon of settingmFor 9% when, obtain bridge arm in A phases 20 submodule capacitor voltages imitate True waveform as shown in figure 3, compared to correspondence traditional control method 0%, switching frequency is reduced to 153Hz from 2021Hz, and Maximum capacitor voltage fluctuation rate has only risen to 10.1% from 8.3%.
The above-mentioned description to embodiment is understood that for ease of those skilled in the art and using the present invention. Person skilled in the art obviously can easily make various modifications to above-described embodiment, and described herein general Principle is applied in other embodiment without passing through performing creative labour.Therefore, the invention is not restricted to above-described embodiment, ability Field technique personnel are according to the announcement of the present invention, and the improvement made for the present invention and modification all should be in protection scope of the present invention Within.

Claims (7)

1. a kind of capacitor voltage balance control strategy of modularization multi-level converter, comprises the following steps:
(1) for any bridge arm of transverter, the submodule in input state in current bridge arm is labeled as 1, in excision The submodule of state is labeled as 0;
(2) wave component of each submodule capacitor voltage in bridge arm is calculated, and then tries to achieve the voltage fluctuation of capacitor of whole bridge arm Rate ε;
(3) voltage fluctuation of capacitor rate ε and stability bandwidth threshold epsilon are comparedmSize:If ε >=εm, then into step (4);If ε < εm, Then jump directly to step (5);
(4) upper lower limit value of determination sub-module capacitance voltage, makes bridge arm current flow to the direction of low-pressure end from high-pressure side for just, instead Be negative;And then according to bridge arm current direction and the submodule capacitor voltage relation interval with upper lower limit value, to submodule mark Note is updated;
(5) according to formula Δ Non=Non-NmarkCalculate the input departure Δ N of bridge arm submoduleon, NmarkIt is current to count Labeled as 1 bridge arm submodule number, NonSon is put into for needed for control system calculates obtained current bridge arm by respective algorithms Module number;
(6) according to input departure Δ NonAnd bridge arm current carries out switching control to bridge arm submodule.
2. capacitor voltage balance control strategy according to claim 1, it is characterised in that:In the step (2) according to Lower formula calculates the wave component of each submodule capacitor voltage in bridge arm:
Δuc,i=uc,i-Ucn
Wherein:Δuc,iFor the wave component of i-th of submodule capacitor voltage in bridge arm, uc,iFor i-th submodule in bridge arm Capacitance voltage, UcnFor submodule capacitor voltage rated value and Ucn=Udc/ N, UdcFor the DC side rated voltage of transverter, i is certainly So count and 1≤i≤N, N are the submodule number in bridge arm.
3. capacitor voltage balance control strategy according to claim 2, it is characterised in that:In the step (2) according to Lower formula calculates the voltage fluctuation of capacitor rate ε of whole bridge arm:
<mrow> <mi>&amp;epsiv;</mi> <mo>=</mo> <mfrac> <mrow> <mi>m</mi> <mi>a</mi> <mi>x</mi> <mo>{</mo> <mrow> <mo>|</mo> <mrow> <msub> <mi>&amp;Delta;u</mi> <mrow> <mi>c</mi> <mo>,</mo> <mn>1</mn> </mrow> </msub> </mrow> <mo>|</mo> </mrow> <mo>,</mo> <mrow> <mo>|</mo> <mrow> <msub> <mi>&amp;Delta;u</mi> <mrow> <mi>c</mi> <mo>,</mo> <mn>2</mn> </mrow> </msub> </mrow> <mo>|</mo> </mrow> <mo>,</mo> <mo>...</mo> <mo>,</mo> <mrow> <mo>|</mo> <mrow> <msub> <mi>&amp;Delta;u</mi> <mrow> <mi>c</mi> <mo>,</mo> <mi>N</mi> </mrow> </msub> </mrow> <mo>|</mo> </mrow> <mo>}</mo> </mrow> <msub> <mi>U</mi> <mrow> <mi>c</mi> <mi>n</mi> </mrow> </msub> </mfrac> <mo>.</mo> </mrow>
4. capacitor voltage balance control strategy according to claim 1, it is characterised in that:Fluctuation in the step (3) Rate threshold epsilonmIt is set as 5%~10%.
5. capacitor voltage balance control strategy according to claim 1, it is characterised in that:In the step (4) according to The upper lower limit value of lower formula determination sub-module capacitance voltage:
Uup=Ucn(1+εm) Ulow=Ucn(1-εm)
Wherein:UupAnd UlowThe respectively higher limit and lower limit of submodule capacitor voltage, UcnFor submodule capacitor voltage rated value And Ucn=Udc/ N, UdcFor the DC side rated voltage of transverter, N is the submodule number in bridge arm.
6. capacitor voltage balance control strategy according to claim 1, it is characterised in that:To submodule in the step (4) The standard that block mark is updated is as follows:
If bridge arm current >=0, the submodule that capacitance voltage in bridge arm is more than higher limit is labeled as 0, under capacitance voltage is less than The submodule of limit value is labeled as 1, and submodule of the capacitance voltage in upper lower limit value interval keeps former mark constant;If bridge arm current < 0, then be labeled as 1, capacitance voltage is less than the submodule mark of lower limit by the submodule that capacitance voltage in bridge arm is more than higher limit 0 is designated as, submodule of the capacitance voltage in upper lower limit value interval keeps former mark constant.
7. capacitor voltage balance control strategy according to claim 1, it is characterised in that:To bridge arm in the step (6) The standard that submodule carries out switching control is as follows:
As Δ NonDuring > 0:If bridge arm current >=0, the submodule for being input is marked and from labeled as 0 by all in bridge arm The minimum Δ N of capacitance voltage is put into submoduleonIndividual submodule, while by remaining submodule complete resection;If bridge arm current < 0, then mark the submodule for being input and the input capacitance voltage highest from the submodule labeled as 0 by all in bridge arm ΔNonIndividual submodule, while by remaining submodule complete resection;
As Δ NonDuring < 0:If bridge arm current >=0, the minimum N of capacitance voltage is put into from the submodule labeled as 1onIndividual submodule Block, while by remaining submodule complete resection;If bridge arm current < 0, puts into capacitance voltage from the submodule labeled as 1 Highest NonIndividual submodule, while by remaining submodule complete resection;
As Δ NonWhen=0:Then the submodule for being is marked to put into by all in bridge arm, it is all to mark the submodule excision for being.
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CN108054944A (en) * 2018-01-25 2018-05-18 湖南大学 A kind of 50 electric harmonic generator control methods
CN108832826A (en) * 2018-05-25 2018-11-16 广东电网有限责任公司电力调度控制中心 A kind of MMC capacitance voltage balance control method suitable for FPGA
CN109067222A (en) * 2018-08-07 2018-12-21 西安西电电力系统有限公司 A kind of IGBT control method based on MMC-HVDC
CN109149946A (en) * 2018-09-20 2019-01-04 南京工程学院 A kind of DC/DC current transformer voltage balance control policy optimization method
CN109274285A (en) * 2018-10-24 2019-01-25 南方电网科学研究院有限责任公司 Capacitance voltage balancing method of hybrid modular multilevel converter
CN111600495A (en) * 2019-02-21 2020-08-28 国家电网有限公司 Submodule control method and device of MMC (modular multilevel converter) with damping resistor
CN112467777A (en) * 2020-11-16 2021-03-09 国网浙江省电力有限公司电力科学研究院 Method for controlling asymmetric direct current by using modular combined direct current transformer
CN112600451A (en) * 2020-11-17 2021-04-02 西安西电电力系统有限公司 Flexible direct current converter valve power module capacitor voltage equalizing method
CN115549439A (en) * 2022-11-29 2022-12-30 东南大学 MMC (Modular multilevel converter) switching loss optimization method and equipment under low-power operation

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CN108054944A (en) * 2018-01-25 2018-05-18 湖南大学 A kind of 50 electric harmonic generator control methods
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CN108832826A (en) * 2018-05-25 2018-11-16 广东电网有限责任公司电力调度控制中心 A kind of MMC capacitance voltage balance control method suitable for FPGA
CN108832826B (en) * 2018-05-25 2020-10-23 广东电网有限责任公司电力调度控制中心 MMC capacitor voltage balance control method suitable for FPGA
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