CN107026131A - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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Publication number
CN107026131A
CN107026131A CN201611087941.9A CN201611087941A CN107026131A CN 107026131 A CN107026131 A CN 107026131A CN 201611087941 A CN201611087941 A CN 201611087941A CN 107026131 A CN107026131 A CN 107026131A
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China
Prior art keywords
moulding compound
groove
substrate
pipe core
component pipe
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CN201611087941.9A
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English (en)
Inventor
叶书伸
林柏尧
吕学德
郑心圃
黄志恭
叶宗铭
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Publication of CN107026131A publication Critical patent/CN107026131A/zh
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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

本发明实施例公开了一种器件，包括衬底及所述衬底上方的管芯。模塑料环绕所述管芯并且包括沿着所述模塑料的周围区域形成的结构界面。本发明实施例涉及半导体器件及其制造方法。

Description

半导体器件及其制造方法
技术领域
本发明实施例涉及半导体器件及其制造方法。
背景技术
半导体器件用于各种电子应用，例如个人电脑、手机、数码相机和其他电子设备。半导体器件通常通过在半导体衬底上方依次沉积各绝缘或介电层、导电层和半导体层，并使用光刻图案化各材料层以在其上形成电路组件和元件的方法来制造。在单个半导体晶圆上，通常制造了数十或数百个集成电路。通过沿划线切割集成电路分割单独的管芯。然后分别将单独的管芯以多芯片模式或者其他的封装类型来单独地封装。
半导体行业通过不断减小最小部件尺寸以提高各种电子元件(例如，晶体管、二极管、电阻器、电容器等)的集成密度，从而能让更多的组件集成到一个特定区域内。在一些应用中，这些较小的电子组件比过去的封装件需要更小、更先进的封装系统。
发明内容
根据本发明的一些实施例，提供了一种半导体器件，包括：管芯，位于衬底的上方；以及模塑料，环绕所述管芯，所述模塑料具有沿着所述模塑料的周围区域形成的结构界面。
根据本发明的另一些实施例，还提供了一种半导体器件，包括：芯片，位于衬底的上方；以及模塑料，环绕所述芯片，所述模塑料具有远离所述芯片的周围区域，以及在所述模塑料的所述周围区域中形成的凹槽。
根据本发明的又一些实施例，还提供了一种制造半导体器件的方法，包括：将管芯设置于衬底的上方；在所述管芯周围形成模塑料；以及在所述模塑料的周围区域中形成凹槽。
附图说明
接合附图阅读以下详细说明，可更好地理解本发明的各方面。应注意到，根据本行业中的标准惯例，各种部件未按比例绘制。实际上，为论述清楚，各部件的尺寸可任意增加或减少。
图1A至1B图示了根据一些实施例制造器件的不同的中间阶段。
图1C是根据一些实施例的在图1B中示出的以等距排列显示的器件的局部剖面图。
图1D是根据一些实施例的在图1C的器件中示出的模塑料的详细的等轴测视图。
图2A至2B示出了根据一些实施例制造器件的不同的中间阶段。
图2C是根据一些实施例的在图2B中示出的以等距排列显示的器件的局部剖面图。
图2D是根据一些实施例的在图2C的器件中图示的模塑料的详细的等轴测视图。
图3是根据一些实施例的模塑料的顶部的局部剖面图。
图4是说明实验数据的箱线图。
具体实施方式
以下公开提供了许多不同的实施例或示例，用于实现本发明的不同功能。下文描述了组件和布置的具体实例，以简化本发明。当然，这些仅仅是示例，并非旨在限制本发明。例如，在随后的说明中，形成于第二部件上或者上方的第一部件可包含其中所述第一和第二部件形成直接接触的实施例，也同样可能包含其中形成于第一和第二部件之间另一部件的实施例，这样第一和第二部件可不进行直接接触。此外，本发明可能会在各种实例中重复参考数字和/或字母。此重复是为了简化和清楚的目的，且本身并不指示所讨论的各种实施例和/或配置之间的关系。
此外，为了便于描述，本文使用空间相对术语，例如“下方”、“下面”、“低于”、“上方”、“上面”等以描述如图中所示的一个元件或部件与另一元件或部件的关系。空间相对术语旨在包含除了附图所示的方向之外的使用或操作中的器件的不同方向。该装置可调整为其他方向(旋转90度或者面向其他方向)，而其中所使用的空间相关叙词可做相应解释。
图1A至1D根据说明性实施例图示了半导体器件或者封装件100。现在主要参考图1A和1B，半导体器件100根据一些实施例以剖面图图示其制造的中间阶段。半导体器件100包括衬底102和位于衬底102的上方的器件管芯104。
衬底102在一些实施例中可为半导体衬底。半导体衬底可包含，例如，掺杂的或未掺杂的块状硅，或绝缘体上半导体(SOI)衬底的有源层。一般来说，SOI衬底包含形成于绝缘体层上的半导体材料层，例如，硅。例如，绝缘体层可为埋氧(BOX)层或氧化硅层。绝缘体层设置在衬底上，例如硅衬底或者玻璃衬底。或者，衬底可包含另一元素半导体，比如锗；包含碳化硅、砷化镓、磷化镓、磷化铟、砷化铟和/或锑化铟的化合物半导体；包括SiGe、GaAsP、AlInAs、AlGaAs、GaInAs、GaInP和/或GaInAsP的合金半导体；或其组合。也可使用其他衬底，例如多层或者梯度衬底，。
有源器件(没有显示)，例如晶体管、电容器、电阻器、二极管、光二极体、熔丝等等，可形成于衬底102的顶侧103处。互连结构(没有显示)可在有源器件和衬底102的上方形成。互连结构可包括包含通过使用任何合适的方法形成的导电部件(例如，包含铜、铝、钨、其组合等的导电线和通孔)的层间电介质(ILD)和/或金属层间介电(IMD)层。ILD和IMD可包括设置于这样的导电部件之间的低k介电材料，其具有的k值，例如，低于大约4.0或者甚至2.0。在一些实施例中，ILD和IMD可由，例如，磷硅酸盐玻璃(PSG)、硼磷硅酸盐玻璃(BPSG)、氟硅酸盐玻璃(FSG)、SiOxCy、旋涂玻璃、旋涂聚合物、硅碳材料、其化合物、其复合材料、其组合等组成，并且可通过合适的工艺，例如旋涂、CVD以及等离子体增强CVD形成。
互连结构电连接不同的有源器件以形成功能电路。由这种电路提供的功能可包含存储结构、处理结构、传感器、放大器、功率分配、输入/输出电路等。以上示例出于说明性目的被提供，仅仅为了进一步解释本发明的申请而不旨在以任何方式限制本发明。对于特定应用来说，也可使用其他电路。
输入/输出(I/O)和钝化部件(没有单独说明)可在互连结构的上方形成。例如，接触焊盘可在互连结构的上方形成并且可通过互连结构中的各个导电部件电连接至有源器件，以及钝化层可在互连结构和接触焊盘的上方形成。凸块下金属化层(UBM)可在该接触焊盘上形成以及连接件(例如，BGA球、C4凸块、微凸块、其组合等)可在UBM上形成。此外，在其中器件管芯104是半导体管芯的实施例中，连接件可在衬底102的背面105上形成(例如，衬底102的与其上形成有有源器件的一侧相对的那侧)，以及通孔可在衬底102中形成以在连接件和器件管芯104的互连结构之间提供电连接。
器件管芯104具有第一表面106和第二相对表面108。器件管芯104的第一表面面对衬底102，如此器件管芯104被接合(例如，倒装芯片接合)至衬底102的顶侧103。在一些实施例中，器件管芯104通过多个连接件110，例如，球栅阵列(BGA)球、可控塌陷芯片连接(C4)凸块、微凸块等，被接合至衬底102的顶侧103上的接触焊盘(没有显示)。器件管芯104可能是半导体管芯并且可是任何类型的集成电路，例如处理器、逻辑电路、存储器、模拟电路、数字电路、复合信号等。器件管芯104可包括衬底、有源器件以及互连结构(没有单独说明)。
参考图1A至1D，半导体器件100还包括模塑料112。模塑料112位于衬底102的上方并且环绕器件管芯104。在一些实施例中，模塑料112可能是包含聚合材料(例如，环氧树脂、树脂等)的模塑底部填充物(MUF)，其含有或者不含有硬化剂、填料(例如，二氧化硅填料、玻璃填料、氧化铝、氧化硅等)、粘合促进剂、其组合等。
模塑料112可通过使用合适的工艺，例如传递模塑工艺形成。衬底102和器件管芯104可设置于模制装置的顶部包封模具和底部包封模具之间。
顶部和底部包封模具可包含合适的材料以提供结构支撑/压力。顶部和/或底部模具在模塑工艺中可被移动以覆凸缘衬底102的部件和/或器件管芯104的部件，其可防止模塑料112在衬底102和/或器件管芯104的这样的部件上方形成。保护膜可被设置于包封模具之间并且接触衬底102和/或器件管芯104的各个部件。保护膜保护了部件免于由于与顶部或者底部模具接触而产生的损坏。在一些实施例中，保护膜包含橡胶、聚对苯二甲酸乙二醇酯(PET)、聚四氟乙烯、或者任何其他材料，这些材料可在模制之后从衬底102和/或器件管芯104中被去除。
在另一个实施例中，模塑料112可能初始被形成以覆凸缘器件管芯104。接下来，执行例如化学机械抛光(CMP)步骤或者研磨步骤的平坦化步骤以平坦化模塑料112，直到暴露器件管芯104。由于平坦化，器件管芯104的顶面大体与模塑料112的顶面平齐(共面)。
仍然参考图1A至1D，模塑料112包括结构界面114。图1C是图1B中图示的以等距排列显示的半导体器件100的局部剖面图，其中，由隐藏线显示的结构界面114。图1D是图1C的详细的等轴测视图，根据一些实施例图示了具有结构界面114的模塑料112。在一些方面，结构界面114沿着模塑料112的外部或者周围区域116形成。模塑料112的外部或者周围区域116远离器件管芯104的外缘123。
在一些方面，结构界面114是形成于模塑料112中的凹槽124。在一实施例中，凹槽124沿着模塑料112的外部或者周围区域116被分解成若干段。在另一个实施例中，凹槽124设置于模塑料112的外部或者周围区域116中，但是仅仅设置于模塑料112的一个或者多个拐角区域126中。凹槽124可具有第一腿部，其沿着模塑料112的一侧延伸，以及第二腿部，其沿着模塑料112的一侧延伸并且相邻于模塑料112的一侧。在一些方面，第一和第二腿部彼此垂直。仍然在一些方面，凹槽124是L型的。在一选择性实施例中，凹槽124是连续的，例如，凹槽124沿着模塑料112的外部或者周围区域116延伸而没有中断。
在一说明性实施例中，凹槽124的外缘128距离模塑料112的外缘130大约是850微米(μm)。在另一说明性实施例中，凹槽124的外缘128距离模塑料112的外缘130大约是300μm。凹槽124的外缘128距离模塑料112的外缘130可以大约是300μm至850μm。
在一些实施例中，凹槽124具有大约1毫米(mm)的宽度，W。仍然在一些实施例中，凹槽124具有大约1至1.5mm的宽度，W。在一些其他实施例中，凹槽124具有大约4至4.5mm的长度，L。在一实施例中，凹槽124具有大约50μm至150μm的深度，D。深度D从模塑料112的最顶面132延伸至凹槽124的最底面134。但是，可采用任何合适的尺寸。
凹槽124可通过使用激光烧蚀工艺形成，例如，激光烧蚀工艺使用由光电技术有限公司(EO Technics Co,Ltd.)提供的激光功率设置为约3.7W±0.3W的EO激光烧蚀-BMC502PI。在一实施例中，激光烧蚀工艺可通过以一系列的激光脉冲来照射或者烧蚀模塑料112的方式实施以形成凹槽124。
在其他实施例中，凹槽124可使用激光钻孔或者模塑迹线(mold trace)被形成或者图案化。在该方法中，保护层，例如光热转换(LTHC)层或者hogomax层，首先被沉积在模塑料112的上方。一旦被保护，激光被导向模塑料112的需要被去除以形成凹槽124的那些部分。在激光钻孔工艺过程中，钻孔能量范围可在0.1mJ至大约30mJ的范围内以及钻孔角度相对于模塑料112的法线为大约0度(垂直于模塑料112)至大约85度。
主要参考图1B至1C，半导体器件100包含热界面材料118以及还包含凸缘120。热界面材料118位于模塑料112和器件管芯104的第二表面108的上方。热界面材料118用于凸缘120和器件管芯104之间的热互连。在一些实施例中，热界面材料118用于将凸缘120连接至器件管芯104。而在一些其他实施例中，热界面材料118用于将凸缘120连接至模塑料112。还是在一些其他实施例中，热界面材料118用于将凸缘120连接至模塑料112和器件管芯104。
凸缘120被放置于器件管芯104和/或模塑料112的上方并且接合至器件管芯104和/或模塑料112。凸缘120可具有平坦的顶面。在一些实施例中，凸缘120可全部由均质材料形成，其意味凸缘120的所有部分是由相同材料形成。在一些实施例中，该凸缘120是金属凸缘。例如，凸缘120可由铜(Cu)以及镍(Ni)的薄层组成，但是例如铝或者铝合金的其他金属或者金属合金也可被使用。
热界面材料118可被选择性沉积。在一些实施例中，热界面材料118被选择性沉积于器件管芯104的上方。在示例性实施例中，热界面材料118沉积于器件管芯104的上方，其重量为大约16至28克(g)。仍然在一些实施例中，当凸缘120被放置在器件管芯104上时，凹槽124发挥作用来捕捉过量的热界面材料118。
热界面材料118具有高导热性并且粘附至凸缘120和器件管芯104和/或模塑料112。在一些实施例中，热界面材料118由硅酮组成，例如包含丝、碳、氢、氧和有时其他元素的聚合物。或者，热界面材料118也可由其他材料，例如混合有硅酮的氧化铝(Al3O3)或者氧化锌(ZnO2)以及其他合适的材料组成。
在一些实施例中，在器件管芯104和凸缘120之间的热界面材料118的厚度T的范围为大约10微米(μm)至大约300μm。在一些实施例中，热界面材料118具有的导热系数在大约3瓦特/米开尓文(W/mK)至大约5W/mK或者更大之间。相应的，器件管芯104产生的热量可扩散至凸缘120，然后扩散至外部环境。某些类型的器件管芯在操作过程中产生大量的热量。例如，包含中央处理单元(CPU)、图形处理单元(GPU)、和/或现场可编程门阵列(FPGA)的器件管芯常常产生大量的热量。
在操作中，芯片或器件管芯104设置于衬底102的上方并且包含连接件110以为器件管芯104提供电连接。器件管芯104和衬底102被放置于模具中。模制工艺被执行，其中模塑料112形成在衬底102之上并且环绕器件管芯104。模制工艺操作为将模塑料112设置在空隙136之间，例如，设置在连接件110之间的空间，以及环绕器件管芯104以支撑器件管芯104且提供结构完整性。衬底102、器件管芯104和模塑料112形成封装结构122。封装结构122被从模具中去除。在封装结构122被从模具中去除之后，凹槽124在模塑料112的外部或者周围区域116中形成。然后热界面材料118被应用在器件管芯104的第二表面108的上方以及凹槽124所在的模塑料112的至少一部分的上方，如此热界面材料118填充凹槽124。然后凸缘120被设置在热界面材料118的上方并且与其接合。
凹槽124帮助防止热界面材料118渗出或者以其他方式延伸经过模塑料112的外缘130。热界面材料118的渗出可能导致半导体器件100内的翘曲，其可产生弯曲和污染的问题。当凸缘120被放置在器件管芯104上时，凹槽124发挥作用来捕捉过量的热界面材料118。
现在参考图2A至2D，根据另一个说明性实施例的半导体器件或者封装件200被展示。与以上关于图1A至1D描述的实施例相似，半导体器件200包含衬底102以及设置于衬底102上方的器件管芯104。器件管芯104接合至衬底102的顶侧103。器件管芯104的第一表面106面对衬底102以及器件管芯104通过连接件110电连接至衬底102。
半导体器件200还包括形成于衬底102的上方并且环绕器件管芯104的模塑料112。模塑料112包含结构界面114。图2C是图2B中图示的以等距排列显示的半导体器件200的局部剖面图，其中，由隐藏线显示结构界面114。图2D是图2C的详细的等轴测视图，根据一些实施例图示了具有结构界面114的模塑料112。
在一些方面，结构界面114沿着模塑料112的外部或者周围区域116形成。模塑料112的外部或者周围区域116远离器件管芯104的外缘123。
在一些方面，结构界面114是凸缘或者坝140，其从模塑料112的顶面142开始沿着模塑料112的外部区域或者周围区域116延伸。在一些方面，凸缘或者坝140沿着模塑料112的外缘130延伸，如此凸缘140的外表面与模塑料112的外缘130是齐平的或者共面的。在一些方面，凸缘140是模塑料112的主要部分。在一实施例中，模具被配置为在模制工艺中将形成凸缘140，如此凸缘140是模塑料112的主要部分。
在另一方面，模塑料112通过，例如，研磨、CMP、蚀刻或者另外的工艺被减小或者平坦化以形成凸缘或者坝140。在一些实施例中，模塑料112可被初始形成在器件管芯104的顶面的上方延伸并且覆凸缘器件管芯104的顶面。平坦化工艺(例如，机械研磨、化学机械抛光(CMP)、或者其他回蚀技术)可被使用于去除部分模塑料112以形成凸缘或者坝140。在一些实施例中，平坦化工艺(例如，机械研磨、化学机械抛光(CMP)、或者其他回蚀技术)可被使用于去除器件管芯104上方的过量部分的模塑料112以暴露器件管芯。
在一实施例中，凸缘140沿着模塑料112的外缘连续延伸。在一选择性实施例中，凸缘140是多个凸缘的其中一个，其中每个凸缘设置于模塑料112的拐角区126中。在一些实施例中，凸缘140包含第一腿部150和第二腿部152。在一些实施例中，凸缘140具有在大约100um和200um之间的高度h。在一些实施例中，凸缘140具有在大约300um和350um之间的宽度w。以及在一些实施例中，凸缘140具有在大约300um和350um之间的长度。凸缘或者坝140帮助防止热界面材料118延伸超出模塑料112的外缘130。
半导体器件200还包括热界面材料118和凸缘120。热界面材料118设置于模塑料112和器件管芯104的上方。热界面材料118将凸缘120连接至模塑料112以及器件管芯104中一个或者两个。
参考图3，另一实施例说明了第二凹槽或者第二沟槽260可被形成环绕模塑料112中的第一凹槽224的外缘，例如图1A至1D显示的凹槽124。在一些实施例中，第一凹槽224的周界被第二凹槽或者第二沟槽260环绕。第二凹槽260与第一凹槽224可以在不同的步骤中形成。在一方面中，第二凹槽260形成于第一凹槽224之前。而在另一方面中，第二凹槽260形成于第一凹槽224之后。第二凹槽260可具有在大约50μm至150μm之间的深度。在一些实施例中，第二凹槽260形成于第一凹槽224之后并且仅仅延伸第一凹槽224，如此第二凹槽260成为第一凹槽224的一部分。第一凹槽224的深度和第二凹槽260的深度可相同或者不同，只要其各自的深度在大约50μm至150μm之间。在一些方面，第一凹槽224具有大于第二凹槽260的深度。但是然而，在另一些方面，第二凹槽260具有大于第一凹槽224的深度。例如，在一实施例中，第一凹槽224具有大约为4mm的长度L，以及第二凹槽260具有大约为4至4.5mm的长度。在该实施例中，第一凹槽224可具有大约为1mm的宽度，以及第二凹槽260具有大约为1至1.5mm的宽度。
在一说明性实施例中，第二凹槽260的外缘262距离模塑料112的外缘130大约是850微米(μm)。在另一说明性实施例中，第二凹槽260的外缘262距离模塑料112的外缘130大约是300μm。第二凹槽260的外缘262距离模塑料112的外缘130大约是300μm至850μm。
现在参考图4，实验数据通过箱线类型图被展示。试验在四种不同的封装件上进行。四种不同的封装件中的每个都根据高温翘曲规范被影响。在高温翘曲规范中，四种不同的封装件中的每个被加热至260℃，然后被冷却。然后翘曲的量以微米进行测量。期望封装件翘曲低于60μm。
在试验1中，封装件测试不包括环绕器件管芯的模塑料的凹槽。热界面材料只沉积于器件管芯的上方，如此没有热界面材料沉积于模塑料的上方。这些类型的封装件的中值翘曲是81μm，其高于期望的60μm阈值。
在试验2中，封装件测试不包括环绕器件管芯的模塑料中的凹槽。热界面材料沉积于器件管芯的上方，与试验1中被沉积的一致，并且此外，还沉积于模塑料的部分的上方。热界面材料在封装件的四个拐角中的模塑料的上方被沉积为L型。这些类型的封装件的中值翘曲是66μm，其高于60μm阈值。
在试验3中，封装件测试包含形成于封装件的四个拐角中的凹槽。凹槽具有两个垂直腿部，其部分沿着封装件的各自的边缘延伸。封装件的外缘，其中在这种情况下是模塑料的外缘，和凹槽的外缘之间的间隙大约为850μm。每个腿部具有大约1mm的宽度、大约4mm的长度以及大约100μm的深度。热界面材料被沉积于器件管芯的上方以及以其在实验2中被沉积的相同的方式被沉积于每个凹槽的上方。这些类型的封装件的中值翘曲是55μm，其在期望的60μm阈值之内。
在试验4中，封装件测试包含形成于封装件的四个拐角中的凹槽。凹槽具有两个垂直腿部，其部分沿着封装件的各自的边缘延伸。封装件的外缘，其中在这种情况下是模塑料的外缘，和凹槽的外缘之间的间隙大约为300μm。每个腿部具有大约1μm的宽度、大约4mm的长度以及大约100μm的深度。热界面材料被沉积于器件管芯的上方以及以其在实验2和3中被沉积的相同的方式被沉积于每个凹槽的上方。这些类型的封装件的中值翘曲是43μm，其在期望的60μm阈值之内。
由于规范通常需要翘曲低于60μm，封装件翘曲需要低于60μm。此外，同样需要防止热界面材料，其有时被用于对抗翘曲，以免渗出或者延伸超出封装件的外缘，其在一些实例中是模塑料的外缘。热界面材料从封装件边缘渗出可造成弯曲、污染以及翘曲控制的问题。
在一实施例中，器件包括衬底及衬底上方的管芯。模塑料环绕所述管芯并且包括沿着所述模塑料的周围区域形成的结构界面。
在一实施例中，器件包括衬底及衬底上方的芯片。模塑料环绕芯片。模塑料包括远离芯片的周围区域以及形成于模塑料的周围区域中的凹槽。
在一实施例中，方法包括放置管芯于衬底的上方，形成环绕管芯的模塑料，以及形成凹槽于模塑料的周围区域中的步骤。
根据本发明的一些实施例，提供了一种半导体器件，包括：管芯，位于衬底的上方；以及模塑料，环绕所述管芯，所述模塑料具有沿着所述模塑料的周围区域形成的结构界面。
在上述半导体器件中，所述结构界面是延伸至所述模塑料中的凹槽。
在上述半导体器件中，所述凹槽是连续的并且环绕所述模塑料。
在上述半导体器件中，所述结构界面是从所述模塑料的上表面突出的凸缘。
在上述半导体器件中，所述凸缘是连续的并且环绕所述模塑料。
在上述半导体器件中，还包括位于所述模塑料和所述管芯上方的热界面材料，所述热界面材料通过所述结构界面防止延伸超出所述模塑料的外缘。
根据本发明的另一些实施例，还提供了一种半导体器件，包括：芯片，位于衬底的上方；以及模塑料，环绕所述芯片，所述模塑料具有远离所述芯片的周围区域，以及在所述模塑料的所述周围区域中形成的凹槽。
在上述半导体器件中，还包括位于所述模塑料的上方并且填充所述凹槽的热界面材料。
在上述半导体器件中，所述凹槽是连续的。
在上述半导体器件中，所述凹槽形成于所述模塑料的拐角区域中。
在上述半导体器件中，所述第一凹槽的宽度大约是1毫米以及所述第二凹槽的宽度大约是50微米。
在上述半导体器件中，所述凹槽具有大约1毫米的宽度和大约4毫米的长度。
在上述半导体器件中，所述凹槽距离所述模塑料的边缘300至850微米。
在上述半导体器件中，所述凹槽是L形的。
在上述半导体器件中，还包括位于所述热界面材料上方的凸缘。
根据本发明的又一些实施例，还提供了一种制造半导体器件的方法，包括：将管芯设置于衬底的上方；在所述管芯周围形成模塑料；以及在所述模塑料的周围区域中形成凹槽。
在上述方法中，还包括在所述模塑料的上方形成热界面材料。
在上述方法中，还包括在所述热界面材料的上方设置凸缘。
在上述方法中，通过使用激光形成所述凹槽。
在上述方法中，所述凹槽防止所述热界面材料延伸超出所述模塑料的外缘。
上述内容概述了多个实施例的特征，从而使得本领域技术人员可更好地理解本发明的各方面。本领域的技术人员应理解，其可以轻松地将本发明服务于基础，用于设计或修改其他工艺或结构，从而达成与本文所介绍实施例的相同目的和/或实现相同的优点。本领域技术人员还应认识到，这种等效结构并不背离本发明的精神和范围，并且其可以进行各种更改、替换和变更而不背离本发明的精神和范围。

Claims (1)

1.一种半导体器件，包括：
管芯，位于衬底的上方；以及
模塑料，环绕所述管芯，所述模塑料具有沿着所述模塑料的周围区域形成的结构界面。
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