CN106774595A - A kind of current foldback circuit for low pressure difference linear voltage regulator - Google Patents
A kind of current foldback circuit for low pressure difference linear voltage regulator Download PDFInfo
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- CN106774595A CN106774595A CN201710012599.4A CN201710012599A CN106774595A CN 106774595 A CN106774595 A CN 106774595A CN 201710012599 A CN201710012599 A CN 201710012599A CN 106774595 A CN106774595 A CN 106774595A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/569—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection
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- Automation & Control Theory (AREA)
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Abstract
The invention discloses a kind of current foldback circuit for low pressure difference linear voltage regulator.Including current sampling circuit, current comparison circuit and pull-up circuit, the drain-to-gate voltage of current sampling circuit sampling low pressure difference linear voltage regulator power tube, output sample rate current to current comparison circuit；By the electric current after current mirror mirror image with current source be compared sample rate current by current comparison circuit; after the output current of low pressure difference linear voltage regulator exceedes current protection threshold value; the control voltage conducting pull-up circuit of current comparison circuit output; pull-up circuit draws high the grid end voltage of low pressure difference linear voltage regulator power tube; so as to limit the increase of output current, play a part of overcurrent protection.The present invention can effectively suppress the channel-length modulation of current sample pipe in current sampling circuit; reduce electric current and the excessive problem of ideal value deviation that current sampling circuit is adopted; improve the current sample accuracy of current foldback circuit so that the unlatching threshold value of current foldback circuit is more accurate.
Description
Technical field
It is more particularly to a kind of for low pressure difference linear voltage regulator LDO's the invention belongs to analogue layout field
Current foldback circuit.
Background technology
Arriving power management techniques with the information age become more and more important.Low pressure difference linear voltage regulator LDO because
Its small area, high PSRR, Micro Energy Lose, low noise, peripheral circuit simply, with preferable linear transient are responded and loaded
The advantages of transient response characteristic, causes that it is more applicable in portable type electronic product.
When load current is excessive, particularly in the case of output short-circuit, due to output head grounding, supply voltage whole
The two ends of adjustment pipe are added to, cause high current to flow through adjustment pipe, low pressure difference linear voltage regulator LDO voltage stabilizer is easily damaged.Cause
This is in order to ensure safety during chip operation, it is necessary to design current foldback circuit.Current foldback circuit can effectively monitor adjustment
The size of pipe output current, so as to ensure that output end occurs the safety of system when overload, short circuit.
As shown in figure 1, general low pressure difference linear voltage regulator LDO includes an amplifier, grid connection amplifier out
Power tube and be connected on power tube drain electrode and ground between two resistance, its series connection connection amplifier an input,
Another input connection reference voltage of amplifier, the source electrode of power tube connects supply voltage.Most basic conventional overcurrent protection
Circuit is as shown in figure 1, by a current source I0Constituted with four metal-oxide-semiconductor M1-M4.Overcurrent protection typically by current sample,
Compare, finally obtain the size of current that grid voltage control signal is provided by switch controlled power tube again.But the mistake shown in Fig. 1
Stream protection circuit has an open defect, that is, the drain terminal voltage of sampling pipe M2 and power tube MPDrain terminal voltage can not keep one
Cause, now due to the channel-length modulation of MOSFET, sampling tube current can be caused to be not accurate according to desired ratio
Mirror image power tube current, makes the excessively stream threshold value of whole overcurrent protection loop deviation occur.
When MOSFET is turned on, if its drain-source voltage VDSMore than its over-drive voltage Vsat=VGS-VTH, the raceway groove meeting of inversion layer
By pinch off, length of effective channel now changes, and can be expressed as by the current value of MOSFET：
λ in formula is channel length modulation coefficient, and μ is carrier mobility, CoxIt is unit area gate oxide capacitance,
It is the breadth length ratio of pipe, for a metal-oxide-semiconductor for determination, there was only gate source voltage V in (1) formulaGSWith drain-source voltage VDSIt is to become
Amount, its balance of constant.When by current sample pipe M2 and low pressure difference linear voltage regulator LDO power tubes MPSize by a certain percentage
During value, such asEven if both grid ends are connected so that their over-drive voltages are equal, if but two
The drain-source voltage V of personDS, due to the effect of channel-length modulation, the electric current that both flow through is can be seen that from (1) formula
It is not the scaled mirror according to set pipe sizing, the electric current that now sampling pipe M2 is sampled just has mistake with design load
Difference.
The content of the invention
In view of this, the present invention provides a kind of current foldback circuit for low pressure difference linear voltage regulator, can effectively press down
The channel-length modulation of current sample pipe in current sampling circuit processed, reduces electric current and reason that current sampling circuit is adopted
Think the excessive problem of value deviation, improve the current sample accuracy of current foldback circuit so that the unlatching of current foldback circuit
Threshold value is more accurate.
To achieve the above object, the technical scheme that the present invention is provided is as follows：
A kind of current foldback circuit for low pressure difference linear voltage regulator, it is characterised in that including current sampling circuit, electricity
Stream comparison circuit and pull-up circuit,
Current sampling circuit, the drain-to-gate voltage of sampling low pressure difference linear voltage regulator power tube M11, and it is converted into mirror in proportion
The sample rate current of picture, its output end exports the input of sample rate current to the current comparison circuit；
Current comparison circuit, including a current source I0With the electric current being made up of the 3rd NMOS tube M8 and the 4th NMOS tube M9
Mirror, the current comparison circuit by sample rate current by after current mirror mirror image with current source I0Electric current be compared, controlled
Voltage V processedCExport being switched on and off for the pull-up circuit control pull-up circuit；
Pull-up circuit, is made up of trombone slide M10 on, and the upper trombone slide M10 is PMOS, the grid conduct of upper trombone slide M10
The input of pull-up circuit connects the output end of the current comparison circuit, and its drain electrode is low as the output end connection of pull-up circuit
The grid end voltage of the grid control power tube M11 of pressure difference linear voltage regulator power tube M11, its source electrode meets supply voltage VDD.
Specifically, the current sampling circuit includes the first PMOS M1, the second PMOS M2, the 3rd PMOS M3, the
Four PMOS M4, the 5th PMOS M5, the first NMOS tube M6 and the second NMOS tube M7,
The grid phase of the grid of the first PMOS M1 and the second PMOS M2 and low pressure difference linear voltage regulator power tube M11
Even, its source electrode all meets supply voltage VDD, and the drain electrode of the first PMOS M1 connects the source electrode of the 5th PMOS M5, the second PMOS M2
Drain electrode connect the source electrode of the 3rd PMOS M3, the drain electrode of the 3rd PMOS M3 as the current sampling circuit output end；
The drain electrode of the source electrode connection low pressure difference linear voltage regulator power tube M11 of the 4th PMOS M4, its grid and drain electrode are short
Connect and connect the drain electrode of the grid and the first NMOS tube M6 of the 3rd PMOS M3 and the 5th PMOS M5；
The grid of the second NMOS tube M7 and drain electrode short circuit are simultaneously connected draining and the first NMOS tube M6 for the 5th PMOS M5
The source ground of grid, the first NMOS tube M6 and the second NMOS tube M7.
Specifically, input of the drain electrode of the 3rd NMOS tube M8 as the current comparison circuit, the 3rd NMOS tube
The grid and drain electrode short circuit of M8 and the grid of the 4th NMOS tube M9 of connection, drain electrode and the current source I of the 4th NMOS tube M90One end
It is connected and as the output end of the current comparison circuit, the source ground of the 3rd NMOS tube M8 and the 4th NMOS tube M9, electric current
Source I0Another termination supply voltage VDD.
Specifically, the size of the first PMOS M1 and the second PMOS M2 is identical, the 3rd PMOS M3, the 4th PMOS
The size of pipe M4 and the 5th PMOS M5 is identical, and the size of the first NMOS tube M6 and the second NMOS tube M7 is identical.
Specifically, the ratio between the sample rate current and the electric current for flowing through power tube M11 in low pressure difference linear voltage regulator are second
The ratio between breadth length ratio of PMOS M2 and power tube M11.
Specifically, by adjusting current source I0Size required current threshold is set.
Beneficial effects of the present invention are：3rd PMOS M3, the 4th PMOS M4, the 5th PMOS in current sampling circuit
M5, the first NMOS tube M6 and the second NMOS tube M7 ensure that the drain terminal voltage and low pressure difference linear voltage regulator work(of current sample pipe M2
The drain terminal voltage of rate pipe M11 is equal, eliminates the error of the sampling pipe image current that channel-length modulation brings, and reduces
The electric current that current sampling circuit is adopted and the excessive problem of ideal value deviation, improve low pressure difference linear voltage regulator LDO overcurrent protections
The current sample accuracy of circuit so that the unlatching threshold value of low pressure difference linear voltage regulator LDO current foldback circuits is more accurate.
Brief description of the drawings
Fig. 1 is a kind of conventional low difference linear constant voltage regulator LDO current foldback circuit figures.
Fig. 2 is the high-precision overcurrent protection circuit figure for low pressure difference linear voltage regulator LDO proposed by the present invention.
Fig. 3 is that the current sample module of the current foldback circuit for low pressure difference linear voltage regulator proposed by the present invention is specific
Circuit diagram.
Fig. 4 is that the electric current of the current foldback circuit for low pressure difference linear voltage regulator proposed by the present invention compares and upper drawing-die
Block physical circuit figure.
Specific embodiment
For the technical problem, technical scheme and the advantage that to be solved embodiments of the invention are clearer, below in conjunction with
Drawings and the specific embodiments are described in detail.
Current sampling circuit for low pressure difference linear voltage regulator proposed by the invention, exists particular for MOSFET
The problem that channel-length modulation causes sampling inaccurate proposes solution, there is provided one kind can suppress channel length
The high-precision overcurrent protection circuit for low pressure difference linear voltage regulator LDO of mudulation effect.
A kind of high-precision overcurrent protection circuit for low pressure difference linear voltage regulator LDO that the present invention is provided, such as Fig. 2 institutes
Show, including：Current sampling circuit, current comparison circuit and pull-up circuit.
Current sampling circuit, the output of accurate mirror image low pressure difference linear voltage regulator LDO power tubes is electric according to a certain percentage
Stream, is supplied to current comparison circuit to make comparisons sample rate current.
Current comparison circuit, the current mirror for first obtaining current sampling circuit is once, then electric by the electric current and one
Stream source I0Fixed current compare, obtain control pull-up circuit control voltage VC。
Pull-up circuit, in low pressure difference linear voltage regulator LDO output overcurrents, in the control that current comparison circuit is given
Voltage VCUnder effect, the grid end voltage of low pressure difference linear voltage regulator power tube is pulled up, reduce the electric current of power tube output.
Sample circuit proposed by the present invention is as shown in Figure 3：Including the first PMOS M1, the second PMOS M2, the 3rd PMOS
Pipe M3, the 4th PMOS M4, the 5th PMOS M5, the first NMOS tube M6 and the second NMOS tube M7, the first PMOS M1 and second
The source electrode of PMOS M2 all meets supply voltage VDD, and grid of its grid all with low pressure difference linear voltage regulator power tube M11 is connected,
For the electric current of sampled power pipe M11 by a certain percentage, the drain electrode of the first PMOS M1 connects the source electrode of the 5th PMOS M5, second
The drain electrode of PMOS M2 connects the source electrode of the 3rd PMOS M3, for ensureing the drain voltage V of the second PMOS M2BWith low voltage difference line
The drain voltage Vout of property voltage-stablizer power tube M11 is equal；The drain electrode of the 3rd PMOS M3 is used as the current sampling circuit
Output end；4th PMOS M4 and the 5th PMOS M5 composition p-type current mirrors, the source electrode of the 4th PMOS M4 is used as the electric current
The drain electrode of the input connection low pressure difference linear voltage regulator power tube M11 of sample circuit, its grid and drain electrode short circuit and connection the
The drain electrode of the grid and the first NMOS tube M6 of three PMOS M3 and the 5th PMOS M5；First NMOS tube M6 and the second NMOS tube
M7 constitutes N-type current mirror, and the grid of the second NMOS tube M7 short circuit and is connected the drain electrode and first of the 5th PMOS M5 with draining
The source ground of the grid of NMOS tube M6, the first NMOS tube M6 and the second NMOS tube M7.
Wherein, the size of the first PMOS M1 and the second PMOS M2 is identical, the 3rd PMOS M3, the 4th PMOS M4 and
The size of the 5th PMOS M5 is identical, and the size of the first NMOS tube M6 and the second NMOS tube M7 is identical, and sampling pipe is the 2nd PMOS
Pipe M2.
The current source of the 4th PMOS M4 and the first NMOS tube M6 branch roads in low pressure difference linear voltage regulator LDO output ends,
The electric current of the electric current of the first PMOS M1 branch roads and the second PMOS M2 branch roads is pressed for low pressure difference linear voltage regulator LDO output currents
The electric current of certain proportion mirror image.Due to all being the same size for mirror image pipe, the electric current of this three branch roads is equal, i.e. I1=I2=I3, and
There is VGS3=VGS4=VGS5, wherein I1、I2、I3Represent respectively and flow through the 4th PMOS M4, the 5th PMOS M5 and the 3rd PMOS
The electric current of M3, VGS3、VGS4、VGS5Represent the 3rd PMOS M3, the gate source voltage of the 4th PMOS M4 and the 5th PMOS M5.
Second PMOS M2 drain terminal voltages：
VB=Vout- | VGS4|+|VGS3|=Vout (2)
The drain terminal voltage V of the second PMOS M2 pipes is can be seen that from (2) formulaBElectricity is exported with low pressure difference linear voltage regulator LDO
Pressure is equal.Now the grid end of the second PMOS M2, source, drain terminal voltage are identical with low pressure difference linear voltage regulator LDO power tubes,
Eliminate channel-length modulation, the size of current of the power tube that the second PMOS M2 is replicated by a certain percentage is only with second
PMOS M2 is relevant with the breadth length ratio of power tube M11, by the ratio between the breadth length ratio control for adjusting the second PMOS M2 and power tube M11
The ratio between output current of sample rate current processed and low pressure difference linear voltage regulator LDO, so as to realize adopting the accurate of power tube current
Sample.
As shown in figure 4, current comparison circuit includes a current source I0With the 3rd NMOS tube M8 and the of composition N-type current mirror
Four NMOS tube M9, pull-up circuit is made up of upper trombone slide M10.The drain electrode of the 3rd NMOS tube M8 is used as the defeated of the current comparison circuit
Enter end, the grid and drain electrode short circuit of the 3rd NMOS tube M8 and the grid of the 4th NMOS tube M9 of connection, the drain electrode of the 4th NMOS tube M9
With current source I0One end be connected and as the output end of the current comparison circuit, the 3rd NMOS tube M8 and the 4th NMOS tube M9
Source ground, current source I0Another termination supply voltage VDD；The grid of upper trombone slide M10 as pull-up circuit input
The output end of the current comparison circuit is connected, its drain electrode connects low pressure difference linear voltage regulator work(as the output end of pull-up circuit
The grid of rate pipe M11, its source electrode meets supply voltage VDD.
Constitute the electric current I that the 3rd NMOS tube M8 and the 4th NMOS tube M9 of current mirror will be sampled3It is mirrored to the 4th NMOS
Branch road where pipe M9, and with the fixed current I of current source0Compare, obtain controlling the control voltage V of pull-up circuit grid voltageC。
When low pressure difference linear voltage regulator LDO output currents are smaller, sample rate current I3Less than fixed current I0, now control voltage VCFor
One high level, trombone slide M10 shut-offs in control, current foldback circuit does not influence the normal work of low pressure difference linear voltage regulator LDO.
As low pressure difference linear voltage regulator LDO output currents increase, sample rate current I3Become big, VCBegin to decline.When low pressure difference linearity voltage stabilizing
During device LDO output overcurrents, VCDrop to so that upper trombone slide M10 is turned on, and starts to pull up low pressure difference linear voltage regulator LDO power tubes
Grid end voltage, now current foldback circuit start to replace the feedback loop of low pressure difference linear voltage regulator LDO to control power
Pipe M11, prevents the further increase of low pressure difference linear voltage regulator LDO output currents, realizes overcurrent protection function.Due to sampling electricity
Stream I3With current source I0Magnitude relationship directly determine whether overcurrent protection function is opened, therefore can be by reasonable selection electric current
Source I0Size required current threshold is set.
The operation principle of embodiment is as follows：
As shown in Fig. 2 M3-M7 ensure that the drain terminal voltage and low pressure difference linear voltage regulator power tube of current sample pipe M2
The drain terminal voltage of M11 is equal, eliminates the error of the sampling pipe image current that channel-length modulation brings；Then the sampling
Electric current is used to and current source I0Fixed current compare, obtain controlling the grid end control voltage V of trombone slide M10C；Work as sampling
It is a voltage higher when electric current is less than set current threshold, trombone slide M10 shut-offs in control；When sample rate current is more than set
During current threshold, control voltage VCIt is a relatively low voltage, trombone slide M10 is opened in control, pulls up low pressure difference linear voltage regulator
The grid voltage of LDO power tubes M11, the output current of low pressure difference linear voltage regulator LDO is controlled instead of error amplifier feedback control loop,
The further increase of electric current is prevented, plays a part of overcurrent protection.
The above is one embodiment of the present invention, it is noted that for those skilled in the art
For, on the premise of principle of the present invention is not departed from, some improvements and modifications can also be made, these improvements and modifications
Should be regarded as protection scope of the present invention.
Claims (5)
1. a kind of current foldback circuit for low pressure difference linear voltage regulator, it is characterised in that including current sampling circuit, electric current
Comparison circuit and pull-up circuit,
Current sampling circuit, the drain-to-gate voltage of power tube (M11) in sampling low pressure difference linear voltage regulator, and it is converted into mirror in proportion
The sample rate current of picture, its output end exports the input of sample rate current to the current comparison circuit；
Current comparison circuit, including a current source (I0) and the electric current that is made up of the 3rd NMOS tube (M8) and the 4th NMOS tube (M9)
Mirror, the current comparison circuit by sample rate current by after current mirror mirror image with current source (I0) electric current be compared, obtain
Control voltage (VC) export being switched on and off to pull-up circuit control pull-up circuit；
Pull-up circuit, is made up of trombone slide (M10) on, and the upper trombone slide (M10) is PMOS, and the grid of upper trombone slide (M10) is made
For the input of pull-up circuit connects the output end of the current comparison circuit, its drain electrode is connected as the output end of pull-up circuit
The grid end voltage of grid control power tube (M11) of low pressure difference linear voltage regulator power tube (M11), its source electrode connects supply voltage
(VDD)。
2. the current foldback circuit for low pressure difference linear voltage regulator according to claim 1, it is characterised in that the electricity
Stream sample circuit includes the first PMOS (M1), the second PMOS (M2), the 3rd PMOS (M3), the 4th PMOS (M4), the
Five PMOSs (M5), the first NMOS tube (M6) and the second NMOS tube (M7),
The grid phase of the grid of the first PMOS (M1) and the second PMOS (M2) and low pressure difference linear voltage regulator power tube (M11)
Even, its source electrode all connects supply voltage (VDD), and the drain electrode of the first PMOS (M1) connects the source electrode of the 5th PMOS (M5), second
The drain electrode of PMOS (M2) connects the source electrode of the 3rd PMOS (M3), and the drain electrode of the 3rd PMOS (M3) is used as current sample electricity
The output end on road；
The drain electrode of source electrode connection low pressure difference linear voltage regulator power tube (M11) of the 4th PMOS (M4), its grid and drain electrode are short
Connect and connect the drain electrode of the grid and the first NMOS tube (M6) of the 3rd PMOS (M3) and the 5th PMOS (M5)；
The grid of the second NMOS tube (M7) and drain electrode short circuit are simultaneously connected drain electrode and first NMOS tube (M6) of the 5th PMOS (M5)
Grid, the source ground of the first NMOS tube (M6) and the second NMOS tube (M7).
3. the current foldback circuit for low pressure difference linear voltage regulator according to claim 1, it is characterised in that described
The drain electrode of three NMOS tubes (M8) as the current comparison circuit input, the grid of the 3rd NMOS tube (M8) and drain electrode short circuit
And the grid of the 4th NMOS tube (M9) of connection, drain electrode and the current source (I of the 4th NMOS tube (M9)0) one end be connected and as institute
State the source ground of the output end of current comparison circuit, the 3rd NMOS tube (M8) and the 4th NMOS tube (M9), current source (I0)
Another termination supply voltage (VDD).
4. current sampling circuit according to claim 2, it is characterised in that first PMOS (M1) and the 2nd PMOS
The size for managing (M2) is identical, and the 3rd PMOS (M3), the 4th PMOS (M4) are identical with the size of the 5th PMOS (M5), and first
NMOS tube (M6) is identical with the size of the second NMOS tube (M7).
5. the current foldback circuit for low pressure difference linear voltage regulator according to claim 1, it is characterised in that described to adopt
The ratio between sample electric current and the electric current for flowing through power tube (M11) in low pressure difference linear voltage regulator are the second PMOS (M2) and power tube
(M11) the ratio between breadth length ratio.
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| CN201710012599.4A CN106774595A (en) | 2017-01-09 | 2017-01-09 | A kind of current foldback circuit for low pressure difference linear voltage regulator |
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| CN201710012599.4A CN106774595A (en) | 2017-01-09 | 2017-01-09 | A kind of current foldback circuit for low pressure difference linear voltage regulator |
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| CN115951752A (en) * | 2023-03-13 | 2023-04-11 | 唯捷创芯(天津)电子技术股份有限公司 | Low dropout regulator with overcurrent protection, chip and electronic equipment |
| CN115963882A (en) * | 2022-12-30 | 2023-04-14 | 南京微盟电子有限公司 | Current-limiting control circuit of linear voltage stabilizer |
| CN116414175A (en) * | 2023-05-31 | 2023-07-11 | 合肥乘翎微电子有限公司 | Current-limiting protection circuit for low-dropout linear voltage regulator and linear voltage regulator |
| CN116774766A (en) * | 2023-07-26 | 2023-09-19 | 北京中科格励微科技有限公司 | High-voltage output linear voltage stabilizer circuit with current limiting protection function |
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Application publication date: 20170531 |