CN109842389B

CN109842389B - Radio frequency power amplifier and power control circuit thereof

Info

Publication number: CN109842389B
Application number: CN201711209924.2A
Authority: CN
Inventors: 陈文斌; 李啸麟; 韩克武; 方俊平; 刘刚
Original assignee: RDA Microelectronics Shanghai Co Ltd
Current assignee: RDA Microelectronics Shanghai Co Ltd
Priority date: 2017-11-28
Filing date: 2017-11-28
Publication date: 2023-08-22
Anticipated expiration: 2037-11-28
Also published as: CN109842389A

Abstract

The application discloses a power control circuit of a radio frequency power amplifier, which mainly comprises a low-dropout voltage regulator, two current sources and two current comparators. The low dropout voltage regulator outputs a supply voltage and/or a supply current to supply power to the power transistor according to the control voltage. The first current source generates a first reference current. The second current source generates a second reference current. The first current comparator generates a mirror current which is proportional to the supply current. The first current comparator outputs current to or draws current from the low dropout voltage regulator according to a comparison result of the first mirror current and the first reference current. And a second mirror current proportional to the supply current is generated in the second current comparator. And the second current comparator outputs current to the low-dropout voltage regulator according to the comparison result of the second mirror current and the second reference current. Aiming at antenna end impedance mismatch, the application improves the output power flatness of the radio frequency power amplifier on one hand and avoids the damage of the transistor by large current on the other hand.

Description

Radio frequency power amplifier and power control circuit thereof

Technical Field

The present application relates to a radio frequency power amplifier, and more particularly, to a power control circuit of a radio frequency power amplifier.

Background

A typical power amplifier, which maintains a substantially constant gain, outputs power proportional to input power, is referred to as a linear power amplifier. If the power transistor therein is a bipolar transistor (BJT), the power transistor operates in an amplifying (active) region.

There is a type of power amplifier whose output power is mainly determined by the bias voltage and/or bias current of the collector and/or base of the power transistor, which is called a saturated power amplifier. If the power transistor therein is a bipolar transistor, the power transistor operates in a saturation (saturation) region. The saturated power amplifier comprises a power control circuit for adjusting the bias voltage and/or bias current provided to the power transistor according to the control signal, thereby adjusting the output power of the power transistor.

Referring to fig. 1, a saturated power amplifier mainly comprises an amplifying circuit 1, a power control circuit 2 and an output matching circuit 3. The amplifying circuit 1 comprises one or more cascaded power transistors 11 to 13. The power transistors 11 to 13 are, for example, bipolar transistors, field Effect Transistors (FETs), MOS transistors (MOSFETs), pseudomorphic high electron mobility transistors (pHEMT), etc., for performing an amplifying function on the radio frequency input signal RFin. The power control circuit 2 is configured to generate a supply voltage Vout related to the magnitude of the control voltage Vramp from the control voltage Vramp, the supply voltage Vout supplying power to the power transistors 11 to 13 in the amplifying circuit 1. The control voltage Vramp determines the output voltage Vout of the power control circuit 2, i.e. the supply voltage Vout of the power transistors 11 to 13 in the amplifying circuit 1, and thus the output power of the GSM power amplifier. The output matching circuit 3 is used for performing impedance matching on the radio frequency signal output by the amplifying circuit 1 and outputting a radio frequency output signal RFout.

Referring to fig. 2, a conventional power control circuit 2 is implemented by only one low dropout regulator (Low Dropout regulator, LDO) 21. The low dropout regulator 21 is composed of an operational amplifier OPA, a PMOS tube P1, and two resistors R1 and R2. The control voltage Vramp is connected with the inverting input end of the operational amplifier OPA, and the output end of the operational amplifier OPA is connected with the grid electrode of the PMOS tube P1. The FB node between the first resistor R1 and the second resistor R2 is connected with the non-inverting input end of the operational amplifier OPA. The PMOS tube I P1, the resistor I R1 and the resistor II R2 are sequentially cascaded between the power supply voltage Vdd and the ground. The source of the PMOS tube P1 is connected with the power supply voltage Vdd. The drain electrode of the PMOS tube P1 is connected with the resistor R1 and is also used as the output end of the low-dropout voltage regulator 21 and the output end of the whole power control circuit. The output terminal outputs a supply voltage Vout, for example, for supplying the collector of the power transistor 11 in the amplifying circuit 1 and/or an output supply current Iout, for example, for supplying the base of the power transistor 11 in the amplifying circuit 1, which power transistor 11 is here assumed to be a bipolar transistor. It is assumed that the output terminal provides the collector of the power transistor with the supply voltage Vout, vout= (1+r1/R2) ·vramp, so the output voltage Vout of the low dropout regulator 21 is determined only by the control voltage Vramp and the resistances of the two resistors R1 and R2.

A radio frequency power amplifier in the mobile terminal is used to power amplify the modulated radio frequency signal to be transmitted and then feed it to the antenna for transmission. A common GSM power amplifier is a saturated power amplifier. At present, the GSM power amplifier also needs to be switched between a saturated state and a linear state in consideration of compatibility with linear systems such as EDGE, TD-SCDMA, and TDD-LTE. The linearity of a radio frequency power amplifier is directly related to the process of the transistors inside the amplifier, and the linearity and reliability have a trade-off relationship. If linearity is to be improved, the internal transistors need to be properly sacrificed in reliability in the selection process, and in this context, the power control circuit is required to have high reliability to compensate for the reliability lost by the amplifying circuit.

The rated impedance of the antenna end load of a mobile terminal is typically 50 ohms. In a practical environment, however, the antenna end load is not ideally 50 ohms, but rather an impedance mismatch may occur. When the impedance of the antenna end load is smaller, the output power of the radio frequency power amplifier becomes larger, so that the current becomes larger, and the amplifying circuit is easily burnt. Conversely, when the impedance of the antenna end load is larger, the output power of the radio frequency power amplifier is smaller than the rated power, and the antenna emission requirement is difficult to meet. The GSM system has a requirement for the flatness of the transmitting power, and when the actual load of the antenna end is in impedance mismatch, the output power of the radio frequency power amplifier cannot deviate too much. The existing power control circuit shown in fig. 2 cannot detect and process impedance mismatch, which makes it difficult to protect the safety of the rf power amplifier and make the rf power amplifier meet the requirement of the system on power flatness.

Referring to fig. 3, a simulation graph of the supply voltage Vout, the supply current Iout, the output power Pout and the output load Rload of the conventional power control circuit at low power in the output of the rf power amplifier is shown. Assuming that the rated output load of the rf power amplifier at the antenna end is 50Ω, and the rated output load at the output end of the amplifying circuit 1 after impedance matching by the output matching circuit 3 is 2Ω, when the output load becomes small in impedance due to mismatch, the supply current Iout will become large while the supply voltage Vout remains unchanged, which makes the output power Pout of the rf power amplifier suddenly become large. When the output load becomes large in impedance due to mismatch, the supply current Iout becomes small while the supply voltage Vout remains unchanged, which also makes the output power Pout of the radio frequency power amplifier drastically small. Therefore, the existing power control circuit cannot guarantee the power flatness of the radio frequency power amplifier.

Referring to fig. 4, a simulation graph of the supply voltage Vout, the supply current Iout, and the output load Rload of the conventional power control circuit under the high output power of the rf power amplifier is shown. Assuming that the rated output load of the radio frequency power amplifier at the antenna end is 50Ω, and the rated output load at the output end of the amplifying circuit 1 is 2Ω after impedance matching by the output matching circuit 3, when the output load becomes smaller in impedance due to mismatch, the supply current Iout will become larger, and simultaneously the supply voltage Vout will become smaller slowly, which makes the rising amplitude of the supply current Iout larger, and it is difficult to protect the transistor from being burned by a large current.

In order to provide protection for the rf power amplifier, some existing power control circuits are proposed.

Another power control circuit is provided in the chinese patent application of the application, rf power amplifier hybrid power control system and method, with application publication No. CN102013876a and application publication No. 2011, 4 and 13. The base current provided to the power transistor is detected by a detection resistor and converted into a voltage, and the voltage is compared with a control voltage so as to adjust the base current provided to the power transistor. The disadvantage of this solution is that the detection accuracy is directly determined by the detection resistor, but the resistance accuracy is limited by the process, the resistance of which varies with the process. At the same time, the introduction of the detection resistor will change the gain of the power control circuit, resulting in a deterioration of the switching spectrum of the radio frequency power amplifier.

In the Chinese patent application with publication number CN104617886A and publication date 2015, 5 and 13, a power control method and circuit for improving the switching spectrum of a power amplifier are provided. The dynamic current source is added on the basis of the linear voltage stabilizing circuit, so that a voltage difference exists between the output voltage of the linear voltage stabilizing circuit and the power supply voltage, the output voltage of the linear voltage stabilizing circuit is ensured not to be too high, and the radio frequency power amplifier is protected. The disadvantage of this solution is that the voltage difference is applied to the pass element of the linear voltage regulator circuit, resulting in heat loss, which reduces the efficiency of the rf power amplifier. Meanwhile, the output voltage of the linear voltage stabilizing circuit is forcedly reduced, so that the maximum output power of the radio frequency power amplifier is reduced, which is an unacceptable disadvantage for a GSM power amplifier working at high power.

Disclosure of Invention

The application aims to solve the technical problem of providing a power control circuit of a radio frequency power amplifier, which can ensure the power flatness of the radio frequency power amplifier and protect a transistor from being burnt by high current. The application also provides a radio frequency power amplifier comprising the power control circuit.

In order to solve the technical problems, the application provides a power control circuit of a radio frequency power amplifier, which mainly comprises a low dropout voltage regulator, two current sources and two current comparators. The low dropout voltage regulator outputs a supply voltage and/or a supply current according to the control voltage to power a power transistor in the radio frequency power amplifier. The first current source generates a first reference current. The second current source generates a second reference current. The first current comparator comprises a second transistor, the second transistor and the first transistor in the low-dropout voltage regulator form a first current mirror, and the first current mirror generates a first mirror current proportional to the supply current. The first current comparator outputs current to or draws current from the low dropout voltage regulator according to a comparison result of the first mirror current and the first reference current. The second current comparator comprises a third transistor, the third transistor and the first transistor in the low-dropout voltage regulator form a second current mirror, and the second current mirror generates a second mirror current proportional to the supply current. And the second current comparator outputs current to the low-dropout voltage regulator according to the comparison result of the second mirror current and the second reference current. The first embodiment of the application respectively solves the two problems of improving the power flatness and protecting the transistor from being burnt by large current through two current comparators.

Further, when the mirror current I is smaller than the reference current I, the current comparator I draws current from the low dropout voltage regulator, raising the supply voltage. When the mirror current I is larger than the reference current I, the current comparator outputs current to the low dropout voltage regulator, and the power supply voltage is reduced. This is an implementation of the current comparator of the present application that improves power flatness.

Further, when the mirror current II is larger than the reference current II, the current comparator outputs current to the low dropout voltage regulator, and the power supply voltage is reduced. When the mirror current II is smaller than the reference current II, the current comparator II outputs current to the low-dropout voltage regulator and draws current from the low-dropout voltage regulator. This is an implementation of the current comparator second protection transistor of the present application.

Preferably, the low dropout voltage regulator consists of an operational amplifier, a PMOS tube I, a resistor I and a resistor II; the control voltage is connected with the inverting input end of the operational amplifier, and the output end of the operational amplifier is connected with the grid electrode of the PMOS tube I; the FB node between the first resistor and the second resistor is connected with the non-inverting input end of the operational amplifier; the PMOS tube I, the resistor I and the resistor II are sequentially cascaded between the power supply voltage and the ground; the source electrode of the PMOS tube I is connected with the power supply voltage; the drain electrode of the PMOS tube I is connected with the resistor I and is used as the output end of the low-dropout voltage regulator and is also the output end of the whole power control circuit. This is an implementation circuit of the low dropout voltage regulator of the present application, which can be used to provide a bias voltage (supply voltage) and/or a bias current (supply current) for the collector and/or base of the transistor of the radio frequency power amplifier.

Preferably, the first current comparator at least comprises a second PMOS tube, and the second PMOS tube and the first PMOS tube form a first current mirror; the output end of the operational amplifier is connected with the grid electrode of the PMOS tube II; the source electrode of the PMOS tube II is connected with the power supply voltage; the drain electrode of the PMOS tube II outputs mirror current I; the output end of the first current comparator is fed back to the low dropout voltage regulator. This is an implementation circuit of the current comparator one of the present application.

Preferably, the second current comparator at least comprises a third PMOS tube, and the third PMOS tube and the first PMOS tube form a second current mirror; the output end of the operational amplifier is connected with the grid electrode of the PMOS tube III; the source electrode of the PMOS tube III is connected with a power supply voltage; the drain electrode of the PMOS tube III outputs mirror current II; the output end of the second current comparator is fed back to the low-dropout voltage regulator. This is an implementation circuit of the current comparator two of the present application.

Preferably, the size of the third PMOS transistor is larger than the size of the second PMOS transistor. Thus, the current comparator is mainly used for controlling the situation that the voltage is low, namely the output power of the radio frequency power amplifier is low; the second current comparator is mainly used for controlling the situation that the voltage is higher, namely the output power of the radio frequency power amplifier is higher.

Further, the first current comparator further includes a third current mirror for generating a third mirror current proportional to the reference current. The first current comparator outputs current to the low-dropout voltage regulator or extracts current from the low-dropout voltage regulator according to the comparison result of the first image current and the third image current. The second current comparator also comprises a fourth current mirror for generating a fourth mirror current which is proportional to the reference current. The second current comparator generates a second compensation current according to the comparison result of the second mirror current and the fourth mirror current. The second current comparator also comprises a fifth current mirror and a sixth current mirror, the second compensation current is subjected to the fifth current mirror and the sixth current mirror to obtain a third compensation current, and the third compensation current outputs current to the low-dropout voltage regulator. This is the second embodiment of the present application, which gives an implementation of two current comparators.

Further, when the mirror current I is smaller than the mirror current III, the current comparator I draws current from the low dropout voltage regulator, thereby improving the supply voltage. When the mirror current I is larger than the mirror current III, the current comparator outputs current to the low dropout voltage regulator, and the power supply voltage is reduced. This is yet another implementation of the current comparator of the present application to improve power flatness.

Further, when the mirror current II is smaller than the mirror current IV, the current comparator II does not output current to the NMOS tube III, so that the difference value between the mirror current II and the mirror current IV is compensated without influencing the low dropout voltage regulator, and the current passing through the NMOS tube II is equal to the mirror current IV. When the mirror current II is larger than the mirror current IV, the current comparator II outputs compensation current II from the node B to the NMOS tube III; and the compensation current II sequentially passes through the current mirror five and the current mirror six and then outputs the compensation current III to the low-dropout voltage regulator. This is yet another implementation of the current comparator second protection transistor of the present application.

Preferably, the first current comparator is composed of a PMOS tube II, an NMOS tube five and an NMOS tube six; the first current source and the fifth NMOS tube are sequentially cascaded between the power supply voltage and the ground, and the reference current output by the first current source flows through the fifth NMOS tube; the PMOS tube II and the NMOS tube III are sequentially cascaded between the power supply voltage and the ground; the node A between the PMOS tube II and the NMOS tube III is fed back to the low dropout voltage regulator; the PMOS tube II and the PMOS tube I form a current mirror I, and mirror current I is output to the node A; the NMOS tube five and the NMOS tube six form a current mirror three, and the NMOS tube six flows through a mirror current three. This is a specific implementation of the current comparator one of the present application.

Preferably, the second current comparator is composed of a third PMOS tube, four NMOS tubes and two PMOS tubes; the second current source and the first NMOS tube are sequentially cascaded between the power supply voltage and the ground, and the reference current output by the second current source flows through the first NMOS tube; the PMOS tube III and the NMOS tube II are sequentially cascaded between the power supply voltage and the ground; the node B is called between the PMOS tube III and the NMOS tube II and is connected with the NMOS tube III; the third PMOS tube and the first PMOS tube form a second current mirror, and the second mirror current is output to the node B; the NMOS tube I and the NMOS tube II form a current mirror IV, and the NMOS tube II flows through a mirror current IV; the NMOS tube III and the NMOS tube IV form a current mirror V; the PMOS tube IV and the PMOS tube V form a current mirror VI; the node B sequentially feeds back to the low-dropout voltage regulator after passing through the fifth current mirror and the sixth current mirror. This is a circuit embodying the second current comparator of the present application.

The radio frequency power amplifier provided by the application comprises the power control circuit, an amplifying circuit and an output matching circuit. The amplifying circuit comprises one or more cascaded power transistors and is used for amplifying the radio frequency input signal; the power control circuit generates a supply voltage according to the control voltage to supply power to a power transistor in the amplifying circuit. The output matching circuit performs impedance matching on the radio frequency signal output by the amplifying circuit.

The application has the technical effects that: aiming at the situation of antenna end impedance mismatch, on one hand, the output power flatness of the radio frequency power amplifier is improved, and on the other hand, the transistor is prevented from being damaged by high current.

Drawings

Fig. 1 is a block schematic diagram of a GSM power amplifier.

Fig. 2 is a schematic circuit diagram of a conventional power control circuit.

Fig. 3 is a schematic diagram of a variation curve of output voltage, output current and output power of the power control circuit shown in fig. 2 with load at low and medium power.

Fig. 4 is a schematic diagram of a variation curve of output voltage and output current of the power control circuit shown in fig. 2 with load at high power.

Fig. 5 is a schematic circuit diagram of a first embodiment of a power control circuit according to the present application.

Fig. 6 is a circuit diagram of a second embodiment of the power control circuit of the present application.

Fig. 7 is a schematic diagram of a variation curve of output voltage, output current and output power with load of the power control circuit of the present application under medium and low power.

Fig. 8 is a schematic diagram of a variation curve of output voltage and output current with load of the power control circuit of the present application under high power.

The reference numerals in the drawings illustrate: 1 is an amplifying circuit; 11 to 13 are power transistors; 2 is a power control circuit; 21 is a low dropout regulator; 22. 23 is a current source; 24. 25 is a current comparator; 3 is an output matching circuit; RFin is a radio frequency input signal; RFout is a radio frequency output signal; vramp is the control voltage; vout is the supply voltage; iout is supply current or compensation current; vdd is the supply voltage; OPA is an operational amplifier; p is a PMOS transistor; n is an NMOS transistor; r is a resistor; idet is the mirror current; iref is the reference current.

Detailed Description

Referring to fig. 5, an embodiment of a power control circuit of a radio frequency power amplifier is provided. It mainly consists of a low dropout regulator 21, two current sources 22 and 23, two current comparators 24 and 25.

The low dropout regulator 21 is composed of an operational amplifier OPA, a first PMOS transistor P1, a first resistor R1 and a second resistor R2. The control voltage Vramp is connected with the inverting input end of the operational amplifier OPA, and the output end of the operational amplifier OPA is connected with the grid electrode of the PMOS tube P1. The FB node between the first resistor R1 and the second resistor R2 is connected with the non-inverting input end of the operational amplifier OPA. The PMOS tube I P1, the resistor I R1 and the resistor II R2 are sequentially cascaded between the power supply voltage Vdd and the ground. The source of the PMOS tube P1 is connected with the power supply voltage Vdd. The drain electrode of the PMOS tube P1 is connected with the resistor R1 and is also used as the output end of the low-dropout voltage regulator 21 and the output end of the whole power control circuit. The output terminal outputs a supply voltage Vout, for example, for supplying the collector of the power transistor 11 in the amplifying circuit 1 and/or an output supply current Iout, for example, for supplying the base of the power transistor 11 in the amplifying circuit 1, which power transistor 11 is here assumed to be a bipolar transistor. Let it be assumed that the output terminal provides the collector of the power transistor with a supply voltage Vout, vout= (1+r1/R2) ·vramp.

The first current source 22 outputs a reference current Iref1 to a first current comparator 24.

The second current source 23 outputs a reference current Iref2 to the second current comparator 25.

The first current comparator 24 at least comprises a second PMOS transistor P2, and the second PMOS transistor P2 and the first PMOS transistor P1 form a first current mirror. The output end of the operational amplifier OPA is connected with the grid electrode of the PMOS tube P2. The source of the PMOS tube II P2 is connected with the power supply voltage Vdd. The drain electrode of the PMOS tube P2 outputs mirror current Idet1. The dimension ratio of the second PMOS tube P2 to the first PMOS tube P1 is TP2: TP1, typically TP1 is much greater than TP2, i.e. TP1 is greater than or equal to 10 times TP2. The second PMOS tube P2 samples the current Iout flowing through the first PMOS tube P1 according to the proportion to obtain the mirror current Idet1= (TP 2/TP 1) & Iout. The output end of the first current comparator 24 is fed back to the FB node of the low dropout regulator 21. The first current comparator 24 extracts the compensation current one Iout1 from the FB node in the low dropout regulator 21 or outputs the compensation current one Iout1 to the FB node in the low dropout regulator 21 according to the comparison result of the input mirror current one Idet1 and the reference current one Iref1.

When the mirror current Idet1 is less than the reference current Iref1, the current comparator 24 draws current from the FB node, the compensation current being drawn, iout 1=Idet1-Iref1. At this time, iout1 is negative and has a magnitude of Iref1-Idet1. At this time, the supply voltage vout= (1+r1/r2) ·vramp-iout1·r1, i.e., the first current comparator 26 raises the supply voltage Vout.

When the mirror current one Idet1 is greater than the reference current one Iref1, the current comparator one 24 outputs a current to the FB node, and the output compensation current one iout1=idet1-Iref 1. At this time Iout1 is positive. At this time, the supply voltage vout= (1+r1/R2) ·vramp-iout1·r1, i.e., the first current comparator 24 decreases (or limits) the supply voltage Vout.

The second current comparator 25 at least comprises a third PMOS transistor P3, and the third PMOS transistor P3 and the first PMOS transistor P1 form a second current mirror. The output end of the operational amplifier OPA is connected with the grid electrode of the PMOS tube three P3. The source of the PMOS transistor three P3 is connected with the power supply voltage Vdd. The drain electrode of the PMOS tube III P3 outputs mirror current II Idet2. The size ratio of the third P2 PMOS tube to the first P1 PMOS tube is TP3: TP1, typically TP1 is much greater than TP3, i.e. TP1 is greater than or equal to 10 times TP3. The PMOS tube three P3 samples the current Iout flowing through the PMOS tube one P1 according to the proportion, and the mirror current two Idet2= (TP 3/TP 1) & Iout is obtained. The output end of the second current comparator 25 is fed back to the FB node of the low dropout regulator 21. The second current comparator 25 outputs a compensation current two Iout2 to the FB node in the low dropout regulator 21 according to the comparison result of the input mirror current two Idet2 and the reference current two Iref2, and the second current comparator 25 does not draw current from the FB node in the low dropout regulator 21.

When the mirror current diiset 2 is greater than the reference current diiset 2, the second current comparator 25 outputs a current to the FB node, and the output compensation current diiut 2=idet2-Iref 2. At this time Iout2 is positive. At this time, the supply voltage vout= (1+r1/r2) ·vramp-iout1·r1-iout2·r1, iout1 is positive or negative, and Iout2 can only be positive, i.e., the current comparator two 25 decreases (or limits) the supply voltage Vout.

When the mirror current diiset 2 is smaller than the reference current diiset 2, the current comparator two 25 does not perform any operation on the FB node, and neither outputs a current to nor draws a current from the FB node.

Preferably, the size of the third P3 PMOS tube is larger than the size of the second P2 PMOS tube. Thus, the first current comparator 24 can mainly improve the power flatness when the control voltage Vramp is at a middle-low value, namely the output power of the radio frequency power amplifier is at a middle-low value; the second current comparator 25 mainly improves the reliability of the rf power amplifier when the control voltage Vramp is high, i.e. the output power of the rf power amplifier is high.

The size of the MOS tube refers to the channel width-to-length ratio of the MOS tube.

The first current comparator 24 is used for adjusting the output voltage Vout of the low dropout regulator 21 up or down according to the impedance mismatch condition of the antenna end load, so as to improve the output power flatness of the rf power amplifier. The current comparator one 24 is particularly suitable for the case where the control voltage Vramp is small, i.e. the output power of the radio frequency power amplifier is low (or medium low).

When the output impedance becomes smaller due to impedance mismatch of the antenna end load, the supply current Iout flowing through the PMOS transistor one P1 becomes larger, the mirror current one Idet1 mirrored to the PMOS transistor two P2 becomes larger, and after passing through the current comparator one 24, the compensation current one Iout1 flowing into the FB node will increase (or the absolute value of the compensation current one Iout1 extracted from the FB node will become smaller), which reduces the output voltage Vout of the low dropout regulator 21, and further reduces the output power of the radio frequency power amplifier.

Conversely, when the impedance mismatch occurs in the antenna load and the output impedance becomes larger, the supply current Iout flowing through the PMOS transistor one P1 becomes smaller, the mirror current one Idet1 mirrored to the PMOS transistor two P2 becomes smaller, and after passing through the current comparator one 24, the compensation current one Iout1 flowing into the FB node will decrease (or the absolute value of the compensation current one Iout1 extracted from the FB node will become larger), which increases the output voltage Vout of the low dropout regulator 21, and further increases the output power of the radio frequency power amplifier. In summary, the first current comparator 24 can improve the power flatness of the RF power amplifier.

The second current comparator 25 is configured to limit the output voltage Vout of the low dropout regulator 21 according to the impedance mismatch condition of the antenna end load, thereby protecting the transistors in the rf power amplifier from being damaged. The second current comparator 25 is particularly suitable for a case where the control voltage Vramp is large, i.e. the output power of the radio frequency power amplifier is high.

When the output impedance becomes smaller due to impedance mismatch of the antenna end load, the power supply current Iout flowing through the PMOS tube one P1 becomes larger, the mirror current diiset 2 mirrored to the PMOS tube three P3 becomes larger, and after passing through the current comparator two 25, the compensation current two Iout2 flowing into the FB node will increase, which reduces the output voltage Vout of the low dropout regulator 21, further reduces the power supply current Iout flowing through the PMOS tube one P1, protects the PMOS tube one P1 from being burnt out by large current, and also reduces the output power of the radio frequency power amplifier.

On the contrary, when the impedance mismatch occurs in the antenna end load and the output impedance becomes larger, the power supply current Iout flowing through the PMOS tube P1 becomes smaller, so that the risk that the PMOS tube P1 is burnt by a large current is reduced. At this time, the second current comparator 25 does not output current to the FB node, and does not affect the circuit.

Referring to fig. 6, a second embodiment of a power control circuit of a rf power amplifier according to the present application is shown. In comparison with the first embodiment, the second embodiment exemplarily shows a specific implementation circuit of the two current comparators 24 and 25, and the rest of the circuits are the same as those of the first embodiment and will not be described again.

The first current comparator 24 is composed of a PMOS tube II P2, an NMOS tube five N5 and an NMOS tube six N6. The first current source 22 and the fifth NMOS transistor N5 are sequentially cascaded between the power supply voltage Vdd and ground, and the reference current Iref1 outputted by the first current source 22 flows through the fifth NMOS transistor N5. The PMOS tube II P2 and the NMOS tube six N6 are sequentially cascaded between the power supply voltage Vdd and the ground. The node A between the PMOS transistor P2 and the NMOS transistor N6 is connected with the FB node in the low-dropout regulator 21. The PMOS transistor two P2 and the PMOS transistor one P1 form a current mirror one, and as analyzed in the first embodiment, the PMOS transistor two P2 outputs the mirror current one Idet1 to the a node. The NMOS transistor five N5 and the NMOS transistor six N6 form a current mirror three. The size ratio of the NMOS tube six N6 to the NMOS tube five N5 is TN6: TN5, NMOS transistor six N6 samples reference current Iref1 flowing through NMOS transistor five N5 according to the proportion, and mirror current three Idet3= (TN 6/TN 5) & Iref1 is obtained.

When the mirror current one Idet1 is smaller than the mirror current three Idet3, all the mirror currents one Idet1 will flow into the NMOS transistor six N6, and meanwhile, the compensation current one Iout1 is also drawn from the FB node of the low dropout regulator 21 into the NMOS transistor six N6, iout1=idet1-Idet 3. At this time, the supply voltage vout= (1+r1/R2) ·vramp-iout1·r1, iout1 is negative, which increases the output voltage Vout of the low dropout regulator 21.

When the mirror current one Idet1 is greater than the mirror current three Idet3, the current flowing through the NMOS transistor six N6 is equal to the mirror current three Idet3, and at the same time, the compensation current one Iout1, iout1=idet1-Idet 3 is also output to the FB node of the low dropout regulator 21. At this time, the supply voltage vout= (1+r1/r2) ·vramp-iout1·r1, iout1 is a positive value, which decreases the output voltage Vout of the low dropout regulator 21.

The second current comparator 25 is composed of a third PMOS tube P3, four NMOS tubes N1 to N4, and two PMOS tubes P4 and P5. The second current source 23 and the first NMOS transistor N1 are sequentially cascaded between the power supply voltage Vdd and ground, and the reference current Iref2 output by the second current source 23 flows through the first NMOS transistor N1. The PMOS tube III P3 and the NMOS tube II N2 are sequentially cascaded between the power supply voltage Vdd and the ground. The node B is called between the PMOS tube III P3 and the NMOS tube II N2 and is connected with the drain electrode and the grid electrode of the NMOS tube III N3. The third PMOS transistor P3 and the first PMOS transistor P1 form a second current mirror, and as analyzed in the first embodiment, the third PMOS transistor P3 outputs the mirror current two Idet2 to the node B. The NMOS tube I N1 and the NMOS tube II N2 form a current mirror IV. The size ratio of the NMOS tube II N2 to the NMOS tube I N1 is TN2: TN1, NMOS tube two N2 samples reference current two Iref2 flowing through NMOS tube one N1 according to the proportion, and obtains mirror current four Idet4= (TN 2/TN 1) & Iref2. The NMOS transistor III N3 and the NMOS transistor IV N4 form a current mirror V. The PMOS tube four P4 and the PMOS tube five P5 form a current mirror six. The node B is connected to the node a of the voltage comparator one 24 after being connected to the current mirror five and the current mirror six in turn, and is also connected to the node FB of the low dropout regulator 21.

When the mirror current diiset 2 is smaller than the mirror current tetraset 4, all the mirror currents diiset 2 will flow into the NMOS transistor two N2, and the node B voltage Vdet2 in the voltage comparator two 25 will be reduced, so that the current ideset 4 flowing through the NMOS transistor N2 is equal to the mirror current ideset 2, and no current flows through the NMOS transistor three N3. Therefore, no current is output to the FB node through the current mirror five and the current mirror six, and no influence is generated on the low-dropout voltage regulator.

When the mirror current diiset 2 is greater than the mirror current tetraidet 4, the current flowing through the NMOS transistor two N2 is equal to the mirror current tetraidet 4, and the redundant current outputs the compensation current two Iout2 from the node B to the NMOS transistor three N3, iout 2=idet2-Idet 4. After passing through the fifth and sixth current mirrors, the compensation current two Iout2 outputs a compensation current three Iout3 to the FB node in the low dropout regulator 21. The compensation current three Iout3 and the compensation current two Iout2 have a proportional relation of overlapping the current mirror five and the current mirror six. Since the compensation current two Iout2 can only be positive, the compensation current three Iout3 can also be positive.

The second current comparator 25 is added with the fifth current mirror and the sixth current mirror compared with the first current comparator 24, so that only the FB node in the low dropout regulator 21 can be supplied with current, but the FB node in the low dropout regulator 21 cannot be supplied with current. This is because the PMOS current mirror can only output current from the power supply to the FB node, and cannot draw current from the FB node to ground.

The principle that the first current comparator 24 improves the output power flatness of the rf power amplifier and the second current comparator 25 protects the transistor in the rf power amplifier from being damaged by the large current is the same as that of the first embodiment, and will not be described again.

The power control circuit of the radio frequency power amplifier provided by the application has the following characteristics and beneficial effects. First, the current source used in the circuit can be generated from a reference module inside the radio frequency power amplifier chip, which does not increase the circuit cost, but also can meet the precision. Secondly, the circuit omits a detection resistor, and reduces control precision deviation caused by process deviation. Thirdly, the output impedance of the current comparator is very high and is about the source-drain resistance Rds of the MOS tube, so that the gain of the low-dropout voltage regulator is not influenced, and the switching spectrum is not deteriorated. Fourth, the circuit does not add a pressure difference between the power supply voltage Vdd and the output voltage Vout forcibly, which reduces the heat loss generated in the control circuit and improves the output power and efficiency of the rf power amplifier. Fifthly, the circuit can effectively protect the circuit from being burnt by high current under high power, and can improve the power flatness under medium and low power. Sixthly, the circuit can work normally under high and low power supply voltages because the circuit does not depend on the detection power supply voltage. Seventh, although both embodiments provide the supply voltage to the collector of the power transistor by the low dropout regulator 21, the supply current may be provided to the base of the power transistor by the low dropout regulator 21 instead based on the same principle. Alternatively, LDO 21 may provide a supply voltage and/or supply current to a Field Effect Transistor (FET), a MOS transistor (MOSFET), a pseudomorphic high electron mobility transistor power transistor type of power transistor.

Referring to fig. 7, a simulation graph of the power control circuit provided by the present application is shown for the power supply voltage Vout, the power supply current Iout, the output power Pout and the output load Rload at low power in the output of the rf power amplifier. Assuming that the rated output load of the rf power amplifier at the antenna end is 50Ω, and the rated output load at the output end of the amplifying circuit 1 after impedance matching by the output matching circuit 3 is 2Ω, when the output load becomes small in impedance due to mismatch, the supply current Iout will become large, and the supply voltage Vout will become small, which makes the variation amplitude of the output power Pout of the rf power amplifier not large. When the output load becomes large in impedance due to mismatch, the supply current Iout will become small while the supply voltage Vout will become large, which also makes the amplitude of variation of the output power Pout of the radio frequency power amplifier small. Therefore, the power control circuit provided by the application can ensure the power flatness of the radio frequency power amplifier.

Referring to fig. 8, a simulation graph of the power supply voltage Vout, the power supply current Iout, and the output load Rload of the power control circuit provided by the present application under the condition that the rf power amplifier outputs high power is shown. Assuming that the rated output load of the radio frequency power amplifier at the antenna end is 50Ω, and the rated output load at the output end of the amplifying circuit 1 is 2Ω after impedance matching by the output matching circuit 3, when the output load becomes smaller in impedance due to mismatch, the supply current Iout will become larger, and meanwhile the supply voltage Vout will become smaller sharply, which makes the rising amplitude of the supply current Iout smaller, and effectively protects the transistor from being burned by large current.

The radio frequency power amplifier provided by the application is also shown in fig. 1, wherein the radio frequency power amplifier comprises a power control circuit provided by the application, an amplifying circuit and an output matching circuit. The amplifying circuit comprises one or more cascaded power transistors, and performs amplification on the radio frequency input signal. The power control circuit generates a supply voltage according to the control voltage to supply power to a power transistor in the amplifying circuit. The output matching circuit performs impedance matching on the radio frequency signal output by the amplifying circuit.

The above are only preferred embodiments of the present application, and are not intended to limit the present application. Various modifications and variations of the present application will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. The power control circuit of the radio frequency power amplifier is characterized by mainly comprising a low dropout voltage regulator, two current sources and two current comparators; the low dropout voltage regulator outputs a supply voltage and/or a supply current according to the control voltage to supply power for a power transistor in the radio frequency power amplifier; the first current source generates a first reference current; the second current source generates a second reference current;

the first current comparator comprises a second transistor, the second transistor and the first transistor in the low-dropout voltage regulator form a first current mirror, and the first current mirror generates a first mirror current proportional to the supply current; the first current comparator outputs current to the low-dropout voltage regulator or extracts current from the low-dropout voltage regulator according to the comparison result of the first mirror current and the first reference current;

the second current comparator comprises a third transistor, the third transistor and the first transistor in the low-dropout voltage regulator form a second current mirror, and the second current mirror generates a second mirror current proportional to the supply current; and the second current comparator outputs current to the low-dropout voltage regulator according to the comparison result of the second mirror current and the second reference current.

2. The power control circuit of a radio frequency power amplifier according to claim 1, wherein,

when the mirror current I is smaller than the reference current I, the current comparator I extracts current from the low-dropout voltage regulator to raise the power supply voltage;

when the mirror current I is larger than the reference current I, the current comparator outputs current to the low dropout voltage regulator, and the power supply voltage is reduced.

3. The power control circuit of a radio frequency power amplifier according to claim 1, wherein,

when the mirror current II is larger than the reference current II, the current comparator outputs current to the low-dropout voltage regulator, and the power supply voltage is reduced;

when the mirror current II is smaller than the reference current II, the current comparator II outputs current to the low-dropout voltage regulator and draws current from the low-dropout voltage regulator.

4. The power control circuit of a radio frequency power amplifier according to claim 1, wherein,

the low-dropout voltage regulator consists of an operational amplifier, a PMOS tube I, a resistor I and a resistor II; the control voltage is connected with the inverting input end of the operational amplifier, and the output end of the operational amplifier is connected with the grid electrode of the PMOS tube I; the FB node between the first resistor and the second resistor is connected with the non-inverting input end of the operational amplifier; the PMOS tube I, the resistor I and the resistor II are sequentially cascaded between the power supply voltage and the ground; the source electrode of the PMOS tube I is connected with the power supply voltage; the drain electrode of the PMOS tube I is connected with the resistor I and is used as the output end of the low-dropout voltage regulator and is also the output end of the whole power control circuit.

5. The power control circuit of the radio frequency power amplifier according to claim 4, wherein the first current comparator comprises at least a second PMOS transistor, and the second PMOS transistor and the first PMOS transistor form a first current mirror; the output end of the operational amplifier is connected with the grid electrode of the PMOS tube II; the source electrode of the PMOS tube II is connected with the power supply voltage; the drain electrode of the PMOS tube II outputs mirror current I; the output end of the first current comparator is fed back to the low dropout voltage regulator.

6. The power control circuit of the radio frequency power amplifier according to claim 4, wherein the second current comparator at least comprises a third PMOS tube, and the third PMOS tube and the first PMOS tube form a second current mirror; the output end of the operational amplifier is connected with the grid electrode of the PMOS tube III; the source electrode of the PMOS tube III is connected with a power supply voltage; the drain electrode of the PMOS tube III outputs mirror current II; the output end of the second current comparator is fed back to the low-dropout voltage regulator.

7. The power control circuit of a radio frequency power amplifier according to claim 5 or 6, wherein the size of the third PMOS transistor is larger than the size of the second PMOS transistor.

8. The power control circuit of a radio frequency power amplifier according to claim 1, wherein,

the first current comparator also comprises a third current mirror for generating a third mirror current proportional to the reference current; the first current comparator outputs current to the low-dropout voltage regulator or extracts current from the low-dropout voltage regulator according to the comparison result of the first mirror current and the third mirror current;

the second current comparator also comprises a fourth current mirror for generating a fourth mirror current which is proportional to the reference current; the second current comparator generates a second compensation current according to a comparison result of the second mirror current and the fourth mirror current; the second current comparator also comprises a fifth current mirror and a sixth current mirror, the second compensation current is subjected to the fifth current mirror and the sixth current mirror to obtain a third compensation current, and the third compensation current outputs current to the low-dropout voltage regulator.

9. The power control circuit of a radio frequency power amplifier as set out in claim 8, wherein,

when the mirror current I is smaller than the mirror current III, the current comparator I extracts current from the low-dropout voltage regulator, so that the power supply voltage is improved;

when the mirror current I is larger than the mirror current III, the current comparator outputs current to the low dropout voltage regulator, and the power supply voltage is reduced.

10. The power control circuit of a radio frequency power amplifier as set out in claim 8, wherein,

when the mirror current II is smaller than the mirror current IV, the current comparator II does not output current to the NMOS tube III, and the low-dropout voltage regulator is not influenced;

when the mirror current II is larger than the mirror current IV, the current comparator II outputs compensation current II from the node B to the NMOS tube III; and the compensation current II sequentially passes through the current mirror five and the current mirror six and then outputs the compensation current III to the low-dropout voltage regulator.

11. The power control circuit of the radio frequency power amplifier according to claim 8, wherein the first current comparator is composed of a second PMOS transistor, a fifth NMOS transistor and a sixth NMOS transistor; the first current source and the fifth NMOS tube are sequentially cascaded between the power supply voltage and the ground, and the reference current output by the first current source flows through the fifth NMOS tube; the PMOS tube II and the NMOS tube III are sequentially cascaded between the power supply voltage and the ground; the node A between the PMOS tube II and the NMOS tube III is fed back to the low dropout voltage regulator; the PMOS tube II and the PMOS tube I form a current mirror I, and mirror current I is output to the node A; the NMOS tube five and the NMOS tube six form a current mirror three, and the NMOS tube six flows through a mirror current three.

12. The power control circuit of the radio frequency power amplifier according to claim 8, wherein the second current comparator is composed of a third PMOS tube, a fourth NMOS tube and two PMOS tubes; the second current source and the first NMOS tube are sequentially cascaded between the power supply voltage and the ground, and the reference current output by the second current source flows through the first NMOS tube; the PMOS tube III and the NMOS tube II are sequentially cascaded between the power supply voltage and the ground; the node B is called between the PMOS tube III and the NMOS tube II and is connected with the NMOS tube III; the third PMOS tube and the first PMOS tube form a second current mirror, and the second mirror current is output to the node B; the NMOS tube I and the NMOS tube II form a current mirror IV, and the NMOS tube II flows through a mirror current IV; the NMOS tube III and the NMOS tube IV form a current mirror V; the PMOS tube IV and the PMOS tube V form a current mirror VI; the node B sequentially feeds back to the low-dropout voltage regulator after passing through the fifth current mirror and the sixth current mirror.

13. A radio frequency power amplifier comprising a power control circuit as claimed in any one of claims 1 to 12, further comprising an amplifying circuit and an output matching circuit; the amplifying circuit comprises one or more cascaded power transistors and is used for amplifying the radio frequency input signal; the power control circuit generates a power supply voltage according to the control voltage to supply power for a power transistor in the amplifying circuit; the output matching circuit performs impedance matching on the radio frequency signal output by the amplifying circuit.