CN106325344A - A low voltage difference voltage stabilizer circuit with an auxiliary circuit - Google Patents
A low voltage difference voltage stabilizer circuit with an auxiliary circuit Download PDFInfo
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- CN106325344A CN106325344A CN201510369513.4A CN201510369513A CN106325344A CN 106325344 A CN106325344 A CN 106325344A CN 201510369513 A CN201510369513 A CN 201510369513A CN 106325344 A CN106325344 A CN 106325344A
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Abstract
The invention provides a low voltage difference voltage stabilizer circuit with an auxiliary circuit. The low voltage difference voltage stabilizer circuit comprises a low voltage difference voltage stabilizer, a sampling circuit, a mirroring circuit and a current source circuit. The low voltage difference voltage stabilizer comprises a power MOS transistor; the drain electrode of the power MOS transistor outputs voltage stabilizing voltage; the sampling circuit is connected with the gate electrode of the power MOS transistor and sampling the current of the power MOS transistor; the current of the sampling circuit and the current of the power MOS transistor have a first proportion relationship; the mirroring circuit is connected with the sampling circuit and the current source circuit and makes the current of the sampling circuit and the current of the current source circuit have a second proportion relationship; the current value, which is obtained when the voltage stabilizing voltage is greater than a preset reference voltage, of the current source circuit is greater than the current value, which is obtained when the voltage stabilizing voltage is less than the preset reference voltage. The low voltage difference voltage stabilizer circuit with an auxiliary circuit can fulfill the functions of short circuit protection, soft start and current limiting.
Description
Technical field
The present invention relates to circuit field, particularly relate to a kind of low-dropout regulator circuit with auxiliary circuit.
Background technology
In the electronic device, supply voltage the most all may change in the larger context, the most portable
The voltage of 4.2 volts can be provided during lithium ion battery full charge in equipment, after having discharged, be only provided that 2.3
The voltage of volt, excursion is the biggest.And the operating circuit of electronic equipment typically requires stable power supply electricity
Pressure, therefore the most generally at outfan addition low-dropout regulator (the LDO:Low Dropout of power supply
Regulator) circuit, owing to low-dropout regulator has the voltage of voltage regulation of setting, it is first by reality electricity
Source voltage is converted to the voltage of voltage regulation of described setting, then the voltage of voltage regulation after conversion is supplied to operating circuit,
When this ensures that thering the mains voltage variations of electronic equipment, it is supplied to work electricity by low-dropout regulator
The voltage all-the-time stable on road.
When low-dropout regulator circuit start, output voltage and feedback voltage signal all maintain low-voltage,
And reference voltage would generally establish in advance.Now, error amplifier in low-dropout regulator circuit
Output is very big, and the power MOS transistor transient state output electric current that can cause low-dropout regulator is the highest, and having can
Can damage the chip of low-dropout regulator circuit.
In order to eliminate the surge current of power MOS transistor in prior art, it will usually design soft start electricity
Road, it mainly slowly rises around reference voltage and designs.Specifically, on startup, delay with one
The slow reference voltage risen compares with feedback voltage, thus the output of restraining error amplifier, and then
Limit power MOS transistor surge current.But, in prior art, it usually needs the electricity of larger area
Rong Caineng makes reference voltage slowly rise, and reaches current limitation effect.This method is difficult to output when starting
Electric current realizes accurately controlling, and the process of setting up of output voltage had punching, and finally sets up regulated output voltage
Need the longer time.
Therefore, it is necessary to propose a kind of novel low-dropout regulator circuit.
Summary of the invention
The problem that the present invention solves is that the performance of the low-dropout regulator circuit of prior art is the best.
For solving the problems referred to above, the invention provides a kind of low-dropout regulator circuit with auxiliary circuit,
Including: low-dropout regulator, sample circuit, mirror image circuit and current source circuit, wherein, described low pressure
Difference manostat includes power MOS transistor, and the drain electrode of described power MOS transistor is as described low pressure
The outfan of difference manostat, exports voltage of voltage regulation；Described sample circuit and described power MOS transistor
Grid connects, and is suitable to sample the electric current of described power MOS transistor, and described sample circuit
Electric current has the first proportionate relationship with the electric current of described power MOS transistor；Described mirror image circuit connects institute
State sample circuit and described current source circuit, and make electric current and the described current source electricity of described sample circuit
The electric current on road has the second proportionate relationship；Described current source circuit is more than preset reference at described voltage of voltage regulation
Current value during voltage is more than the current value when described voltage of voltage regulation is less than described predetermined reference voltage.
Alternatively, described current source circuit include the first current source, the second current source, the 3rd current source,
First switch and second switch, wherein, described first current source, described second current source and the described 3rd
Respective first end of current source is connected with each other, and constitutes the first end of described current source circuit；Described second
Second end of current source by described first switch, described 3rd electric current and the second end by described second
Switch the second end with described first current source to be connected with each other, and constitute the second end of described current source circuit；
Described current source can be changed by controlling described first switch and the Guan Bi of described second switch or disconnection
The size of current of circuit.
Alternatively, when the voltage of voltage regulation that described low-dropout regulator exports is less than predetermined reference voltage, institute
Stating the first switch and described second switch disconnects, the electric current of described current source circuit is described first current source
Electric current；When the voltage of voltage regulation that described low-dropout regulator exports is higher than described predetermined reference voltage, the
One switch and described second switch close, and the electric current of described current source circuit is described first current source, institute
State the second current source and described 3rd current source electric current and.
Alternatively, described in there is the low-dropout regulator circuit of auxiliary circuit also include first control circuit,
Described first control circuit includes comparator, and wherein, the normal phase input end access of described comparator is described surely
Piezoelectricity pressure, inverting input accesses described predetermined reference voltage, and outfan is as described first control circuit
Outfan；Described first control circuit is suitable to control described first switch, when described first control circuit
Outfan output low level time, described first switches off；Outfan when described first control circuit
During output high level, described first switch Guan Bi.
Alternatively, described in there is the low-dropout regulator circuit of auxiliary circuit also include second control circuit,
Described second control circuit includes: the first PMOS transistor, the 4th current source and the 4th switch, wherein,
The source electrode of described first PMOS transistor and drain electrode connect the first voltage；The first of described 4th current source
End connects the grid of described first PMOS transistor, and the second end connects the second voltage；Described 4th switch
The first end connect described first voltage, the second end connects the grid of described first PMOS transistor and institute
State the first end of the 4th current source, and as the outfan of described second control circuit；Described second controls
Circuit is suitable to control described second switch, when the outfan of described second control circuit exports high level,
Control described second switch to disconnect；When the outfan output low level of described second control circuit, control
Described second switch closes.
Alternatively, described first control circuit is further adapted for controlling described 4th switch, when described first controls
During the outfan output low level of circuit, described 4th switch Guan Bi；Defeated when described first control circuit
When going out end output high level, the described 4th switches off.
Alternatively, described in there is the low-dropout regulator circuit of auxiliary circuit also include the 3rd control circuit,
Described 3rd control circuit includes: the second PMOS transistor, the 5th current source, a NMOS crystal
Pipe and the 3rd switch, wherein, the source electrode of described second PMOS transistor connects the first voltage, and drain electrode is even
Connect the grid of described power MOS transistor；First end of described 5th current source connects described first electricity
Pressure, the second end connects the grid of described second PMOS transistor；The grid of described first nmos pass transistor
Pole connects the grid of described second PMOS transistor, source electrode and drain electrode and connects the second voltage；Described 3rd
First end of switch connects the grid of described first nmos pass transistor, and the second end connects described second voltage.
Alternatively, described 3rd switch enables signal control by low-dropout regulator switch, when described low
When pressure reduction regulator switch enable signal is effective, the described 3rd switches off.
Alternatively, described sample circuit includes the 3rd PMOS transistor, described 3rd PMOS transistor
Source electrode connect the first voltage, grid connects the grid of described power MOS transistor.
Alternatively, described mirror image circuit includes: the second nmos pass transistor, the 3rd nmos pass transistor,
4th PMOS transistor, the 5th PMOS transistor, the 4th nmos pass transistor, the 5th NMOS
Transistor and the 6th PMOS transistor, wherein, the grid of described second nmos pass transistor is with drain electrode mutually
Even and being connected with the source electrode of described 3rd PMOS transistor, source electrode and the second voltage connect；Described 3rd
The grid of nmos pass transistor is connected with the grid of described second nmos pass transistor, and source electrode connects described the
Two voltages；The grid of described 4th PMOS transistor and drain interconnection and with described 3rd NMOS crystal
The drain electrode of pipe connects, and source electrode connects described first voltage；The grid of described 5th PMOS transistor and institute
The grid stating the 4th PMOS transistor connects, and source electrode connects described first voltage；Described 4th NMOS
The drain electrode with drain interconnection and with described 5th PMOS transistor of the grid of transistor is connected, source electrode and institute
State the second voltage to connect；The grid of described 5th nmos pass transistor and described 4th nmos pass transistor
Grid connects, and drain electrode is connected with the second end of described current source circuit, and source electrode connects described second voltage；
The described grid of the 6th PMOS transistor is connected with the second end of described current source circuit, and drain electrode is with described
The grid of power MOS transistor connects, and source electrode connects described first voltage.
Alternatively, described low-dropout regulator also includes error amplifier circuit, buffer circuit, feedback electricity
Road, wherein, the first input end of described error amplifier circuit accesses reference voltage, and outfan connects institute
State the input of buffer circuit；The grid of described power MOS transistor connects the output of described buffer circuit
End, source electrode connects the first voltage；The input of described feedback circuit connects described power MOS transistor
Drain electrode, outfan connects the second input of described error amplifier.12. is as claimed in claim 11
Circuit, it is characterised in that described buffer circuit includes the first resistance, the 7th PMOS transistor and the 6th
Nmos pass transistor, wherein, the first end of described first resistance connects the first voltage, and the second end connects institute
State the grid of power MOS transistor；The source electrode of described 7th PMOS transistor connects described first voltage,
Grid and drain interconnection and the grid with described power MOS transistor are connected；Described 6th NMOS is brilliant
The grid of body pipe connects the outfan of described error amplifier circuit, and drain electrode connects described power MOS crystal
The grid of pipe, source electrode connects the second voltage.
Alternatively, described feedback circuit includes the second resistance and the 3rd resistance, wherein, described second resistance
The first end as described feedback circuit input connect described power MOS transistor grid；Described
First end of the 3rd resistance is connected the output as described feedback circuit with the second end of described second resistance
End, and be connected with the second input of described error amplifier, the second end of described 3rd resistance connects institute
State the second voltage.
Alternatively, described first voltage is supply voltage, and described second voltage is negative supply voltage or ground connection.
Compared with prior art, technical scheme has the advantage that
The low-dropout regulator circuit with auxiliary circuit of the embodiment of the present invention includes: low-dropout regulator,
Sample circuit, mirror image circuit and current source circuit.Described low-dropout regulator circuit includes that power MOS is brilliant
Body pipe, the drain electrode of described power MOS transistor is as the outfan of described low-dropout regulator circuit, defeated
Go out voltage of voltage regulation；Described power MOS transistor and described sample circuit, described mirror image circuit and described electricity
Current source circuit connects so that the electric current of described power MOS transistor has with the electric current of described current source circuit
There is the proportionate relationship of setting, and described current source circuit is when described voltage of voltage regulation is more than predetermined reference voltage
Current value more than described voltage of voltage regulation less than described predetermined reference voltage time current value.Due to described
The voltage of voltage regulation that the electric current of current source circuit exports based on described low-dropout regulator circuit is variable, then described
The electric current of power MOS transistor can also be limited in particular range, for example, it is possible to the quilt when short circuit
Short-circuit protection function is realized, it is also possible to along with V in start-up course in being limited in relatively low scopeOUTCharging
And gradually rise, it is achieved the function of soft start.
Further, the low-dropout regulator circuit with auxiliary circuit of the embodiment of the present invention also includes
Three control circuits, on startup, described 3rd control circuit is by described power MOS transistor grid
Pull-up effect, the current over pulse of described power MOS transistor can be eliminated.
Accompanying drawing explanation
Fig. 1 is the structural representation of the low-dropout regulator circuit with auxiliary circuit of one embodiment of the invention
Figure.
Fig. 2 is the electrical block diagram of the current source circuit of one embodiment of the invention；
Fig. 3 is the electrical block diagram of the first control circuit of one embodiment of the invention；
Fig. 4 is the electrical block diagram of the second control circuit of one embodiment of the invention；
Fig. 5 is the electrical block diagram of the mirror image circuit of one embodiment of the invention；
Fig. 6 is the electrical block diagram of the buffer circuit of one embodiment of the invention；
Fig. 7 is the electrical block diagram of the 3rd control circuit of one embodiment of the invention.
Detailed description of the invention
From background technology, the low-dropout regulator circuit performance of prior art is the best.
Embodiments provide a kind of low-dropout regulator circuit with auxiliary circuit, except low voltage difference
Outside voltage regulator circuit, also include the auxiliary circuit being made up of sample circuit, mirror image circuit and current source circuit.
Described low-dropout regulator circuit includes power MOS transistor, and the drain electrode of described power MOS transistor is made
For the outfan of described low-dropout regulator circuit, export voltage of voltage regulation；Described power MOS transistor with
Described sample circuit, described mirror image circuit and described current source circuit connect so that described power MOS is brilliant
The electric current of the electric current of body pipe and described current source circuit has the proportionate relationship of setting, and described current source electricity
The road current value when described voltage of voltage regulation is more than predetermined reference voltage is less than institute more than at described voltage of voltage regulation
State current value during predetermined reference voltage.The electric current of current source circuit of the present invention is based on described low voltage difference voltage stabilizing
The voltage of voltage regulation of device circuit output is variable, can be accurately controlled starting current in safety range, starts
Current stabilization；Additionally, the present invention also has the 3rd control circuit, described 3rd control circuit can play
Cross punching elimination effect.Compared with prior art, technical scheme shortens the startup time and saves
Save chip area, reduce cost.
Understandable, below in conjunction with the accompanying drawings for enabling the above-mentioned purpose of the present invention, feature and advantage to become apparent from
The specific embodiment of the present invention is described in detail.
It should be noted that provide the purpose of these accompanying drawings to contribute to understand embodiments of the invention, and
Should not be construed as the restriction improperly to the present invention.For the sake of becoming apparent from, shown in figure, size is not pressed
Ratio draw, may make amplify, reduce or other change.
The low-dropout regulator electricity with auxiliary circuit of one embodiment of the invention is shown with reference to Fig. 1, Fig. 1
The structural representation on road.The described low-dropout regulator circuit with auxiliary circuit includes: low voltage difference voltage stabilizing
Device circuit 110, sample circuit 120, mirror image circuit 130 and current source circuit 140, wherein, described low pressure
Difference voltage regulator circuit 110 includes power MOS transistor 113, and the drain electrode of described power MOS transistor 113 is made
For the outfan of described low-dropout regulator circuit, export voltage of voltage regulation VOUT；Described sample circuit 120 with
The grid of described power MOS transistor 113 connects, and is suitable to the electric current to described power MOS transistor 113
Sample, and the electric current of the electric current of described sample circuit 120 and described power MOS transistor 113 has
First proportionate relationship；Described mirror image circuit 130 connects described sample circuit 120 and described current source circuit
140, and make the electric current of described sample circuit 120 have the second ratio with the electric current of described current source circuit 140
Example relation；Described current source circuit 140 is at described voltage of voltage regulation VOUTMore than electric current during predetermined reference voltage
Value is more than at described voltage of voltage regulation VOUTLess than current value during described predetermined reference voltage.
In one embodiment, the above-mentioned low-dropout regulator circuit with auxiliary circuit may be used for mobile logical
In letter terminal.Specifically, the supply voltage of mobile communication terminal is through Buck conversion circuit (BUCK)
After blood pressure lowering, the BUCK relatively low voltage of output is to described low-dropout regulator circuit, then through described low voltage difference
Digital baseband (DBB:Digital Baseband) it is supplied to after voltage regulator circuit voltage stabilizing rectification.At a tool
In body embodiment, the supply voltage of described mobile communication terminal can be 4V, through described BUCK circuit
After blood pressure lowering, output 1.5V voltage is to described low-dropout regulator circuit, through described low-dropout regulator circuit
The burning voltage of 1V is exported to DBB after voltage stabilizing rectification.In other embodiments, above each voltage has not
With, this is not construed as limiting by the present invention.
The low-dropout regulator circuit of the embodiment of the present invention can input (such as, 1.5V) at low supply voltage
Requirement under work.Therefore, it is particularly suitable for supply voltage after BULK blood pressure lowering, then through described low pressure
Difference manostat is that DBB powers.
The current source circuit 140 of the present invention one specific embodiment is shown with reference to Fig. 2, Fig. 2.Described current source
Circuit 140 includes the first current source I1, the second current source I2, the 3rd current source I3, the first switch S1 and the
Two switch S2, wherein, described first current source I1, described second current source I2 and described 3rd current source I3
Respective first end is connected with each other, and constitutes the first end of described current source circuit 140；Described second electric current
Second end of source I2 is opened by described second by described first switch S1, second end of described 3rd electric current I3
The second end closing S2 and described first current source I1 is connected with each other, and constitutes the of described current source circuit 140
Two end B；By controlling described first switch S1 and the Guan Bi of described second switch S2 or disconnecting and can change
The size of current of described current source circuit 140.In actual applications, described first current source I1, the second electricity
The size of stream source I2 and the 3rd current source I3 can be identical or different, can make according to concrete applied environment
Selecting, this is not defined by the present invention.
With reference to Fig. 1, in the present embodiment, described in there is the low-dropout regulator circuit of auxiliary circuit also have the
One control circuit 150 and second control circuit 160, described first control circuit 150 is used for controlling described electric current
The first switch S1 in source circuit 140, described second control circuit 160 is used for controlling described current source circuit
Second switch S2 in 140.
Specifically, Fig. 3 shows one embodiment of the invention first control circuit 150.Described first controls electricity
Road 150 includes that comparator, the normal phase input end of described comparator access the low-dropout regulator electricity of the present embodiment
The voltage of voltage regulation V of road outputOUT, inverting input accesses described predetermined reference voltage VREF_SP, outfan
Outfan Short_prot as described first control circuit 150.Described predetermined reference voltage VREF_SPPermissible
For the threshold reference voltage of short-circuit protection, when the output of its value usually low-dropout regulator circuit is shorted
Magnitude of voltage.Such as, when when described low-dropout regulator normal circuit operation, output voltage is 1V, institute
State predetermined reference voltage VREF_SPCan be 0.3V～0.4V.
In the present embodiment, as described voltage of voltage regulation VOUTLess than described predetermined reference voltage VREF_SPTime, institute
State the outfan Short_prot output low level of first control circuit 150, now, described first control circuit
150 the first switch S1 controlling described current source circuit 140 disconnect；As described voltage of voltage regulation VOUTHigher than institute
State predetermined reference voltage VREF_SPTime, the high electricity of outfan Short_prot output of described first control circuit 150
Flat, now, described first control circuit 150 controls the first switch S1 Guan Bi of described current source circuit 140.
The second control circuit 160 of one embodiment of the invention is shown with reference to Fig. 4, Fig. 4.Described second controls
Circuit 160 includes: the first PMOS transistor Mp1, the 4th current source I4 and the 4th switch S4, wherein,
The source electrode of described first PMOS transistor Mp1 and drain electrode connect the first voltage VDD；Described 4th current source
First end of I4 connects the grid of described first PMOS transistor Mp1, and the second end connects the second voltage VSS；
First end of described 4th switch S4 connects described first voltage VDD, the second end connects a described PMOS
The grid of transistor Mp1 and first end of described 4th current source I4, and as described second control circuit
The outfan EE of 160.
In the present embodiment, the 4th switch S4 in described second control circuit 160 controls electricity by described first
Road 150 controls, when the outfan Short_prot output low level of described first control circuit 150, described
4th switch S4 Guan Bi；When the outfan Short_prot of described first control circuit 150 exports high level,
Described 4th switch S4 disconnects.It is, as described voltage of voltage regulation VOUTLess than described predetermined reference voltage
VREF_SPTime, described 4th switch S4 Guan Bi；As described voltage of voltage regulation VOUTHigher than described preset reference electricity
Pressure VREF_SPTime, described 4th switch S4 disconnects.
With continued reference to Fig. 4, in Fig. 4, the source electrode of described first PMOS transistor Mp1 and drain interconnection, institute
State the first PMOS transistor Mp1 and can be equivalent to an electric capacity.When the described 4th switchs S4 Guan Bi, described
The outfan EE of second control circuit 160 exports high level, controls the in described first control circuit 150
Two switch S2 disconnect；When the described 4th switchs S4 disconnection, described first PMOS transistor Mp1 equivalence
Electric capacity is discharged by described 4th current source I4, and the outfan EE voltage of described second control circuit 160 gradually drops
As little as low level, the second switch S2 controlled in described first control circuit 150 slowly closes.
With reference to Fig. 5, Fig. 5 shows the mirror image circuit 130 of the embodiment of the present invention, also show described simultaneously
The annexation of mirror image circuit 130 and described sample circuit 120 and described current source circuit 140.
Specifically, described sample circuit 120 includes the 3rd PMOS transistor Mp3, described 3rd PMOS
The source electrode of transistor Mp3 connects the first voltage VDD, grid connects the grid of described power MOS transistor 113
Pole C.Grid and the grid of described power MOS transistor 113 due to described 3rd PMOS transistor Mp3
Pole connects, and the electric current of described power MOS transistor 113 can be entered by described 3rd PMOS transistor Mp3
Row sampling.Therefore, the electric current of described sample circuit, the electric current of the most described 3rd PMOS transistor Mp3 with
The electric current of described power MOS transistor 113 has the first proportionate relationship.Such as, in the present embodiment, described
The electric current of the 3rd PMOS transistor Mp3 is 1:M with the current ratio of described power MOS transistor 113.Institute
The value stating M can set according to physical circuit, and present invention contrast does not limits.
Described mirror image circuit 130 includes: the second nmos pass transistor Mn2, the 3rd nmos pass transistor Mn3,
4th PMOS transistor Mp4, the 5th PMOS transistor Mp5, the 4th nmos pass transistor Mn4,
Five nmos pass transistor Mn5 and the 6th PMOS transistor Mp6, wherein, described second nmos pass transistor
The grid of the Mn2 source electrode with drain interconnection and with described 3rd PMOS transistor Mp3 is connected, source electrode and
Two voltage VSSConnect；The grid of described 3rd nmos pass transistor Mn3 and described second nmos pass transistor
The grid of Mn2 connects, and source electrode connects described second voltage VSS；Described 4th PMOS transistor Mp4
The grid drain electrode with drain interconnection and with described 3rd nmos pass transistor Mn3 is connected, and source electrode connects described the
One voltage VDD；The grid of described 5th PMOS transistor Mp5 and described 4th PMOS transistor Mp4
Grid connect, source electrode connect described first voltage VDD；The grid of described 4th nmos pass transistor Mn4
Drain electrode with drain interconnection and with described 5th PMOS transistor Mp5 is connected, source electrode and described second voltage
VSSConnect；The grid of described 5th nmos pass transistor Mn5 is with described 4th nmos pass transistor Mn4's
Grid connects, and drain electrode is connected with the second end B of described current source circuit 140, and source electrode connects described second electricity
Pressure VSS；The grid of described 6th PMOS transistor Mp6 is connected with the second end B of described current source circuit,
Drain electrode is connected with the grid C of described power MOS transistor 133, and source electrode connects described first voltage VDD。
In the present embodiment, described 3rd PMOS transistor Mp3, the second nmos pass transistor Mn2, the 3rd NMOS
Transistor Mn3, the 4th PMOS transistor Mp4, the 5th PMOS transistor Mp5, the 4th NMOS are brilliant
Body pipe Mn4, the 5th nmos pass transistor Mn5 and the 6th PMOS transistor Mp6 constitute tertiary current mirror electricity
Road so that the electric current of described sample circuit, the electric current of the most described 3rd PMOS transistor Mp3 and described electricity
The electric current of current source circuit 140 has the second proportionate relationship.Such as, in the present embodiment, described mirror image circuit
The current ratio relation of tertiary current mirror is respectively N:1, K:1 and J:1, and the most described 3rd PMOS is brilliant
The electric current of body pipe Mp3 is (N*K*J) with the proportionate relationship of the electric current of described current source circuit 140: 1.Institute
The value stating N, K, J can set according to physical circuit, and present invention contrast does not limits.
With continued reference to Fig. 1, below the present invention is had the low pressure in the low-dropout regulator circuit of auxiliary circuit
Difference manostat 110 is described further.As it is shown in figure 1, described low-dropout regulator 100 includes described merit
Rate MOS transistor 113, described power MOS transistor 113 is PMOS transistor.Described low voltage difference is steady
Depressor 100 also includes error amplifier circuit 111, buffer circuit 112, and feedback circuit (does not indicates), its
In, the first input end of described error amplifier circuit 111 accesses reference voltage VREF, outfan connects institute
State the input of buffer circuit 112；The grid of described power MOS transistor 113 connects described buffer circuit
The outfan C of 112, source electrode connects the first voltage VDD；The input of described feedback circuit connects described power
The drain electrode of MOS transistor 113, outfan connects the second input of described error amplifier 111.
In the present embodiment, described reference voltage VREFThered is provided by external circuit, for defeated with feedback circuit 140
Feedback voltage V FB gone out compares, the voltage of voltage regulation of fixing described low-dropout regulator circuit output
VOUTValue.
Hereinafter described buffer circuit 112 and feedback circuit are described.This is shown with reference to Fig. 6, Fig. 6
The concrete structure schematic diagram of the buffer circuit 112 in a bright embodiment.As shown in Figure 6, described buffer circuit
112 include the first resistance R1, the 7th PMOS transistor Mp7 and the 6th nmos pass transistor Mn6, wherein,
First end of described first resistance R1 connects the first voltage VDD, the second end connects described power MOS crystal
The grid of pipe 113；The source electrode of described 7th PMOS transistor Mp7 connects described first voltage VDD, grid
Grid with drain interconnection and with described power MOS transistor 113 is connected；Described 6th nmos pass transistor
The grid of Mn6 connects the output terminals A of described error amplifier circuit 110, and drain electrode connects described power MOS
The grid C of transistor, source electrode connects the second voltage VSS。
In the present embodiment, described buffer circuit 112 amplifies as the second level of described low-dropout regulator, can
To improve the response speed of described low-dropout regulator.Additionally, described buffer circuit 112 uses the 6th NMOS
Transistor Mn6 is as amplifier tube, owing to the supply voltage needed for usual nmos pass transistor is brilliant less than PMOS
The required supply voltage of body pipe, therefore so that the low-dropout regulator circuit of the embodiment of the present invention is suitableeer
In meeting lower VDDThe application scenarios of input voltage.Such as, the supply voltage of mobile communication terminal passes through
After BUCK circuit blood pressure lowering, the voltage of output 1.5V is as the supply voltage V of described low-dropout regulatorDD。
With continued reference to Fig. 1, Fig. 1 also show the concrete structure schematic diagram of described feedback circuit.Described instead
Current feed circuit includes the second resistance R2 and the 3rd resistance R3, wherein, the first end conduct of described second resistance R2
The input of described feedback circuit connects the grid of described power MOS transistor 113；Described 3rd resistance R3
The first end be connected the outfan as described feedback circuit with second end of described second resistance R2, and with
Second input of described error amplifier connects, and second end of described 3rd resistance R3 connects described second
Voltage VSS。
Specifically, the present embodiment use the partial-pressure structure of the second resistance R2 and the 3rd resistance R3 as feedback
Circuit, i.e. the voltage of voltage regulation V of described low-dropout regulatorOUTThrough the second resistance R2 and the 3rd resistance R3
Dividing potential drop after as feedback voltage VFBIt is input to the second input of described error amplifier circuit 111, institute
State error amplifier circuit 111 by benchmark voltage VREFAnd feedback voltage VFBReach stable output
Voltage of voltage regulation VOUTPurpose.
With continued reference to Fig. 1, in the present embodiment, described in there is the low-dropout regulator circuit of auxiliary circuit also wrap
Include the 3rd control circuit 170.Specifically, with reference to Fig. 7, Fig. 7 shows described 3rd control circuit 170
Electrical block diagram.Described 3rd control circuit 170 includes: the second PMOS transistor Mp2,
Five current source I5, the first nmos pass transistor Mn1 and the 3rd switch S3, wherein, described 2nd PMOS is brilliant
The source electrode of body pipe Mp2 connects the first voltage VDD, drain electrode connects the grid of described power MOS transistor 113
C；First end of described 5th current source I5 connects described first voltage VDD, the second end connects described second
The grid of PMOS transistor Mp2；The grid of described first nmos pass transistor Mn1 connects described second
The grid of PMOS transistor Mp2, source electrode and drain electrode connect the second voltage VSS；Described 3rd switch S3's
First end connects the grid of described first nmos pass transistor Mn1, and the second end connects described second voltage VSS。
In the present embodiment, described 3rd switch S3 enables signal by low-dropout regulator switch and controls, when
When described low-dropout regulator switch enable signal is effective, described 3rd switch S3 disconnects.Implement at some
In example, described low-dropout regulator switch enables signal can also be for comprise this low-dropout regulator circuit
The start of equipment enables signal, such as, when device power-up, the signal that start-up circuit is started working.Continue
Continuous reference Fig. 7, the source electrode of the first nmos pass transistor Mn1 in Fig. 7 and drain interconnection, described first
Nmos pass transistor Mn1 can be equivalent to an electric capacity.When described enable signal makes described 3rd switch S3 disconnect
Time, the voltage of the second end D of described 5th current source is by the second voltage VSSRise to the first voltage VDD.By
The grid C of described power MOS transistor is connected in described second PMOS transistor Mp2, therefore, described
Second PMOS transistor Mp2, when circuit start, has the strongest pull-up effect to C point, along with D point point
The rising of voltage, pull-up is slowly decontroled, and therefore, eliminates described power MOS transistor 113 during startup
Cross punching.
It should be noted that in certain embodiments, above-mentioned described first voltage VDDFor supply voltage,
Described second voltage VSSFor negative supply voltage, specifically can be according to the application of described low-dropout regulator circuit
Environment determines.Such as, described first voltage VDDCan be that supply voltage is after BUCK circuit blood pressure lowering
Value.In other embodiments, described second voltage can also be ground connection.In certain embodiments, above-mentioned
First switch S1, second switch S2, the 3rd switch S3 and the 4th switch S4 can use NMOS crystal
Pipe or PMOS transistor realize, and can determine according to concrete applied environment.This is not limited by the present invention.
For making advantages of the present invention clearer, the low voltage difference to the present invention below with auxiliary circuit is steady
The work source electrode of transformer circuits proceeds explanation.
With reference to Fig. 1 and Fig. 5, according to the proportionate relationship of described sample circuit 120 with described mirror image circuit 130,
Flow through the electric current I of described 5th nmos pass transistor Mn5Mn5With flow through described power MOS transistor 113
Electric current IpowermosProportionate relationship be: Ipowermos=M*N*K*J*IMn5.When described power MOS transistor
The electric current I of 113powermosTime bigger, such as, reach IMn5>IrefcurrentTime, described 6th PMOS transistor Mp6
Grid B point voltage be pulled low, the drain electrode of the most described 6th PMOS transistor, the most described power
The grid C point of MOS transistor 113 is driven high, and then the output electric current of described power MOS transistor 113
IpowermosReduce, thus constitute the negative feedback mechanism of an electric current limit.
Referring to figs. 1 to Fig. 5, the low-dropout regulator circuit with auxiliary circuit of the embodiment of the present invention is opening
Dynamic complete, there is no short circuit, when being in the steady statue of normal work, the voltage of voltage regulation V of outputOUTIt is higher than
Described predetermined reference voltage VREF_SP, the outfan Short_prot of the most described first control circuit 150 is high electricity
Flat, control described first switch S1 Guan Bi and described second switch S2 closes.Described power MOS transistor
The output electric current I of 113powermosMaximum allowable is (I1+I2+I3) * M*N*K*J, then achieve electric current limit
Function.
The low-dropout regulator circuit with auxiliary circuit of the embodiment of the present invention when outfan is shorted,
The voltage of voltage regulation V of outputOUTLess than described predetermined reference voltage VREF_SP, described first control circuit 150
Outfan Short_prot is low level, controls described first switch S1 and disconnects, the 4th switch S4 Guan Bi, EE
Point is high level, controls described second switch S2 and disconnects.The current reduction of the most described current source circuit 140 is
I1, the output electric current I of described power MOS transistor 113powermosMaximum allowable for I1*M*N*K*J, reality
Show short-circuit protection function.
The low-dropout regulator circuit with auxiliary circuit of the embodiment of the present invention when just starting, output
Voltage of voltage regulation VOUTLess than described predetermined reference voltage VREF_SP, the outfan of described first control circuit 150
Short_prot is low level, then as it has been described above, the output electric current I of described power MOS transistor 113powermos
Maximum allowable for I1*M*N*K*J.When outfan is electrically charged, voltage of voltage regulation VOUTHigher than described preset reference
Voltage VREF_SPTime, Short_prot overturns, and exports high level, and the most described first switch S1 closes,
Now electric current is limited to (I1+I2) * M*N*K*J.When Short_prot is high level, the 4th switch S4 disconnects,
EE point is reduced by described 4th current source electric discharge, voltage, controls described second switch S2 Guan Bi slowly,
Then the electric current of the 3rd current source I3 contribution is slowly risen to I3 by 0.Described in when EE discharges into of a sufficiently low second
S2 is of completely closed for switch.Now soft start completes, and electric current limit is stable at (I1+I2+I3) * M*N*K*J.
Additionally, the low-dropout regulator circuit with auxiliary circuit of the embodiment of the present invention also includes the 3rd control
Circuit processed, described 3rd control circuit can eliminate crossing of described power MOS transistor 113 during startup and rush.
Concrete principle has combined Fig. 7 and has been described, and does not repeats them here.
Although present disclosure is as above, but the present invention is not limited to this.Any those skilled in the art,
Without departing from the spirit and scope of the present invention, all can make various changes or modifications, therefore the guarantor of the present invention
The scope of protecting should be as the criterion with claim limited range.
Claims (14)
1. a low-dropout regulator circuit with auxiliary circuit, it is characterised in that including: low voltage difference voltage stabilizing
Device, sample circuit, mirror image circuit and current source circuit, wherein,
Described low-dropout regulator includes power MOS transistor, the drain electrode of described power MOS transistor
As the outfan of described low-dropout regulator, export voltage of voltage regulation；
Described sample circuit is connected with the grid of described power MOS transistor, is suitable to described power MOS
The electric current of transistor is sampled, and the electricity of the electric current of described sample circuit and described power MOS transistor
Stream has the first proportionate relationship；
Described mirror image circuit connects described sample circuit and described current source circuit, and makes described sampling electricity
The electric current on road has the second proportionate relationship with the electric current of described current source circuit；
The described current source circuit current value when described voltage of voltage regulation is more than predetermined reference voltage is more than in institute
State voltage of voltage regulation less than current value during described predetermined reference voltage.
2. circuit as claimed in claim 1, it is characterised in that described current source circuit include the first current source,
Second current source, the 3rd current source, the first switch and second switch, wherein, described first current source,
Described second current source and described 3rd respective first end of current source are connected with each other, and constitute described electricity
First end of current source circuit；Second end of described second current source by described first switch, described the
Three electric currents with the second end interconnected mutually by the second end of described second switch and described first current source
Connect, and constitute the second end of described current source circuit；By controlling described first switch and described second
The Guan Bi of switch or disconnection can change the size of current of described current source circuit.
3. circuit as claimed in claim 2, it is characterised in that when the voltage stabilizing that described low-dropout regulator exports
When voltage is less than predetermined reference voltage, described first switch and described second switch disconnect, described electric current
The electric current of source circuit is the electric current of described first current source；When the voltage stabilizing that described low-dropout regulator exports
When voltage is higher than described predetermined reference voltage, the first switch and described second switch close, described electric current
The electric current of source circuit is described first current source, described second current source and the electricity of described 3rd current source
Stream and.
4. circuit as claimed in claim 2, it is characterised in that also include first control circuit, described first
Control circuit includes comparator, wherein,
The normal phase input end of described comparator accesses described voltage of voltage regulation, and inverting input accesses described presetting
Reference voltage, outfan is as the outfan of described first control circuit；
Described first control circuit is suitable to control described first switch, when the output of described first control circuit
During end output low level, described first switches off；When the outfan of described first control circuit exports height
During level, described first switch Guan Bi.
5. circuit as claimed in claim 4, it is characterised in that also include second control circuit, described second
Control circuit includes: the first PMOS transistor, the 4th current source and the 4th switch, wherein,
The source electrode of described first PMOS transistor and drain electrode connect the first voltage；
First end of described 4th current source connects the grid of described first PMOS transistor, and the second end is even
Connect the second voltage；
First end of described 4th switch connects described first voltage, and the second end connects a described PMOS
The grid of transistor and the first end of described 4th current source, and as the output of described second control circuit
End；
Described second control circuit is suitable to control described second switch, when the output of described second control circuit
During end output high level, control described second switch and disconnect；When the outfan of described second control circuit is defeated
When going out low level, control described second switch Guan Bi.
6. circuit as claimed in claim 5, it is characterised in that described first control circuit is further adapted for controlling institute
State the 4th switch, when the outfan output low level of described first control circuit, described 4th switch
Guan Bi；When the outfan of described first control circuit exports high level, the described 4th switches off.
7. circuit as claimed in claim 1, it is characterised in that also include the 3rd control circuit, the described 3rd
Control circuit includes: the second PMOS transistor, the 5th current source, the first nmos pass transistor and
Three switches, wherein,
The source electrode of described second PMOS transistor connects the first voltage, and drain electrode connects described power MOS
The grid of transistor；
First end of described 5th current source connects described first voltage, and the second end connects described 2nd PMOS
The grid of transistor；
The grid of described first nmos pass transistor connects the grid of described second PMOS transistor, source electrode
The second voltage is connected with drain electrode；
First end of described 3rd switch connects the grid of described first nmos pass transistor, and the second end connects
Described second voltage.
8. circuit as claimed in claim 7, it is characterised in that described 3rd switch passes through low-dropout regulator
Switch enables signal and controls, when described low-dropout regulator switch enable signal is effective, and the described 3rd
Switch off.
9. circuit as claimed in claim 2, it is characterised in that described sample circuit includes that the 3rd PMOS is brilliant
Body pipe, the source electrode of described 3rd PMOS transistor connects the first voltage, and grid connects described power
The grid of MOS transistor.
10. circuit as claimed in claim 9, it is characterised in that described mirror image circuit includes: the 2nd NMOS
Transistor, the 3rd nmos pass transistor, the 4th PMOS transistor, the 5th PMOS transistor,
4th nmos pass transistor, the 5th nmos pass transistor and the 6th PMOS transistor, wherein,
The grid of described second nmos pass transistor and drain interconnection and with described 3rd PMOS transistor
Source electrode connects, and source electrode and the second voltage connect；
The grid of described 3rd nmos pass transistor is connected with the grid of described second nmos pass transistor, source
Pole connects described second voltage；
The grid of described 4th PMOS transistor and drain interconnection and with described 3rd nmos pass transistor
Drain electrode connects, and source electrode connects described first voltage；
The grid of described 5th PMOS transistor is connected with the grid of described 4th PMOS transistor, source
Pole connects described first voltage；
The grid of described 4th nmos pass transistor and drain interconnection and with described 5th PMOS transistor
Drain electrode connects, and source electrode is connected with described second voltage；
The grid of described 5th nmos pass transistor is connected with the grid of described 4th nmos pass transistor, leakage
Pole is connected with the second end of described current source circuit, and source electrode connects described second voltage；
The described grid of the 6th PMOS transistor is connected with the second end of described current source circuit, drain electrode with
The grid of described power MOS transistor connects, and source electrode connects described first voltage.
11. circuit as claimed in claim 1, it is characterised in that described low-dropout regulator also includes that error is put
Big device circuit, buffer circuit, feedback circuit, wherein,
The first input end of described error amplifier circuit accesses reference voltage, and outfan connects described buffering
The input of circuit；
The grid of described power MOS transistor connects the outfan of described buffer circuit, and source electrode connects first
Voltage；
The input of described feedback circuit connects the drain electrode of described power MOS transistor, and outfan connects institute
State the second input of error amplifier.
12. circuit as claimed in claim 11, it is characterised in that described buffer circuit includes the first resistance, the
Seven PMOS transistor and the 6th nmos pass transistor, wherein,
First end of described first resistance connects the first voltage, and the second end connects described power MOS transistor
Grid；
The source electrode of described 7th PMOS transistor connects described first voltage, grid and drain interconnection and with
The grid of described power MOS transistor connects；
The grid of described 6th nmos pass transistor connects the outfan of described error amplifier circuit, drain electrode
Connecting the grid of described power MOS transistor, source electrode connects the second voltage.
13. circuit as claimed in claim 11, it is characterised in that described feedback circuit includes the second resistance and
Three resistance, wherein,
First end of described second resistance connects described power MOS as the input of described feedback circuit
The grid of transistor；
First end of described 3rd resistance is connected as described feedback circuit with the second end of described second resistance
Outfan, and be connected with the second input of described error amplifier, the second end of described 3rd resistance
Connect described second voltage.
14. circuit as according to any one of claim 5-13, it is characterised in that described first voltage is power supply
Voltage, described second voltage is negative supply voltage or ground connection.
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| CN113050749A (en) * | 2019-12-27 | 2021-06-29 | 爱思开海力士有限公司 | Voltage generating circuit and semiconductor circuit including the same |
| CN111525920A (en) * | 2020-05-22 | 2020-08-11 | 广州昌钰行信息科技有限公司 | CMOS millimeter wave high-speed clock buffer circuit |
| CN115237199A (en) * | 2021-04-25 | 2022-10-25 | 平头哥(上海)半导体技术有限公司 | Voltage processing circuit and digital temperature sensor |
| CN115237199B (en) * | 2021-04-25 | 2024-03-26 | 平头哥(上海)半导体技术有限公司 | Voltage processing circuit and digital temperature sensor |
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| CN117130421A (en) * | 2023-10-20 | 2023-11-28 | 江苏帝奥微电子股份有限公司 | NLDO power tube current sampling circuit and method suitable for double-rail input |
| CN117130421B (en) * | 2023-10-20 | 2023-12-29 | 江苏帝奥微电子股份有限公司 | NLDO power tube current sampling circuit and method suitable for double-rail input |
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Effective date of registration: 20190313 Address after: 101399 Building 8-07, Ronghui Garden 6, Shunyi Airport Economic Core Area, Beijing Patentee after: Xin Xin finance leasing (Beijing) Co.,Ltd. Address before: 201203 Building 1, exhibition hall, 2288 lane, 2288 Chong, road, Zhangjiang hi tech park, Shanghai Patentee before: SPREADTRUM COMMUNICATIONS (SHANGHAI) Co.,Ltd. |
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Application publication date: 20170111 Assignee: SPREADTRUM COMMUNICATIONS (SHANGHAI) Co.,Ltd. Assignor: Xin Xin finance leasing (Beijing) Co.,Ltd. Contract record no.: X2021110000008 Denomination of invention: Low dropout regulator circuit with auxiliary circuit Granted publication date: 20180126 License type: Exclusive License Record date: 20210317 |
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