CN107092296B - A kind of fast transient response low-voltage difference adjustor - Google Patents

A kind of fast transient response low-voltage difference adjustor Download PDF

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Publication number
CN107092296B
CN107092296B CN201710294322.5A CN201710294322A CN107092296B CN 107092296 B CN107092296 B CN 107092296B CN 201710294322 A CN201710294322 A CN 201710294322A CN 107092296 B CN107092296 B CN 107092296B
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transistor
tube
connect
grid
emitter
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CN107092296A (en
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冯浪
岑远军
李大刚
马迎
李呈
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Chengdu Hua Microelectronics Technology Co.,Ltd.
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CHENGDU SINO MICROELECTRONICS TECHNOLOGY Co Ltd
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/561—Voltage to current converters

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Amplifiers (AREA)

Abstract

A kind of fast transient response low-voltage difference adjustor, it is related to field of analog integrated circuit, the present invention includes error amplifier, power tube Mp and feedback sample resistance, it is characterized in that, it further include buffer, PNP transistor and NPN transistor, the base stage of the output termination PNP transistor of error amplifier, the emitter of PNP transistor connect the output end of voltage adjuster；The collector and base stage of NPN transistor connect the collector of PNP transistor, the emitter ground connection of NPN transistor, and base stage is also connect with the first input end of buffer；The grid of the output termination power tube of buffer；The input of power tube terminates input voltage, the emitter of output termination PNP transistor；For the emitter of PNP transistor by concatenated first feedback sample resistance and the second feedback sample resistance eutral grounding, the tie point of the first feedback sample resistance and the second feedback sample resistance connects the reverse input end of error amplifier.The present invention reduces system loop delay, realizes fast transient response in the case where not needing to increase additional static power consumption.

Description

A kind of fast transient response low-voltage difference adjustor
Technical field
The present invention relates to field of analog integrated circuit, it is related specifically to have the low drop voltage of fast transient response to adjust Device.
Background technique
Low-voltage difference adjustor is an important component part in electric power management circuit, is generally used for DC-DC switch The rear class of conversion circuit is used as POL power supply, and the loading point that is negative provides reliable and stable supply voltage, due to its pressure drop is small, PSRR high, it is at low cost the advantages that, be widely used in portable electronic product.
In portable use field, the transfer efficiency for improving power supply is critically important for extending battery life: system design side Face, by introducing enabled turn-off function, under specific operating mode, only part of module works, and part of module is off State, therefore in different working modes handoff procedure, load current meeting instantaneous abrupt change jumps to several amperes from several milliamperes, is Reduce influence of the load current instantaneous variation to output voltage, this is just to the load transient response speed of low-voltage difference adjustor More stringent requirements are proposed for degree.
The two parameters of the low drop voltage and quiescent current of low-voltage difference adjustor are critically important, and low voltage difference requires to increase Power tube area, the grid capacitance that will cause power tube is excessive, and low quiescent current will affect the slew rate of grid charge and discharge, thus Influence loop load transient response speed.Traditional low-voltage difference adjustor structure is as shown in Figure 1, VOUTIt can be in load transient Spike is generated when variation, since loop response is needed by loop compensation capacitor i.e. internal miller-compensated delay and power tube grid The charge and discharge of pole are delayed, VOUTAgain restore stabilization and need the regular hour, to obtain fast load transient response, need to increase Amplifier quiescent current passes through merely increasing to miller capacitance fast charging and discharging, but for the high current voltage adjuster of 1A or more Quiescent current is added to improve load transient response, it is difficult to ensure that the stability of loop, therefore conventional low voltage difference adjustor can not Combine low quiescent current and fast load transient response, it is necessary to improve from circuit structure.
Summary of the invention
The technical problem to be solved by the present invention is to propose a kind of low-voltage difference adjustor structure, can effectively improve Low-voltage difference adjustor load transient response speed.
The present invention solve the technical problem the technical solution adopted is that, a kind of adjustment of fast transient response low drop voltage Device, including error amplifier, power tube and feedback sample resistance, which is characterized in that further include buffer, PNP transistor and NPN Transistor,
The base stage of the output termination PNP transistor of error amplifier, the emitter of PNP transistor connect the defeated of voltage adjuster Outlet；The collector and base stage of NPN transistor connect the collector of PNP transistor, and the emitter ground connection of NPN transistor, base stage is also It is connect with the first input end of buffer；The grid of the output termination power tube of buffer；The input termination input electricity of power tube Pressure, the emitter of output termination PNP transistor；The emitter of PNP transistor passes through concatenated first feedback sample resistance and The tie point of two feedback sample resistance eutral groundings, the first feedback sample resistance and the second feedback sample resistance connects the anti-of error amplifier To input terminal.
Advantageous effect of the invention is low-voltage difference adjustor of the invention, is adjusted with existing similar low drop voltage Device is compared, and is introduced the fast transient response circuit formed by two transistors and buffer, is made the transient changing of output voltage Electric current is directly converted to by the emitting stage input of PNP transistor, is then mirrored to by NPN transistor across resistance buffer driving Output power pipe is controlled, output voltage is quickly adjusted, the delay of operation amplifier link miller-compensated electric capacity introducing is skipped, is being not required to In the case where increasing additional static power consumption, reduces system loop delay, realize fast transient response.
Detailed description of the invention
Fig. 1 is conventional low voltage difference adjustor structural schematic diagram.
Fig. 2 is fast transient response low-voltage difference adjustor structural schematic diagram of the invention.
Fig. 3 is operation amplifier circuit schematic diagram of the present invention.
Fig. 4 is buffer circuits schematic diagram of the present invention.
Specific embodiment
Referring to fig. 2-4.
The present invention proposes a kind of fast transient response low-voltage difference adjustor circuit, the fast transient response low voltage difference Voltage regulator circuit includes: reference voltage, error amplifier, two feedback proportional resistance Rf1、Rf2, output power pipe MP, delay Rush device, PNP transistor Q5, NPN transistor Q6, which is characterized in that introduce the fast transient response that Q5, Q6 and buffer are formed Circuit makes output voltage be converted to electric current with the emitting stage input that the transient changing of load directly passes through Q5, then passes through Q6 mirror As skipping the delay of operation amplifier link miller-compensated electric capacity introducing, realizing fast transient response to across resistance buffer.
The specific connection relationship of fast transient response low-voltage difference adjustor are as follows: it is same that reference voltage connects error amplifier To input terminal, the first feedback sample resistance Rf1One termination output voltage VOUT, another termination error amplifier reverse input end, the Two feedback sample resistance Rf2One termination error amplifier reverse input end, other end ground connection, error amplifier output connect PNP crystalline substance Body pipe Q5 base stage, PNP transistor Q5 emitting stage meet output voltage VOUT, PNP transistor Q5 collector connects the collection of NPN transistor Q6 Electrode and ground level, PNP transistor Q5 amplify configuration at common emitter, and the collector and ground level of NPN transistor Q6 links together Meet buffer input, NPN transistor Q6 emitter ground connection, buffer output connection PMOS power tube MPGrid, PMOS power tube Source electrode meets input voltage VIN, the drain electrode of PMOS power tube, which connects, exports VOUT
The error amplifier circuit includes PMOS tube MP1, MP2, MP3, MP4, MP5, NMOS tube MN1, MN2, MN3, NPN Transistor Q1, Q2, Q3, resistance RC, capacitor CC, bias current IB, specific connection relationship are as follows: bias current IBOne end connection input Voltage VIN, the other end connects grid and the drain electrode of NMOS tube MN1, while connecting the grid of NMOS tube MN2, MN3, NMOS tube MN1, The source electrode of MN2, MN3 are grounded, and form current-mirror structure, the grid of NMOS tube MN2 drain electrode connection PMOS tube MP1 and drain electrode, simultaneously The grid of PMOS tube MP2, MP3 is connected, the source electrode of PMOS tube MP1, MP2, MP3 meet input voltage VIN, current-mirror structure is formed, MP4 grid connects feedback sample voltage VFB, drain electrode connection Q1 collector and Q1, Q2 base stage, MP5 grid connect reference voltage Vref, Drain electrode connection Q2 collector, MP4, MP5 source electrode connect MP2 drain electrode, and composition Differential Input forms pipe, Q1, Q2 transmitter ground connection Active load, Q3 base stage connect Q2 collector, emitter ground connection, and collector connects MP3 drain electrode, forms enlarged structure, Q4 base stage Q3 collector is connected, collector connects input voltage VIN, emitter connection MN3 drain electrode, formation follower configuration, CCOne end connection Q3 collector, the other end connect RC, RCOne end connects CC, other end connection Q3 base stage, miller-compensated knot of the formation with zero point Structure.
The buffer includes PMOS tube MP6, MP7, MP8, NMOS tube MN4, MN5, NPN transistor Q7, Q8, bias current IB, specific connection relationship are as follows: bias current IBOne end connects input voltage VIN, the other end connect NMOS tube MN4 grid and leakage Pole, while the grid of NMOS tube MN5 is connected, the source electrode ground connection of NMOS tube MN4, MN5 forms current-mirror structure, NMOS tube MN5 leakage Pole connects grid and the drain electrode of PMOS tube MP6, while connecting the grid of PMOS tube MP7, MP8, the source of PMOS tube MP6, MP7, MP8 Pole meets input voltage VIN, current-mirror structure, MP7 drain electrode connection Q7 collector and Q8 base stage, Q7 emitter ground connection are formed, base stage connects Q6 base voltage VBQ6, Q8 emitter ground connection, collector connection MP8 drain and connect power tube MPGrid.
Embodiment
As shown in Fig. 2, fast transient response low-voltage difference adjustor of the invention includes: reference voltage, error amplification Device, feedback proportional resistance Rf1、Rf2, output power pipe MP, buffer, PNP transistor Q5, NPN transistor Q6, wherein reference voltage Meet error amplifier noninverting input, feedback sample resistance Rf1One termination output voltage VOUT, another termination error amplifier is reversed Input terminal, feedback sample resistance Rf2One termination error amplifier reverse input end, other end ground connection, error amplifier output connect PNP transistor Q5 base stage, PNP transistor Q5 emitting stage meet output voltage VOUT, PNP transistor Q5 collector meets NPN transistor Q6 Collector and ground level, Q5 at common emitter amplify configuration, the collector and ground level of NPN transistor Q6 link together connection buffering Device input, NPN transistor Q6 emitter ground connection, buffer output connection PMOS power tube MPGrid, PMOS power tube source connect Input voltage VIN, the drain electrode of PMOS power tube, which connects, exports VOUT。
As shown in figure 3, error amplifier circuit of the invention includes PMOS tube MP1, MP2, MP3, MP4, MP5, NMOS tube MN1, MN2, MN3, NPN transistor Q1, Q2, Q3, resistance RC, capacitor CC, bias current IB, specific connection relationship are as follows: bias current IBOne end connects input voltage VIN, the other end connects grid and the drain electrode of NMOS tube MN1, while connecting NMOS tube MN2, MN3 Grid, the source electrode ground connection of NMOS tube MN1, MN2, MN3 form current-mirror structure, NMOS tube MN2 drain electrode connection PMOS tube MP1's Grid and drain electrode, while the grid of PMOS tube MP2, MP3 is connected, the source electrode of PMOS tube MP1, MP2, MP3 meet input voltage VIN, shape At current-mirror structure, MP4 grid connects feedback sample voltage VFB, drain electrode connection Q1 collector and Q1, Q2 base stage, MP5 grid connect Meet reference voltage Vref, drain electrode connection Q2 collector, the connection MP2 drain electrode of MP4, MP5 source electrode, composition Differential Input is to pipe, Q1, Q2 Transmitter ground connection forms active load, and Q3 base stage connects Q2 collector, emitter ground connection, and collector connects MP3 drain electrode, formed Enlarged structure, Q4 base stage connect Q3 collector, and collector connects input voltage VIN, emitter connection MN3 drain electrode, formation follower Structure, CCOne end connects Q3 collector, and the other end connects RC, RCOne end connects CC, other end connection Q3 base stage, formation is with zero The miller-compensated structure of point, introduces a dominant pole and a zero point, in addition the second pole that output capacitance introduces, whole system Interior band includes two poles, one zero point, reduces system to the dependence of output capacitance ESR, guarantees the stability of system loop.
As shown in figure 4, the buffer includes the 6th PMOS tube MP6, the 7th PMOS tube MP7, the 8th PMOS tube MP8, the Four NMOS tube NMOS tube MN4, the 5th NMOS tube MN5, the 7th transistor Q7, the 8th transistor Q8,
Bias current sources IBOne termination input voltage VIN, the other end connect the 4th NMOS tube MN4 grid and drain electrode, together When connect the 5th NMOS tube MN5 grid；The source electrode ground connection of 4th NMOS tube MN4, the 5th NMOS tube MN5, form current mirror knot Structure；The grid of the 6th PMOS tube MP6 of 5th NMOS tube MN5 drain electrode connection and drain electrode, while connecting the 7th PMOS tube MP7, the 8th The grid of POS pipe MP8, the 6th PMOS tube MP6, the 7th PMOS tube MP7, the 8th PMOS tube MP8 source electrode meet input voltage VIN, shape At current-mirror structure；
7th PMOS tube MP7 drain electrode the 7th transistor Q7 collector of connection and the 8th transistor Q8 base stage, the 7th transistor Q7 emitter ground connection, base stage meet the 6th transistor Q6 base voltage VBQ6And the 6th transistor Q6 formed current-mirror structure；8th Transistor Q8 emitter ground connection, collector connect the 8th PMOS tube MP8 and drain and connect power tube MPGrid.Buffer formed across Structure is hindered, the image current signal of Q6 is converted into voltage signal, drives the grid of PMOS power tube.
When in a short time a larger increase occurs for the load current of low-voltage difference adjustor, output voltage V can be madeOUT It reduces rapidly, output voltage VOUTReduction can be inputted by the emitter of Q5, reduce Q5 collector current, Q5 collector electricity Stream is mirrored to the input terminal across resistance buffer by Q6, due to the reduction of Q5 collector current, makes the output electricity across resistance buffer Pressure reduces, and adjustment PMOS power tube grid decline increases power tube and exports electric current, compensates VOUTReduction.
Conversely, output electricity can be made when in a short time larger reduction occurs for the load current of low-voltage difference adjustor Press VOUTIt increases rapidly, output voltage VOUTRaising can be inputted by the emitter of Q5, make Q5 collector current increase, Q5 current collection Electrode current is mirrored to the input terminal across resistance buffer by Q6, due to the increase of Q5 collector current, makes across the defeated of resistance buffer Voltage increases out, and adjustment PMOS power tube grid rises, and reduces power tube and exports electric current, compensates VOUTRaising.
Error amplifier link by quiescent current due to being limited, and the finite electric current of PMOS tube MP3 is to miller-compensated electric capacity Cc Charging, can generate biggish delay time, strong influence loop transient response speed, introduce Q5, Q6 and buffer formed Fast transient response circuit, output voltage VOUTTransient changing need not move through feedback sample resistance Rf1And Rf2And error is put Big device link reduces loop delay, fast transient response can be realized under the premise of not increasing quiescent current.

Claims (1)

1. a kind of fast transient response low-voltage difference adjustor, including error amplifier, power tube Mp and feedback sample resistance, It is characterized in that, further include buffer, PNP transistor (Q5) and NPN transistor (Q6),
The base stage of output termination PNP transistor (Q5) of error amplifier, the emitter of PNP transistor (Q5) connect voltage adjuster Output end (VOUT)；The collector and base stage of NPN transistor (Q6) connect the collector of PNP transistor (Q5), NPN transistor (Q6) emitter ground connection, base stage are also connect with the first input end of buffer；Output termination power tube (Mp) of buffer Grid；The input of power tube (Mp) terminates input voltage (VIN), the emitter of output termination PNP transistor (Q5)；PNP transistor (Q5) emitter passes through concatenated first feedback sample resistance (Rf1) and the second feedback sample resistance (Rf2) ground connection, first is anti- Present sampling resistor (Rf1) and the second feedback sample resistance (Rf2) tie point connect the reverse input end of error amplifier；
The buffer includes the 6th PMOS tube (MP6), the 7th PMOS tube (MP7), the 8th PMOS tube (MP8), the 4th NMOS tube (MN4), the 5th NMOS tube (MN5), the 7th transistor (Q7), the 8th transistor (Q8),
Bias current sources IBOne termination input voltage VIN, the other end connect the 4th NMOS tube (MN4) grid and drain electrode, simultaneously Connect the grid of the 5th NMOS tube (MN5)；The source electrode ground connection of 4th NMOS tube (MN4), the 5th NMOS tube (MN5), forms electric current Mirror structure；The grid of 5th NMOS tube (MN5) drain electrode the 6th PMOS tube (MP6) of connection and drain electrode, while connecting the 7th PMOS tube (MP7), the 8th POS manages the grid of (MP8), the 6th PMOS tube (MP6), the 7th PMOS tube (MP7), the 8th PMOS tube (MP8) Source electrode meets input voltage VIN, form current-mirror structure；
7th PMOS tube (MP7) drain electrode the 7th transistor (Q7) collector of connection and the 8th transistor (Q8) base stage, the 7th crystal (Q7) emitter ground connection is managed, base stage meets the 6th transistor (Q6) base voltage VBQ6And the 6th transistor (Q6) formed current mirror knot Structure；8th transistor (Q8) emitter ground connection, collector connect the 8th PMOS tube (MP8) and drain and connect power tube MPGrid.
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CN108062139A (en) * 2018-02-06 2018-05-22 上海毅栈半导体科技有限公司 A kind of LDO circuit of the LDO circuit of ultra low quiescent power consumption and the ultra low quiescent power consumption of driving heavy load
US10554204B1 (en) * 2018-12-20 2020-02-04 Analog Devices, Inc. Load bypass slew control techniques
CN112309995B (en) * 2019-10-30 2023-05-30 成都华微电子科技股份有限公司 Ceramic tube shell of voltage regulator, packaging structure and manufacturing method thereof
CN113067469B (en) * 2021-03-30 2022-07-15 苏州源特半导体科技有限公司 Quick response loop compensation circuit, loop compensation chip and switching power supply
CN113791658B (en) * 2021-08-26 2022-08-02 西安理工大学 LDO (Low dropout regulator) accelerating circuit capable of realizing rapid transient response
CN115167600B (en) * 2022-07-29 2023-07-11 西安微电子技术研究所 Low-dropout linear voltage regulator circuit capable of resisting output voltage transient overshoot
CN115373458B (en) * 2022-10-24 2022-12-27 成都市安比科技有限公司 LDO power supply with output voltage quick response

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