CN106688184A - 用于低毛刺噪声分段式dac的混合r‑2r结构 - Google Patents
用于低毛刺噪声分段式dac的混合r‑2r结构 Download PDFInfo
- Publication number
- CN106688184A CN106688184A CN201580026954.2A CN201580026954A CN106688184A CN 106688184 A CN106688184 A CN 106688184A CN 201580026954 A CN201580026954 A CN 201580026954A CN 106688184 A CN106688184 A CN 106688184A
- Authority
- CN
- China
- Prior art keywords
- stages
- dac
- resistive
- current
- pair
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
- H03M1/0863—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of switching transients, e.g. glitches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0602—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
- H03M1/0612—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic over the full range of the converter, e.g. for correcting differential non-linearity
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
- H03M1/0863—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of switching transients, e.g. glitches
- H03M1/0881—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of switching transients, e.g. glitches by forcing a gradual change from one output level to the next, e.g. soft-start
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/68—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits
- H03M1/687—Segmented, i.e. the more significant bit converter being of the unary decoded type and the less significant bit converter being of the binary weighted type
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/74—Simultaneous conversion
- H03M1/78—Simultaneous conversion using ladder network
- H03M1/785—Simultaneous conversion using ladder network using resistors, i.e. R-2R ladders
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Analogue/Digital Conversion (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201462003497P | 2014-05-27 | 2014-05-27 | |
| US62/003,497 | 2014-05-27 | ||
| US14/493,254 | 2014-09-22 | ||
| US14/493,254 US9178524B1 (en) | 2014-05-27 | 2014-09-22 | Hybrid R-2R structure for low glitch noise segmented DAC |
| PCT/US2015/029535 WO2015183496A1 (en) | 2014-05-27 | 2015-05-06 | Hybrid r-2r structure for low glitch noise segmented dac |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106688184A true CN106688184A (zh) | 2017-05-17 |
Family
ID=54352833
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201580026954.2A Pending CN106688184A (zh) | 2014-05-27 | 2015-05-06 | 用于低毛刺噪声分段式dac的混合r‑2r结构 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9178524B1 (https=) |
| EP (1) | EP3149858A1 (https=) |
| JP (1) | JP6542263B2 (https=) |
| KR (1) | KR20170009874A (https=) |
| CN (1) | CN106688184A (https=) |
| WO (1) | WO2015183496A1 (https=) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20170083222A (ko) * | 2016-01-08 | 2017-07-18 | 삼성전자주식회사 | 헤드폰 드라이버 및 이를 포함하는 사운드 프로세서 |
| US10200055B2 (en) * | 2017-01-11 | 2019-02-05 | Analog Devices Global | Glitch characterization in digital-to-analog conversion |
| EP3616322B1 (en) * | 2017-04-25 | 2026-03-18 | Telefonaktiebolaget LM Ericsson (PUBL) | Digital-to-analog conversion circuit |
| CN110663188B (zh) * | 2017-06-21 | 2023-04-04 | 德州仪器公司 | 分段式数/模转换器 |
| US10014877B1 (en) * | 2017-09-01 | 2018-07-03 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Multi-segmented all logic DAC |
| CN111434041B (zh) | 2017-12-21 | 2024-08-16 | 德州仪器公司 | 内插数/模转换器(dac) |
| CN110557123A (zh) | 2018-06-04 | 2019-12-10 | 恩智浦美国有限公司 | 分段式电阻型数模转换器 |
| US10447292B1 (en) | 2018-08-27 | 2019-10-15 | Qualcomm Incorporated | Multiple-bit parallel successive approximation register (SAR) analog-to-digital converter (ADC) circuits |
| US10425095B1 (en) | 2018-08-27 | 2019-09-24 | Qualcomm Incorporated | Multiple-bit parallel successive approximation (SA) flash analog-to-digital converter (ADC) circuits |
| US10454487B1 (en) | 2018-08-30 | 2019-10-22 | Qualcomm Incorporated | Segmented resistor architecture for digital-to-analog converters |
| US10333544B1 (en) | 2018-09-19 | 2019-06-25 | Qualcomm Incorporated | Digital-to-analog converter (DAC) circuits employing resistor rotator circuits configured to be included in analog-to-digital converter (ADC) circuits |
| CN110380692B (zh) * | 2019-06-28 | 2020-11-24 | 上海类比半导体技术有限公司 | 一种差分放大器的修调电路 |
| US10756744B1 (en) * | 2019-07-18 | 2020-08-25 | Apple Inc. | Linearity improvement for segmented R-DACs |
| US11791832B2 (en) * | 2022-01-18 | 2023-10-17 | Nxp B.V. | Timing calibration technique for radio frequency digital-to-analog converter |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0414593A2 (en) * | 1989-08-19 | 1991-02-27 | Fujitsu Limited | Digital-to-analog converter having a ladder type resistor network |
| US20060092065A1 (en) * | 2004-10-29 | 2006-05-04 | Broadcom Corporation | Delay equalized z/2z ladder for digital to analog conversion |
| CN105009457A (zh) * | 2013-03-08 | 2015-10-28 | 高通股份有限公司 | 低毛刺噪声dac |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61245718A (ja) * | 1985-04-24 | 1986-11-01 | Iwatsu Electric Co Ltd | デイジタル−アナログ変換器 |
| JPS6294024A (ja) * | 1985-10-21 | 1987-04-30 | Toshiba Corp | C−r型d/a変換器 |
| JP3335820B2 (ja) * | 1995-11-14 | 2002-10-21 | 川崎マイクロエレクトロニクス株式会社 | Daコンバータ |
| JPH10112654A (ja) * | 1996-10-07 | 1998-04-28 | Toshiba Corp | 電流セグメント方式ディジタル・アナログ変換器 |
| JPH10135836A (ja) * | 1996-10-29 | 1998-05-22 | Sanyo Electric Co Ltd | D/a変換器 |
| US6633248B2 (en) | 2001-05-29 | 2003-10-14 | Intel Corporation | Converting digital signals to analog signals |
| US6583744B2 (en) * | 2001-06-22 | 2003-06-24 | Texas Instruments Incorporated | Correction circuit for beta mismatch between thermometer encoded and R-2R ladder segments of a current steering DAC |
| US6924761B2 (en) * | 2003-06-19 | 2005-08-02 | Intel Corporation | Differential digital-to-analog converter |
| US7679538B2 (en) * | 2005-08-12 | 2010-03-16 | Tsang Robin M | Current-steering type digital-to-analog converter |
| US7283082B1 (en) | 2006-06-16 | 2007-10-16 | Texas Instruments Incorporated | High-speed, high-resolution voltage output digital-to-analog converter and method |
| EP2019490B1 (en) | 2007-07-27 | 2018-07-18 | Socionext Inc. | Segmented circuitry |
| JP2010004422A (ja) * | 2008-06-23 | 2010-01-07 | Sharp Corp | D/a変換回路 |
| US8984035B2 (en) | 2009-01-28 | 2015-03-17 | Ess Technology, Inc. | Channel select filter apparatus and method |
| US7812665B2 (en) | 2009-02-23 | 2010-10-12 | Number 14 B.V. | Amplifiers with input offset trim and methods |
| US8089380B2 (en) * | 2009-08-17 | 2012-01-03 | Analog Devices, Inc. | Voltage mode DAC with calibration circuit using current mode DAC and ROM lookup |
| US8169353B2 (en) * | 2009-09-30 | 2012-05-01 | Qualcomm, Incorporated | Wideband digital to analog converter with built-in load attenuator |
| JP2012050004A (ja) * | 2010-08-30 | 2012-03-08 | Renesas Electronics Corp | Da変換器 |
| US8330634B2 (en) * | 2011-02-08 | 2012-12-11 | Maxim Integrated Products, Inc. | Precision sub-radix2 DAC with linearity calibration |
| US8941522B2 (en) | 2012-05-04 | 2015-01-27 | Analog Devices Technology | Segmented digital-to-analog converter having weighted current sources |
-
2014
- 2014-09-22 US US14/493,254 patent/US9178524B1/en active Active
-
2015
- 2015-05-06 CN CN201580026954.2A patent/CN106688184A/zh active Pending
- 2015-05-06 WO PCT/US2015/029535 patent/WO2015183496A1/en not_active Ceased
- 2015-05-06 KR KR1020167032805A patent/KR20170009874A/ko not_active Withdrawn
- 2015-05-06 EP EP15722019.5A patent/EP3149858A1/en not_active Withdrawn
- 2015-05-06 JP JP2016569747A patent/JP6542263B2/ja not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0414593A2 (en) * | 1989-08-19 | 1991-02-27 | Fujitsu Limited | Digital-to-analog converter having a ladder type resistor network |
| US20060092065A1 (en) * | 2004-10-29 | 2006-05-04 | Broadcom Corporation | Delay equalized z/2z ladder for digital to analog conversion |
| CN105009457A (zh) * | 2013-03-08 | 2015-10-28 | 高通股份有限公司 | 低毛刺噪声dac |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20170009874A (ko) | 2017-01-25 |
| WO2015183496A1 (en) | 2015-12-03 |
| EP3149858A1 (en) | 2017-04-05 |
| US9178524B1 (en) | 2015-11-03 |
| JP2017520172A (ja) | 2017-07-20 |
| JP6542263B2 (ja) | 2019-07-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9178524B1 (en) | Hybrid R-2R structure for low glitch noise segmented DAC | |
| Eloranta et al. | A Multimode Transmitter in 0.13$\mu\hbox {m} $ CMOS Using Direct-Digital RF Modulator | |
| Ravi et al. | A 2.4-GHz 20–40-MHz channel WLAN digital outphasing transmitter utilizing a delay-based wideband phase modulator in 32-nm CMOS | |
| US7539462B2 (en) | Configurable multi-mode modulation system and transmitter | |
| KR20120027230A (ko) | Rf 전력 증폭기, 서브 미크론 cmos 집적 회로, 송수신기 및 rf 신호 증폭 방법 | |
| US11411567B2 (en) | Phase interpolation-based fractional-N sampling phase-locked loop | |
| US11271576B1 (en) | Digital-to-analog converter (DAC) with common-mode correction | |
| US10298187B2 (en) | Selective high and low power amplifier switch architecture | |
| Lim et al. | A 65-nm CMOS $2\times2 $ MIMO Multi-Band LTE RF Transceiver for Small Cell Base Stations | |
| US10305361B2 (en) | Low voltage input calibrating digital to analog converter | |
| US10461768B1 (en) | Digital-to-analog converter (DAC) design with reduced settling time | |
| US20240106467A1 (en) | Envelope tracking for radio frequency (rf) front end modules | |
| EP1925094B1 (en) | Multi-band radio frequency modulator | |
| JP5416281B2 (ja) | 送信器 | |
| US10840929B1 (en) | Digital-to-analog converter (DAC) with common-mode correction | |
| JP6625564B2 (ja) | コモンモード補償を用いた差動モード帯域幅拡張技法 | |
| US20170063309A1 (en) | Methods and apparatus for reducing transient glitches in audio amplifiers | |
| US9608569B2 (en) | Linearizing scheme for baseband filter with active feedback | |
| US12362761B2 (en) | Digital-to-analog converter (DAC) with dynamic stacked cascode switches | |
| Eloranta | Direct-Digital RF Modulator for Multi-Standard Radio Transmitters | |
| Castello et al. | Multimode reconfigurable wireless terminals: A first step toward software defined radio |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20170517 |
|
| WD01 | Invention patent application deemed withdrawn after publication |