CN106683979B - 在键合前清洗键合表面的方法 - Google Patents

在键合前清洗键合表面的方法 Download PDF

Info

Publication number
CN106683979B
CN106683979B CN201611226886.7A CN201611226886A CN106683979B CN 106683979 B CN106683979 B CN 106683979B CN 201611226886 A CN201611226886 A CN 201611226886A CN 106683979 B CN106683979 B CN 106683979B
Authority
CN
China
Prior art keywords
bonding
cleaning
before bonding
crystal
surfacing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201611226886.7A
Other languages
English (en)
Other versions
CN106683979A (zh
Inventor
魏星
陈猛
常永伟
陈国兴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Simgui Technology Co Ltd
Original Assignee
Shanghai Simgui Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Simgui Technology Co Ltd filed Critical Shanghai Simgui Technology Co Ltd
Priority to CN201611226886.7A priority Critical patent/CN106683979B/zh
Publication of CN106683979A publication Critical patent/CN106683979A/zh
Priority to US15/905,339 priority patent/US10618082B2/en
Application granted granted Critical
Publication of CN106683979B publication Critical patent/CN106683979B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B08—CLEANING
    • B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
    • B08B3/00—Cleaning by methods involving the use or presence of liquid or steam
    • B08B3/04—Cleaning involving contact with liquid
    • B08B3/08—Cleaning involving contact with liquid the liquid having chemical or dissolving effect
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02052—Wet cleaning only
    • C—CHEMISTRY; METALLURGY
    • C11—ANIMAL OR VEGETABLE OILS, FATS, FATTY SUBSTANCES OR WAXES; FATTY ACIDS THEREFROM; DETERGENTS; CANDLES
    • C11D—DETERGENT COMPOSITIONS; USE OF SINGLE SUBSTANCES AS DETERGENTS; SOAP OR SOAP-MAKING; RESIN SOAPS; RECOVERY OF GLYCEROL
    • C11D7/00—Compositions of detergents based essentially on non-surface-active compounds
    • C11D7/02—Inorganic compounds
    • C11D7/04—Water-soluble compounds
    • C11D7/06—Hydroxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B08—CLEANING
    • B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
    • B08B2203/00—Details of cleaning machines or methods involving the use or presence of liquid or steam
    • B08B2203/007—Heating the liquid
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B08—CLEANING
    • B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
    • B08B3/00—Cleaning by methods involving the use or presence of liquid or steam
    • B08B3/04—Cleaning involving contact with liquid
    • B08B3/10—Cleaning involving contact with liquid with additional treatment of the liquid or of the object being cleaned, e.g. by heat, by electricity or by vibration
    • C—CHEMISTRY; METALLURGY
    • C11—ANIMAL OR VEGETABLE OILS, FATS, FATTY SUBSTANCES OR WAXES; FATTY ACIDS THEREFROM; DETERGENTS; CANDLES
    • C11D—DETERGENT COMPOSITIONS; USE OF SINGLE SUBSTANCES AS DETERGENTS; SOAP OR SOAP-MAKING; RESIN SOAPS; RECOVERY OF GLYCEROL
    • C11D2111/00—Cleaning compositions characterised by the objects to be cleaned; Cleaning compositions characterised by non-standard cleaning or washing processes
    • C11D2111/10—Objects to be cleaned
    • C11D2111/14—Hard surfaces
    • C11D2111/22—Electronic devices, e.g. PCBs or semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/161—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table including two or more of the elements provided for in group H01L29/16, e.g. alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Oil, Petroleum & Natural Gas (AREA)
  • Wood Science & Technology (AREA)
  • Organic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Cleaning Or Drying Semiconductors (AREA)

Abstract

本发明提供了一种在键合前清洗键合表面的方法，包括如下步骤：提供两个用于键合的第一表面和第二表面，所述第一表面为非晶表面，第二表面为晶体表面；在键合前采用氨水分别清洗所述第一表面和第二表面，清洗所述第一表面所采用的氨水浓度和清洗温度两个参数中的至少一个参数高于清洗所述第二表面所采用的参数。

Description

在键合前清洗键合表面的方法
技术领域
本发明涉及半导体材料制造领域，尤其涉及一种在键合前清洗键合表面的方法。
背景技术
键合是半导体工艺中常见工艺。键合界面接触是否良好是衡量键合质量的重要标准。现有技术中将两个衬底进行键合后，有时在衬底缺口的对侧会发现键合接触的不良区域。附图1所示是现有技术中键合界面产生不良区域的示意图。在衬底10的缺口11的对侧的键合区域，会产生键合界面的接触不良。如何避免这一区域产生接触不良，是现有技术需要解决的问题。
发明内容
本发明所要解决的技术问题是，提供一种能够提高键合界面质量的键合方法。
为了解决上述问题，本发明提供了一种在键合前清洗键合表面的方法，包括如下步骤：提供两个用于键合的第一表面和第二表面，所述第一表面为非晶表面，第二表面为晶体表面；在键合前采用氨水分别清洗所述第一表面和第二表面，清洗所述第一表面所采用的氨水浓度和清洗温度两个参数中的至少一个参数高于清洗所述第二表面所采用的参数。
可选的，所述氨水为含有过氧化氢的缓冲溶液。
可选的，所述第一表面的表面材料为氧化物。
可选的，所述第二表面的表面材料为半导体。
可选的，所述第一表面的表面材料选自于氧化硅、氮化硅和氮氧化硅中的任意一种。
可选的，所述第二表面的表面材料选自于硅晶体、锗硅晶体、碳化硅晶体、氮化镓晶体以及砷化镓晶体中的任意一种。
可选的，所述第二表面的表面材料为表面覆盖非晶薄膜的半导体，所述非晶薄膜的厚度小于50nm。
可选的，所述非晶薄膜的材料选自于氧化硅、氮化硅和氮氧化硅中的任意一种。
本发明通过清洗所述第一表面所采用的氨水浓度和清洗温度两个参数中的至少一个参数高于清洗所述第二表面所采用的参数的方法，降低了晶体表面的键合活性，从而降低键合波的传播速度，有利于键合面形成密切接触。
附图说明
附图1所示是现有技术中键合界面产生不良区域的示意图。
附图2所示是本发明一具体实施方式所述方法的实施步骤示意图。
具体实施方式
下面结合附图对本发明提供的一种在键合前清洗键合表面的方法的具体实施方式做详细说明。
附图2所示是本具体实施方式所述方法的实施步骤示意图，包括如下步骤：步骤S20，提供用于键合的第一表面和第二表面；步骤S21，在键合前采用氨水清洗所述第一表面；步骤S22，在键合前采用氨水清洗所述第二表面。
步骤S20，提供用于键合的第一表面和第二表面。所述第一表面为非晶表面，第二表面为晶体表面。
作为一个具体实施方式，所述第一表面的表面材料为氧化物，所述第二表面的表面材料为半导体。在这一具体实施方式中，所述第一表面可以是形成于一支撑衬底表面的氧化层。所述支撑衬底的材料选自于硅晶体、锗硅晶体、碳化硅晶体、氮化镓晶体以及砷化镓晶体中的任意一种，也可以是蓝宝石衬底以及金属衬底等；所述第一表面的表面材料选自于氧化硅、氮化硅和氮氧化硅中的任意一种。例如可以是在单晶硅衬底表面的氧化硅层，所述第一表面是该氧化硅层的表面。而第二表面可以是一半导体衬底的一个表面。所述半导体衬底的材料选自于硅晶体、锗硅晶体、碳化硅晶体、氮化镓晶体以及砷化镓晶体中的任意一种，例如可以是单晶硅衬底，所述第二表面为该衬底的一个面。
作为一个具体实施方式，所述第二表面的表面材料也可以是表面覆盖非晶薄膜的半导体，所述非晶薄膜的厚度小于50nm。所述非晶薄膜的材料选自于氧化硅、氮化硅和氮氧化硅中的任意一种。所述半导体的材料选自于硅晶体、锗硅晶体、碳化硅晶体、氮化镓晶体以及砷化镓晶体中的任意一种。例如所述第二表面可以是覆盖厚度小于50nm氧化硅层的单晶硅。由于非晶薄膜的厚度较小，因此该表面在键合中会表现出半导体材料的特征。
步骤S21，在键合前采用氨水清洗所述第一表面。在键合前需要对第一表面进行清洗以去除杂质，清洗所采用的方法包括RCA标准清洗法或者其他类似的清洗方法。为了去除金属污染物和有机污染物，所采用的清洗方法中应当包括采用氨水清洗的步骤。在本具体实施方式中，该步骤所采用的清洗液优选为氨水的缓冲溶液，即NH4OH、H2O2、H2O按照一比例配比形成的溶液。该配比的比例范围例如可以是1:1:5～1:2:7。清洗的温度范围根据实际需要可以是50℃～80℃。
步骤S22，在键合前采用氨水清洗所述第二表面。在键合前需要对第二表面进行清洗以去除杂质，清洗所采用的方法包括RCA标准清洗法或者其他类似的清洗方法。为了去除金属污染物和有机污染物，所采用的清洗方法中应当包括采用氨水清洗的步骤。在本具体实施方式中，该步骤所采用的清洗液优选为氨水的缓冲溶液，即NH4OH、H2O2、H2O按照一比例配比形成的溶液。该配比的比例范围例如可以是1:1:5～1:2:7。清洗的温度范围根据实际需要可以是50℃～80℃。在本步骤中，所采用的清洗液中氨水的浓度，即NH4OH在溶液中的浓度，应当低于步骤S21，或者所采用的清洗温度低于步骤S21。也可以是上述两个条件均被实施，即NH4OH在溶液中的浓度低于步骤S21，且所采用的清洗温度也低于步骤S21。并优选为NH4OH在溶液中的浓度低于步骤S21，因为实践表明氨水浓度改变起到的效果要优于温度。例如，NH4OH：H2O2＝1:2条件下，清洗第一表面温度为70℃，清洗第二表面为50℃；如果同为70℃清洗，第一表面使用NH4OH：H2O2＝3：4清洗液，第二表面使用NH4OH：H2O2＝1：2清洗液。也可以是清洗第一表面温度为50℃，清洗第二表面为70℃，并且第一表面使用NH4OH：H2O2＝3：4清洗液，第二表面使用NH4OH：H2O2＝1：2清洗液。
上述两个表面会被用于键合。键合面的形成机制是键合过程中的键合波沿着键合面传播而使两个键合面密切接触。对于具有一缺口的半导体衬底而言，键合波会首先在该缺口处形成并沿着该缺口向外发散。对于不具有缺口的其他形状的键合表面，键合波也会随机选择一个或者几个点形成，并向外发散。键合波的发散速度越慢越有利于键合面形成密切接触。而键合波的发散速度是由表面的键合活性决定的，并且晶体表面的键合活性高于非晶表面。表面覆盖非晶薄膜的半导体材料表面在键合中会表现出半导体材料的特征，即晶体特征。对于非晶和晶体的键合，表面的键合速度主要由键合活性更高的晶体表面决定的。实验发现，氨水清洗有利于活化表面的键合活性，浓度越高活化作用越明显，清洗温度越高活化作用越明显。因此本具体实施方式通过清洗所述第一表面所采用的氨水浓度和清洗温度两个参数中的至少一个参数高于清洗所述第二表面所采用的参数的方法，降低了晶体表面的键合活性，从而降低键合波的传播速度，有利于键合面形成密切接触。
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (6)

1.一种在键合前清洗键合表面的方法，其特征在于，包括如下步骤：
提供用于键合的第一表面和第二表面，所述第一表面为非晶表面，第二表面为晶体表面；
在键合前采用氨水分别清洗所述第一表面和第二表面，清洗所述第一表面所采用的氨水浓度和清洗温度这两个参数均高于清洗所述第二表面所采用的参数，以降低所述晶体表面的键合活性。
2.根据权利要求1所述的在键合前清洗键合表面的方法，其特征在于，所述氨水为含有过氧化氢的缓冲溶液。
3.根据权利要求1所述的在键合前清洗键合表面的方法，其特征在于，所述第一表面的表面材料为氧化物。
4.根据权利要求1所述的在键合前清洗键合表面的方法，其特征在于，所述第二表面的表面材料为半导体。
5.根据权利要求1所述的在键合前清洗键合表面的方法，其特征在于，所述第一表面的表面材料选自于氧化硅、氮化硅和氮氧化硅中的任意一种。
6.根据权利要求1所述的在键合前清洗键合表面的方法，其特征在于，所述第二表面的表面材料选自于硅晶体、锗硅晶体、碳化硅晶体、氮化镓晶体以及砷化镓晶体中的任意一种。
CN201611226886.7A 2016-12-27 2016-12-27 在键合前清洗键合表面的方法 Active CN106683979B (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201611226886.7A CN106683979B (zh) 2016-12-27 2016-12-27 在键合前清洗键合表面的方法
US15/905,339 US10618082B2 (en) 2016-12-27 2018-02-26 Method for cleaning bonding interface before bonding

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201611226886.7A CN106683979B (zh) 2016-12-27 2016-12-27 在键合前清洗键合表面的方法

Publications (2)

Publication Number Publication Date
CN106683979A CN106683979A (zh) 2017-05-17
CN106683979B true CN106683979B (zh) 2019-07-19

Family

ID=58871895

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201611226886.7A Active CN106683979B (zh) 2016-12-27 2016-12-27 在键合前清洗键合表面的方法

Country Status (2)

Country Link
US (1) US10618082B2 (zh)
CN (1) CN106683979B (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109437096A (zh) * 2018-10-25 2019-03-08 中国科学院苏州纳米技术与纳米仿生研究所南昌研究院 晶圆键合方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1996551A (zh) * 2005-12-28 2007-07-11 中国科学院半导体研究所 晶片直接键合过程中实验参数的优化方法
CN102842488A (zh) * 2012-08-24 2012-12-26 上海新傲科技股份有限公司 在衬底的双面制造器件的方法以及衬底

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05136014A (ja) * 1991-11-15 1993-06-01 Sumitomo Metal Mining Co Ltd 貼り合わせｓｏｉ基板の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1996551A (zh) * 2005-12-28 2007-07-11 中国科学院半导体研究所 晶片直接键合过程中实验参数的优化方法
CN102842488A (zh) * 2012-08-24 2012-12-26 上海新傲科技股份有限公司 在衬底的双面制造器件的方法以及衬底

Also Published As

Publication number Publication date
US10618082B2 (en) 2020-04-14
CN106683979A (zh) 2017-05-17
US20180178257A1 (en) 2018-06-28

Similar Documents

Publication Publication Date Title
JP5018066B2 (ja) 歪Ｓｉ基板の製造方法
CN109786229B (zh) 一种晶圆键合方法以及相应的异质衬底制备的方法
US20120015497A1 (en) Preparing a Surface of a Sapphire Substrate for Fabricating Heterostructures
TW200818294A (en) Inspection method of compound semiconductor substrate, compound semiconductor substrate, surface treatment method of compound semiconductor substrate, and method of producing compound semiconductor crystal
JP2007005472A (ja) 基板の表面処理方法およびｉｉｉ−ｖ族化合物半導体の製造方法
TWI721955B (zh) 氮化鋁單結晶基板的洗淨方法及層疊體
KR20090006265A (ko) 플라즈마 세정 방법
TW201243921A (en) Cleaning method of semiconductor wafer
US20130040440A1 (en) EPITAXIAL PROCESS WITH SURFACE CLEANING FIRST USING HCl/GeH4/H2SiCl2
CN106683979B (zh) 在键合前清洗键合表面的方法
JP4700652B2 (ja) 層構造の製造方法
KR100925359B1 (ko) 에피택셜 웨이퍼 및 그 제조 방법
JP4370862B2 (ja) 積層基板の洗浄方法および基板の貼り合わせ方法
KR20080075508A (ko) 반도체 웨이퍼의 평면연삭방법 및 제조방법
JP2007081361A5 (zh)
TWI273652B (en) Method of preparing the surface of a Si substrate or layer or source and drain recess of semiconductor elements for depositing an epitaxial layer of SiGe
US8076219B2 (en) Reduction of watermarks in HF treatments of semiconducting substrates
US10964529B2 (en) Method for cleaning lanthanum gallium silicate wafer
TWI619149B (zh) 磊晶層的形成方法
JP4351497B2 (ja) 半導体装置の製造方法、及び半導体製造装置
JP2003086553A (ja) 半導体結晶ウェハ
JP5148313B2 (ja) 気相のフッ化水素酸での洗浄および脱イオン水でのすすぎを用いる分子接合方法
TWI754299B (zh) 氮化鎵高電子遷移率晶片及其製造方法
US11211259B2 (en) Structure and method for embedded gettering in a silicon on insulator wafer
Moutanabbir et al. III-V and III-Nitride Engineered Heterostructures: Wafer Bonding, Ion Slicing, and More

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant