CN106558585A - 半导体器件及半导体器件的制造方法 - Google Patents

半导体器件及半导体器件的制造方法 Download PDF

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Publication number
CN106558585A
CN106558585A CN201610862656.3A CN201610862656A CN106558585A CN 106558585 A CN106558585 A CN 106558585A CN 201610862656 A CN201610862656 A CN 201610862656A CN 106558585 A CN106558585 A CN 106558585A
Authority
CN
China
Prior art keywords
bit line
semiconductor device
sram
capacitive element
cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201610862656.3A
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English (en)
Chinese (zh)
Inventor
高冈洋道
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Publication of CN106558585A publication Critical patent/CN106558585A/zh
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/495—Capacitive arrangements or effects of, or between wiring layers
    • H10W20/496—Capacitor integral with wiring layers

Landscapes

  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Dram (AREA)
CN201610862656.3A 2015-09-30 2016-09-28 半导体器件及半导体器件的制造方法 Pending CN106558585A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015-194130 2015-09-30
JP2015194130A JP2017069420A (ja) 2015-09-30 2015-09-30 半導体装置および半導体装置の製造方法

Publications (1)

Publication Number Publication Date
CN106558585A true CN106558585A (zh) 2017-04-05

Family

ID=58406778

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610862656.3A Pending CN106558585A (zh) 2015-09-30 2016-09-28 半导体器件及半导体器件的制造方法

Country Status (3)

Country Link
US (1) US20170092649A1 (https=)
JP (1) JP2017069420A (https=)
CN (1) CN106558585A (https=)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9564217B1 (en) * 2015-10-19 2017-02-07 United Microelectronics Corp. Semiconductor memory device having integrated DOSRAM and NOSRAM
US10217794B2 (en) 2017-05-24 2019-02-26 Globalfoundries Singapore Pte. Ltd. Integrated circuits with vertical capacitors and methods for producing the same
US11282815B2 (en) 2020-01-14 2022-03-22 Micron Technology, Inc. Methods of forming microelectronic devices, and related microelectronic devices and electronic systems
US11699652B2 (en) 2020-06-18 2023-07-11 Micron Technology, Inc. Microelectronic devices and electronic systems
US11563018B2 (en) 2020-06-18 2023-01-24 Micron Technology, Inc. Microelectronic devices, and related methods, memory devices, and electronic systems
US11705367B2 (en) 2020-06-18 2023-07-18 Micron Technology, Inc. Methods of forming microelectronic devices, and related microelectronic devices, memory devices, electronic systems, and additional methods
US11335602B2 (en) 2020-06-18 2022-05-17 Micron Technology, Inc. Methods of forming microelectronic devices, and related microelectronic devices and electronic systems
US11557569B2 (en) 2020-06-18 2023-01-17 Micron Technology, Inc. Microelectronic devices including source structures overlying stack structures, and related electronic systems
US11380669B2 (en) 2020-06-18 2022-07-05 Micron Technology, Inc. Methods of forming microelectronic devices
US11417676B2 (en) 2020-08-24 2022-08-16 Micron Technology, Inc. Methods of forming microelectronic devices and memory devices, and related microelectronic devices, memory devices, and electronic systems
US11825658B2 (en) 2020-08-24 2023-11-21 Micron Technology, Inc. Methods of forming microelectronic devices and memory devices
US11751408B2 (en) 2021-02-02 2023-09-05 Micron Technology, Inc. Methods of forming microelectronic devices, and related microelectronic devices, memory devices, and electronic systems
US12308309B2 (en) * 2021-11-17 2025-05-20 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device with integrated metal-insulator-metal capacitors
US11791391B1 (en) 2022-03-18 2023-10-17 Micron Technology, Inc. Inverters, and related memory devices and electronic systems

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6091628A (en) * 1997-12-31 2000-07-18 Samsung Electronics Co., Ltd. Static random access memory device and method of manufacturing the same
US20050141265A1 (en) * 2003-12-26 2005-06-30 Renesas Technology Corp. Semiconductor memory device
CN101814490A (zh) * 2009-02-25 2010-08-25 台湾积体电路制造股份有限公司 集成电路结构
CN102254916A (zh) * 2010-05-19 2011-11-23 瑞萨电子株式会社 半导体器件和制造半导体器件的方法
US20120091559A1 (en) * 2009-11-13 2012-04-19 Taiwan Semiconductor Manufacturing Company, Ltd. Capacitor and Method for Making Same

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3535615B2 (ja) * 1995-07-18 2004-06-07 株式会社ルネサステクノロジ 半導体集積回路装置
JP2000174143A (ja) * 1998-12-09 2000-06-23 Hitachi Ltd スタティックｒａｍ
JP2002289703A (ja) * 2001-01-22 2002-10-04 Nec Corp 半導体記憶装置およびその製造方法
JP2008117864A (ja) * 2006-11-01 2008-05-22 Nec Electronics Corp 半導体装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6091628A (en) * 1997-12-31 2000-07-18 Samsung Electronics Co., Ltd. Static random access memory device and method of manufacturing the same
US20050141265A1 (en) * 2003-12-26 2005-06-30 Renesas Technology Corp. Semiconductor memory device
CN101814490A (zh) * 2009-02-25 2010-08-25 台湾积体电路制造股份有限公司 集成电路结构
US20120091559A1 (en) * 2009-11-13 2012-04-19 Taiwan Semiconductor Manufacturing Company, Ltd. Capacitor and Method for Making Same
CN102254916A (zh) * 2010-05-19 2011-11-23 瑞萨电子株式会社 半导体器件和制造半导体器件的方法

Also Published As

Publication number Publication date
US20170092649A1 (en) 2017-03-30
JP2017069420A (ja) 2017-04-06

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