JP2017069420A - 半導体装置および半導体装置の製造方法 - Google Patents

半導体装置および半導体装置の製造方法 Download PDF

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Publication number
JP2017069420A
JP2017069420A JP2015194130A JP2015194130A JP2017069420A JP 2017069420 A JP2017069420 A JP 2017069420A JP 2015194130 A JP2015194130 A JP 2015194130A JP 2015194130 A JP2015194130 A JP 2015194130A JP 2017069420 A JP2017069420 A JP 2017069420A
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Japan
Prior art keywords
semiconductor device
bit line
sram
cell
mim
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JP2015194130A
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English (en)
Japanese (ja)
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JP2017069420A5 (https=
Inventor
洋道 高岡
Hiromichi Takaoka
洋道 高岡
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Renesas Electronics Corp
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Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2015194130A priority Critical patent/JP2017069420A/ja
Priority to US15/270,132 priority patent/US20170092649A1/en
Priority to CN201610862656.3A priority patent/CN106558585A/zh
Publication of JP2017069420A publication Critical patent/JP2017069420A/ja
Publication of JP2017069420A5 publication Critical patent/JP2017069420A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/495—Capacitive arrangements or effects of, or between wiring layers
    • H10W20/496—Capacitor integral with wiring layers

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  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Dram (AREA)
JP2015194130A 2015-09-30 2015-09-30 半導体装置および半導体装置の製造方法 Pending JP2017069420A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2015194130A JP2017069420A (ja) 2015-09-30 2015-09-30 半導体装置および半導体装置の製造方法
US15/270,132 US20170092649A1 (en) 2015-09-30 2016-09-20 Semiconductor device and method for manufacturing the same
CN201610862656.3A CN106558585A (zh) 2015-09-30 2016-09-28 半导体器件及半导体器件的制造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2015194130A JP2017069420A (ja) 2015-09-30 2015-09-30 半導体装置および半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JP2017069420A true JP2017069420A (ja) 2017-04-06
JP2017069420A5 JP2017069420A5 (https=) 2018-06-28

Family

ID=58406778

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015194130A Pending JP2017069420A (ja) 2015-09-30 2015-09-30 半導体装置および半導体装置の製造方法

Country Status (3)

Country Link
US (1) US20170092649A1 (https=)
JP (1) JP2017069420A (https=)
CN (1) CN106558585A (https=)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9564217B1 (en) * 2015-10-19 2017-02-07 United Microelectronics Corp. Semiconductor memory device having integrated DOSRAM and NOSRAM
US10217794B2 (en) 2017-05-24 2019-02-26 Globalfoundries Singapore Pte. Ltd. Integrated circuits with vertical capacitors and methods for producing the same
US11282815B2 (en) 2020-01-14 2022-03-22 Micron Technology, Inc. Methods of forming microelectronic devices, and related microelectronic devices and electronic systems
US11699652B2 (en) 2020-06-18 2023-07-11 Micron Technology, Inc. Microelectronic devices and electronic systems
US11563018B2 (en) 2020-06-18 2023-01-24 Micron Technology, Inc. Microelectronic devices, and related methods, memory devices, and electronic systems
US11705367B2 (en) 2020-06-18 2023-07-18 Micron Technology, Inc. Methods of forming microelectronic devices, and related microelectronic devices, memory devices, electronic systems, and additional methods
US11335602B2 (en) 2020-06-18 2022-05-17 Micron Technology, Inc. Methods of forming microelectronic devices, and related microelectronic devices and electronic systems
US11557569B2 (en) 2020-06-18 2023-01-17 Micron Technology, Inc. Microelectronic devices including source structures overlying stack structures, and related electronic systems
US11380669B2 (en) 2020-06-18 2022-07-05 Micron Technology, Inc. Methods of forming microelectronic devices
US11417676B2 (en) 2020-08-24 2022-08-16 Micron Technology, Inc. Methods of forming microelectronic devices and memory devices, and related microelectronic devices, memory devices, and electronic systems
US11825658B2 (en) 2020-08-24 2023-11-21 Micron Technology, Inc. Methods of forming microelectronic devices and memory devices
US11751408B2 (en) 2021-02-02 2023-09-05 Micron Technology, Inc. Methods of forming microelectronic devices, and related microelectronic devices, memory devices, and electronic systems
US12308309B2 (en) * 2021-11-17 2025-05-20 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device with integrated metal-insulator-metal capacitors
US11791391B1 (en) 2022-03-18 2023-10-17 Micron Technology, Inc. Inverters, and related memory devices and electronic systems

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0936252A (ja) * 1995-07-18 1997-02-07 Hitachi Ltd 半導体集積回路装置およびその製造方法
JP2000174143A (ja) * 1998-12-09 2000-06-23 Hitachi Ltd スタティックｒａｍ
JP2002289703A (ja) * 2001-01-22 2002-10-04 Nec Corp 半導体記憶装置およびその製造方法
JP2005191454A (ja) * 2003-12-26 2005-07-14 Renesas Technology Corp 半導体記憶装置
JP2008117864A (ja) * 2006-11-01 2008-05-22 Nec Electronics Corp 半導体装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100265763B1 (ko) * 1997-12-31 2000-09-15 윤종용 스태틱 랜덤 억세스 메모리 장치 및 그 제조방법
CN101814490B (zh) * 2009-02-25 2012-07-04 台湾积体电路制造股份有限公司 集成电路结构
US8617949B2 (en) * 2009-11-13 2013-12-31 Taiwan Semiconductor Manufacturing Company, Ltd. Capacitor and method for making same
JP5613033B2 (ja) * 2010-05-19 2014-10-22 ルネサスエレクトロニクス株式会社 半導体装置の製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0936252A (ja) * 1995-07-18 1997-02-07 Hitachi Ltd 半導体集積回路装置およびその製造方法
JP2000174143A (ja) * 1998-12-09 2000-06-23 Hitachi Ltd スタティックｒａｍ
JP2002289703A (ja) * 2001-01-22 2002-10-04 Nec Corp 半導体記憶装置およびその製造方法
JP2005191454A (ja) * 2003-12-26 2005-07-14 Renesas Technology Corp 半導体記憶装置
JP2008117864A (ja) * 2006-11-01 2008-05-22 Nec Electronics Corp 半導体装置

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Publication number Publication date
US20170092649A1 (en) 2017-03-30
CN106558585A (zh) 2017-04-05

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