CN106449433A - 一种降低开关二极管结电容的键合结构及其制造方法 - Google Patents

一种降低开关二极管结电容的键合结构及其制造方法 Download PDF

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Publication number
CN106449433A
CN106449433A CN201611096567.9A CN201611096567A CN106449433A CN 106449433 A CN106449433 A CN 106449433A CN 201611096567 A CN201611096567 A CN 201611096567A CN 106449433 A CN106449433 A CN 106449433A
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silicon layer
resistivity
switching diode
low
silicon chip
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薛维平
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SHANGHAI CORE STONE MICRO-ELECTRONIC Co Ltd
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SHANGHAI CORE STONE MICRO-ELECTRONIC Co Ltd
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Publication of CN106449433A publication Critical patent/CN106449433A/zh
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/036—Manufacturing methods by patterning a pre-deposited material
    • H01L2224/03602—Mechanical treatment, e.g. polishing, grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/03—Manufacturing methods
    • H01L2224/038—Post-treatment of the bonding area
    • H01L2224/0383—Reworking, e.g. shaping
    • H01L2224/0384—Reworking, e.g. shaping involving a mechanical process, e.g. planarising the bonding area

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Element Separation (AREA)

Abstract

常规开关二极管工艺使用的硅片，都是在低阻硅层上生长高阻硅层的外延片，由于外延生长过程中掺杂物质扩散速度很快，在电阻率小于0.01Ω.㎝的低阻硅层上生长的高阻硅层的电阻率很难做到300Ω.㎝以上，本发明是在电阻率小于0.01Ω.㎝的低阻硅层上键合30‑70微米厚度，电阻率大于1000Ω.㎝的高阻硅层，用此结构硅片制造的开关二极管比常规开关二极管结电容低20%以上。

Description

一种降低开关二极管结电容的键合结构及其制造方法
技术领域
本发明属于一种低阻硅片和高阻硅片键合制造方法，适用于降低开关二极管的结电容。
背景技术
半导体集成电路的工作频率不断提升，对于作为电子开关的开关二极管提出了更高要求，开关二极管的电容在高频电路中不容忽视，电容过高，会造成信号损失，产生噪音，近年来不断地对高频电路中的开关二极管的电容提出了更高的要求，目前开关二极管制造工艺主要是在外延片上制造，通过加大外延层电阻率的方式降低结电容已经到达了极限，由于外延工艺过程中掺杂成分的扩散性，很难在电阻率低于0.01Ω.㎝的低阻单晶硅上生长出电阻率大于300Ω.㎝的高阻单晶硅，本发明是通过目前成熟的硅硅键合工艺，在电阻率小于0.01Ω.㎝的低阻单晶硅层上键合30-70微米厚度，电阻率大于1000Ω.㎝的高阻单晶硅层，用此结构硅片制造的开关二极管，拥有更低的结电容，结电容降低20%以上。
发明内容
1、一种降低开关二极管结电容的键合结构，其结构包括：在低阻硅层（101）上是一层高阻硅层（102），低阻硅层电阻率小于0.01Ω.㎝，高阻硅层电阻率大于1000Ω.㎝，高阻硅层厚度（301）范围是30-70微米。
2、一种降低开关二极管结电容的键合硅片的制造方法，其方法包括：
A、对键合前的低阻硅片（101）和高阻硅片（102）进行表面抛光，清洗及甩干；
B、将低阻硅片（101）和高阻硅片（102）的抛光表面紧密结合在一起，通过键合工艺键合在一起；
C、对高阻硅层（102）进行减薄，倒角及抛光。
附图说明
图1是键合工艺前的低阻硅片和高阻硅片；
图2是键合工艺后的低阻硅片和高阻硅片结构；
图3是减薄、倒角及抛光后的低阻硅层和高阻硅层结构。
编号说明：
101：低阻单晶硅，电阻率小于0.01Ω.㎝；
102：高阻单晶硅，电阻率大于1000Ω.㎝；
201：低阻单晶硅和高阻单晶硅的键合表面；
301：减薄抛光后的高阻单晶硅的厚度范围30-70微米。
具体实施方式
1．键合前的低阻硅片（101）和高阻硅片（102）准备，如图1，硅片需要经过表面抛光，清洗及甩干，低阻硅片电阻率小于0.01Ω.㎝，高阻硅片电阻率大于1000Ω.㎝，清洗甩干后立即放入键合机，防止表面再次产生自然氧化层，影响键合表面（201）。
2．通过键合工艺，将低阻硅片和高阻硅片紧密结合在一起，如图2，低阻硅片抛光面和高阻硅片抛光面接触。
3．减薄，倒角及抛光，如图3，根据使用需求，高阻硅层的厚度（301），表面平坦度等，对高阻硅片进行减薄，倒角及抛光，留下来的高阻硅层厚度范围30-70微米，低阻硅层的目的是将来硅片背面作为开关二极管的一个电极，高阻硅层能够降低开关二极管结电容，倒角在降低碎片率方面十分有效。
通过上述实施例阐述了本发明，同时也可以采用其它实施例实现本发明，本发明不局限于上述具体实施例，因此本发明由所附权利要求范围限定。

Claims (2)

1.一种降低开关二极管结电容的键合结构，其结构包括：在低阻硅层（101）上是一层高阻硅层（102），低阻硅层电阻率小于0.01Ω.㎝，高阻硅层电阻率大于1000Ω.㎝，高阻硅层厚度（301）范围是30-70微米。
2.一种降低开关二极管结电容的键合硅片的制造方法，其方法包括：
A、对键合前的低阻硅片（101）和高阻硅片（102）进行表面抛光，清洗及甩干；
B、将低阻硅片（101）和高阻硅片（102）的抛光表面紧密结合在一起，通过键合工艺键合在一起；
C、对高阻硅层（102）进行减薄，倒角及抛光。
CN201611096567.9A 2016-12-02 2016-12-02 一种降低开关二极管结电容的键合结构及其制造方法 Pending CN106449433A (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107973269A (zh) * 2017-12-18 2018-05-01 中国电子科技集团公司第四十六研究所 一种mems器件用多层结构硅片的制作方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103490743A (zh) * 2013-09-22 2014-01-01 中国电子科技集团公司第十三研究所 一种薄膜baw谐振器和baw滤波器
CN103578978A (zh) * 2013-10-17 2014-02-12 北京时代民芯科技有限公司 一种基于硅基键合材料的高压快恢复二极管制造方法
CN105762174A (zh) * 2016-05-13 2016-07-13 上海芯石微电子有限公司 一种含阴极辅助的快恢复二极管材料片结构及其制造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103490743A (zh) * 2013-09-22 2014-01-01 中国电子科技集团公司第十三研究所 一种薄膜baw谐振器和baw滤波器
CN103578978A (zh) * 2013-10-17 2014-02-12 北京时代民芯科技有限公司 一种基于硅基键合材料的高压快恢复二极管制造方法
CN105762174A (zh) * 2016-05-13 2016-07-13 上海芯石微电子有限公司 一种含阴极辅助的快恢复二极管材料片结构及其制造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107973269A (zh) * 2017-12-18 2018-05-01 中国电子科技集团公司第四十六研究所 一种mems器件用多层结构硅片的制作方法

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