CN106411268A - Power amplifier of distributed two-stack structure considering miller effect - Google Patents
Power amplifier of distributed two-stack structure considering miller effect Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/08—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
- H03F1/14—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of neutralising means
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/193—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
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Abstract
The invention discloses a power amplifier of a distributed two-stack structure considering a miller effect. The power amplifier comprises a distributed two-stack HiFET (High-Impedance, High-Voltage field-effect transistor) amplification network, bias voltage, a grid electrode artificial transmission line considering the miller effect, and a drain electrode artificial transmission line considering the miller effect. According to the power amplifier provided by the invention, a core framework adopts the distributed two-stack HiFET amplification network, which is formed by at least three two-stack HiFET structures; meanwhile, the influence of the miller effect of a two-transistor stack structure on equivalent capacitance of the artificial transmission lines is considered, the accuracy of a circuit design is improved, and the difficulty in later debugging of the circuit is reduced, so that the whole power amplifier acquires a favorable broadband power output capability and a power gain capability, a low breakdown voltage characteristic of an integrated circuit process is avoided, and the stability and the reliability of the circuit are improved.
Description
Technical field
The present invention relates to field-effect transistor radio-frequency power amplifier and integrated circuit fields, receive especially for ultra broadband
Send out machine end transmitter module application a kind of high efficiency, high-output power, the distributed power amplifier of high-gain.
Background technology
Resist with military electronic such as electronic warfare, software radio, ultra-wideband communications, WLANs (WLAN) and lead to
Letter, the fast development in commercial communication market, radio frequency front-end transceiver also develops to high-performance, highly integrated, low-power consumption direction.Cause
The urgent radio frequency of demand transmitter in this market and microwave power amplifier have ultra broadband, high-output power, high efficiency, low become
The performance such as this, and integrated circuit is exactly expected to meet the key technology of this market demand.
However, when radio frequency is realized with microwave power amplifier chip circuit using integrated circuit technology design, its performance
Receive certain restriction, major embodiment with cost：
（1）Limited by high-power high-efficiency amplifying power：In semiconductor technology, the grid length of transistor is shorter and shorter, thus brings
Low breakdown voltage and high knee-point voltage, thus limit the power capacity of one-transistor.In order to obtain power capabilities, past
Toward needing multichannel transistor power to synthesize, but because the energy loss that multichannel synthesizes network leads to the efficiency ratio of power amplifier
Relatively low, therefore high power, high efficiency ability are poor.
（2）Limited by ultra-wideband high power amplifying power：It is accomplished by multiple transistor power synthesis for meeting high power index,
But the load impedance of multichannel synthesis substantially reduces, thus result in very high impedance transformation ratio；Under high impedance conversion ratio, real
Existing broadband character is great challenge.
The circuit structure of common ultra-wideband high power amplifier has a lot, most typically traditional distributed amplifier,
But, the requirement that traditional distributed amplifier will meet parameters simultaneously is very difficult, is primarily due to：
1., in traditional distributed power amplifier, core amplifying circuit is multiple single field-effect transistor FET
(field-effect transistor) using distributed air-defense arrangement by the way of realize, due to single field-effect transistor its
Power gain is relatively low, optimum impedance is low, isolation is poor, therefore also lead to reflection characteristic to deteriorate, thus reducing synthesis effect
Rate；
2. simple in order to analyze in the design of traditional distributed amplifier, often have ignored the shadow for circuit for the Miller capacitance
Ringing, thus leading to need substantial amounts of work to carry out circuit debugging after circuit structure design is complete, consuming substantial amounts of manpower and materials, fall
Low circuit layout efficiency；
3. additionally, in order to reduce the impact for circuit for the Miller effect, also having distributed using Cascode pair transistor
Structure for amplifying, although Cascode pair transistor increased circuit isolation, but cannot improve the indexs such as power gain,
The optimum impedance coupling between Cascode pair transistor cannot be realized, thus reducing characteristics of output power.
At present it is thus proposed that a kind of stacking power amplifier, core amplifying circuit is that a multiple transistor stack is formed
High impedance high-voltage field effect transistor HiFET (High-Impedance, High-Voltage field-effect
Transistor), in this HiFET, it is also the structure in sequential series using transistor source and drain electrode, to realize high voltage pendulum
Width and height output load impedance, thus overcoming low breakdown voltage to limit and having splendid Broadband emission characteristic.Additionally, its height
Output impedance can directly be designed to the standard termination impedance of 50 Ω, thus avoiding using designs such as inductance or transformators
Output matching circuit, greatly reduces chip area.Although however, output is higher, the putting of existing stacked structure
Big device often all adopts the realization of single HiFET structure, its bandwidth characteristic compared with traditional single-transistor distributed amplifier, still
So there is larger gap.
It can thus be seen that based on the ultra-wide band radio-frequency Designing power amplifier difficult point of integrated circuit technology being：Ultra broadband
Lower high-power output, high power gain difficulty are larger；Single HiFET structure or the distributed amplification structure of Cascode transistor
There are a lot of limitation.
Content of the invention
The technical problem to be solved is to provide a kind of work(of distributed two stacked structures considering Miller effect
Rate amplifier, the advantage combining single HiFET structure amplifier and distributed amplifier, there is high-power output under ultra broadband
Ability, high power gain, good input and output matching properties and low cost and other advantages.
The technical scheme that the present invention solves above-mentioned technical problem is as follows：A kind of distributed two stacking knots considering Miller effect
The power amplifier of structure, amplifies network, bias voltage, considers that the grid of Miller effect is artificial including distributed two stacking HiFET
Transmission line and the drain electrode artificial transmission line considering Miller effect, described distributed two stacking HiFET amplify network by k two stacking
HiFET structure composition, wherein k value are more than or equal to 3；Described two stacking HiFET structures are by two transistors according to source drain phase
Even stacking is constituted,
The source ground of the transistor of the bottom of described two stacking HiFET structures, the stable electricity of grid RC in parallel
Road is connected to the described grid artificial transmission line considering Miller effect；
The grid of the transistor of the superiors of described two stacking HiFET structures is connected to described biased electrical by divider resistance
Pressure, meanwhile, described grid connects and connects, by grid compensating electric capacity, the compensation circuit that ground connection forms, in parallel high between drain electrode and source electrode
Frequency compensating electric capacity, drain electrode is connected to the described drain electrode artificial transmission line considering Miller effect.
The invention has the beneficial effects as follows：Core architecture of the present invention adopts distributed two stacking HiFET to amplify network, distributed
Two stacking HiFET amplify network at least by three two stacking HiFET structure compositions, and described two stacking HiFET structures are by two crystalline substances
Body pipe is connected to stack according to source drain and constitutes, and the grid compensating electric capacities of two stacking HiFET structures are the less electric capacity of capacitance, use
In the synchronous hunting realizing grid voltage, the drain-source end shunt peaking electric capacity of two stacking HiFET, between offset gate source
Signal reveal, using distributed two stacking HiFET amplify networks, output can be improved, improve isolation characteristic, realize two
Impedance matching between stacked transistors, obtains good high frequency characteristics simultaneously；Meanwhile, the present invention considers three transistor stack knots
The Miller effect of structure, for the impact of the equivalent capacity of artificial transmission line, substantially increases the accuracy of circuit design, reduces
The difficulty of circuit later stage debugging is so that whole power amplifier obtains good broadband power fan-out capability and power gain energy
Power, it is to avoid the low breakdown voltage characteristic of integrated circuit technology, improves the Stability and dependability of circuit.
On the basis of technique scheme, the present invention can also do following improvement.
Further, the grid compensating electric capacity of described compensation circuit also concatenates a grid and compensates resistance.
Beneficial effect using above-mentioned further scheme is that grid compensates the effect that resistance plays stabilizing circuit.
Further, the described grid artificial transmission line considering Miller effect is by grid absorbing load, grid capacitance, grid
Pole feed inductance, k+1 gate transmission line equivalent inductance and k gate transmission line equivalent capacity are constituted；
The described drain electrode artificial transmission line considering Miller effect is by the absorbing load that drains, drain electrode capacitance, drain electrode feed
Inductance, k+1 drain transmission line equivalent inductance and k drain transmission line equivalent capacity are constituted.
Beneficial effect using above-mentioned further scheme is the Miller effect considering two stacking HiFET structures for artificial
The impact of the equivalent capacity of transmission line, improves design accuracy, reduces the difficulty of circuit later stage debugging, shortens design week
Phase.
Further, the grid compensating electric capacity of the grid connection of the transistor of the superiors of described two stacking HiFET structures is
Cggk：
Between drain electrode and source electrode, high frequency compensation electric capacity in parallel is Cddk：
Wherein, CgsFor transistor gate-source capacitance, CgdIt is Miller capacitance for transistor gate-drain parasitic capacitances, unit is pF；
gmFor transistor transconductance, unit is mS, Zopt=Ropt+jXoptFor transistor optimum load impedance, unit is Ω.
Further, the equivalent capacity of the described grid artificial transmission line considering Miller effect is Cintk：
Cintk=(A2+ω2B2)/(ω2BY0-(B0+ω(Cgd+Cds))Aω)
The equivalent capacity of the described drain electrode artificial transmission line considering Miller effect is Coutk：
Wherein, A=ω2Cgd 2-ω(B0+ω(Cgd+Cds))(Cgs+Cgd), B=(Cgs+Cgd)Y0+Cgdgm
Yopt=Y0+jB0=1/Zopt, CgsFor transistor gate-source capacitance, CgdIt is Miller electricity for transistor gate-drain parasitic capacitances
Hold, unit is pF；gmFor transistor transconductance, unit is mS；Zopt=Ropt+jXoptFor transistor optimum load impedance, unit is equal
For Ω；ω is fundamental wave angular frequency, and unit is rad/s；CdsFor transistor drain source capacitance；CddkFor height in parallel between drain electrode and source electrode
Frequency compensating electric capacity.
Further, the RC stabilizing circuit in parallel that the grid of the transistor of the bottom of described two stacking HiFET structures connects
In input coupling electric capacity be Cgk：
Wherein, CintkFor considering the gate transmission line equivalent capacity of the grid artificial transmission line of Miller effect, CoutkFor considering
The drain transmission line equivalent capacity of the drain electrode artificial transmission line of Miller effect.
Further, the described equivalent inductance of grid artificial transmission line considering Miller effect and the drain electrode considering Miller effect
The equivalent inductance of artificial transmission line is respectively LgkAnd Ldk
Wherein, k is integer, k >=3；Z0For the characteristic impedance of microstrip line, generally 50 Ω；CoutkFor considering Miller effect
The drain transmission line equivalent capacity of drain electrode artificial transmission line.
Further, described distributed two stacking HiFET amplify networks is active amplification network it is considered to the grid of Miller effect
The drain electrode artificial transmission line of artificial transmission line and consideration Miller effect is passive network.
Using above-mentioned further scheme beneficial effect it is contemplated that two stacking HiFET structures Miller effect for artificial
The impact of the equivalent capacity of transmission line, improves design accuracy, reduces the difficulty of circuit later stage debugging, shortens design week
Phase.
Brief description
Fig. 1 is power amplifier theory diagram of the present invention；
Fig. 2 is two-transistor stacked structure theory diagram in the present invention；
Fig. 3 is power amplifier circuit figure of the present invention；
The circuit theory diagrams of two-transistor stacked structure are corresponded in Fig. 4 present invention；
Fig. 5 simplifies the circuit theory diagrams of small signal equivalent model for transistor of the present invention.
Specific embodiment
Below in conjunction with accompanying drawing, the principle of the present invention and feature are described, example is served only for explaining the present invention, and
Non- for limiting the scope of the present invention.
As shown in Figure 1 and Figure 2, the invention provides a kind of power of distributed two stacked structures considering Miller effect is put
Big device, is a kind of to amplify, using distributed two stacking HiFET, the ultra-wide band radio-frequency power amplifier that networks are core, using integrated
Circuit technology is designed, and it is active electric network it is considered to the grid of Miller effect is artificial that this distributed two stacking HiFET amplifies network
The drain electrode artificial transmission line of transmission line and consideration Miller effect is passive network.
This distributed power amplifier includes a kind of power amplifier of distributed two stacked structures considering Miller effect,
Amplify network, bias voltage, consider the grid artificial transmission line of Miller effect and consider Miller including distributed two stacking HiFET
The drain electrode artificial transmission line of effect, described distributed two stacking HiFET amplify network at least by three two stacking HiFET structure groups
Become, described two stacking HiFET structures are made up of according to the connected stacking of source drain two transistors,
The source ground of the transistor of the bottom of described two stacking HiFET structures, the stable electricity of grid RC in parallel
Road CgkAnd RgkIt is connected to the described grid artificial transmission line considering Miller effect；
The grid of the transistor of the superiors of described two stacking HiFET structures passes through feed resistance RgbkIt is connected to described inclined
Put voltage, meanwhile, described grid connects by grid compensation resistance and grid compensating electric capacity CggkConnect the compensation electricity of ground connection composition
Road, shunt peaking electric capacity C between drain electrode and source electrodeddk, drain and be connected to the described drain electrode artificial transmission considering Miller effect
Line.
As shown in Figure 3, Figure 4, the distributed two stacking HiFET of the present invention amplify network is based on 2 × k field effect transistor
Pipe, k is integer, is made up of according to the connected stacking of source drain two transistors more than or equal to 3, two stacking HiFET structures, by k
Individual two stacking HiFET structure compositions distributed two stack HiFET and amplify networks it is ensured that whole circuit can have larger ultra broadband work(
Rate exports, and realizes the amplification of radiofrequency signal.
The grid artificial transmission line considering Miller effect is by grid absorbing load Rgload, grid capacitance CgWith
Cgload, grid feed inductance Lg, k+1 gate transmission line equivalent inductance LgkWith k gate transmission line equivalent capacity CinkConstitute,
In order to realize the functions such as coupling, the biasing of the grid artificial transmission line of amplifier；Consider the drain electrode artificial transmission line of Miller effect
By drain electrode absorbing load Rdload, drain electrode capacitance CdAnd Cdload, drain electrode feed inductance Ld, k+1 drain transmission line etc.
Effect inductance LdkWith k drain transmission line equivalent capacity CoutkConstitute, in order to realize amplifier drain electrode artificial transmission line coupling,
The functions such as biasing.
It is illustrated in figure 5 the transistor simplification small-signal model considering Miller effect in circuit of the present invention, this small-signal
Model is used for the key circuit parameters in this power amplifier of analysis and solution, and specific method for solving is：
The grid compensating electric capacity that the grid of the transistor of the superiors of two stacking HiFET structures connects is Cggk：
Between drain electrode and source electrode, high frequency compensation electric capacity in parallel is Cddk：
Wherein, CgsFor transistor gate-source capacitance, CgdIt is Miller capacitance for transistor gate-drain parasitic capacitances, unit is pF；
gmFor transistor transconductance, unit is mS, Zopt=Ropt+jXoptFor transistor optimum load impedance, unit is Ω.
The equivalent capacity of the grid artificial transmission line of consideration Miller effect is Cintk：
Cintk=(A2+ω2B2)/(ω2BY0-(B0+ω(Cgd+Cds))Aω)
The equivalent capacity of the described drain electrode artificial transmission line considering Miller effect is Coutk：
Wherein, A=ω2Cgd 2-ω(B0+ω(Cgd+Cds))(Cgs+Cgd), B=(Cgs+Cgd)Y0+Cgdgm
Yopt=Y0+jB0=1/Zopt, CgsFor transistor gate-source capacitance, CgdIt is Miller electricity for transistor gate-drain parasitic capacitances
Hold, unit is pF；gmFor transistor transconductance, unit is mS；Zopt=Ropt+jXoptFor transistor optimum load impedance, unit is equal
For Ω；ω is fundamental wave angular frequency, and unit is rad/s；CdsFor transistor drain source capacitance；CddkFor parallel connection between drain electrode and source electrode
High frequency compensation electric capacity.
Input coupling in the RC stabilizing circuit in parallel that the grid of the transistor of the bottom of two stacking HiFET structures connects
Electric capacity is Cgk：
Wherein, CintkFor considering the gate transmission line equivalent capacity of the grid artificial transmission line of Miller effect, CoutkFor considering
The drain transmission line equivalent capacity of the drain electrode artificial transmission line of Miller effect.
Consider the equivalent inductance of grid artificial transmission line of Miller effect and the drain electrode artificial transmission line considering Miller effect
Equivalent inductance be respectively LgkAnd Ldk
Wherein, k is integer, k >=3；Z0For the characteristic impedance of microstrip line, generally 50 Ω；CoutkFor considering Miller effect
The drain transmission line equivalent capacity of drain electrode artificial transmission line.
Based on foregoing circuit parametric solution method, by structure adjusting transistor Md1～MdkAnd Mu1～MukSize big
Little, artificial transmission line inductance Lg1～Lg(k+1)And Ld1～Ld(k+1)Size, compensating electric capacity Cgg1～CggkSize etc., can make
The whole amplifier circuit of the present invention realizes inputting and export good impedance matching, high power gain, good in ultra broadband
Power gain flatness.
The work process of the present invention is：Radio-frequency input signals enters circuit by input IN, is coupled every straight by input
Electric capacity Cg, enter grid artificial transmission line L in the way of voltage's distribiuting formulagk、Lg(k+1)And Cink, subsequently into CgkAnd RgkConstitute
Grid RC stabilizing circuit, then with voltage's distribiuting formula enter two stacking HiFET amplify networks transistor MdkGrid, so
Distributed form is from transistor Md afterwardskDrain electrode output, enter transistor MukSource electrode, then from transistor MukDrain electrode defeated
Go out, enter drain electrode artificial transmission line L in the way of voltage's distribiuting formuladk、Ld(k+1)And Coutk, then pass through output and couple electricity every straight
Hold Cd, enter outfan OUT and complete signal power amplification.
Based on above circuit analysis, the work(of the distributed two stacking HiFET structures of consideration Miller effect proposed by the present invention
Rate amplifier is with the difference of the conventional amplifier architecture based on integrated circuit technology：
1. core architecture adopts distributed two stacking HiFET to amplify network.
Two stacking HiFET and traditional one-transistor are very different in structure, do not repeat herein；Two stacking simultaneously
HiFET and the distributed amplifier that new double gate transistor is constituted also have different, and two stacking HiFET structures are two transistors
And the complex network that other elements are constituted, and double-gated transistor is single components and parts.
Two stacking HiFET have at 2 points with the difference of traditional Cascode transistor,（1）The grid compensating electric capacity of stacking
On, the grid compensating electric capacity of two stacking HiFET is the less electric capacity of capacitance, for realizing the synchronous hunting of grid voltage, and passes
The piled grids compensating electric capacity of system Cascode transistor is the larger electric capacity of capacitance, for realizing the AC earth of grid；（2）
The drain-source end of the stacked transistors of two stacking HiFET is parallel with high frequency compensation electric capacity, reveals for the signal between offset gate source,
And tradition Cascode transistor no this structure.
2. consider grid artificial transmission line and the drain electrode artificial transmission line of Miller effect：
Method for designing often ignored Miller effect, directly by gate-source capacitance C of transistor in the pastgsWith drain source capacitance CdsDepending on
For the equivalent capacity of artificial transmission line, so process often underestimation equivalent capacity, thus leading to the circuit design later stage to need
To carry out circuit debugging by a large amount of manpowers；The present invention considers the Miller effect of two stacking HiFET structures for artificial transmission line's
The impact of equivalent capacity, substantially increases the accuracy of circuit design, reduces the difficulty of circuit later stage debugging, shortens design
Cycle.
Whole based in the distributed power amplifier circuit of transistor stack technology, the size of transistor is straight with other
Current feed resistance, the size of compensating electric capacity be consider the indices such as gain, bandwidth and the output of whole circuit after
Determine, by layout design and the rational deployment in later stage, required indices can be better achieved, realize in ultra-wide
High-power output ability under SNNP, high power gain, good input and output matching properties, chip area be little and cost
Low.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all spirit in the present invention and
Within principle, any modification, equivalent substitution and improvement made etc., should be included within the scope of the present invention.
Claims (8)
1. a kind of power amplifier of distributed two stacked structures considering Miller effect is it is characterised in that include distributed two
Stacking HiFET amplifies network, bias voltage, the grid artificial transmission line considering Miller effect and the drain electrode people considering Miller effect
Work transmission line, described distributed two stacking HiFET amplify network by k two stacking HiFET structure composition, and wherein k is more than or equal to
3；Described two stacking HiFET structures are made up of according to the connected stacking of source drain two transistors,
The source ground of the transistor of the bottom of described two stacking HiFET structures, grid RC stabilizing circuit in parallel connects
To the described grid artificial transmission line considering Miller effect；
The grid of the transistor of the superiors of described two stacking HiFET structures is connected to described bias voltage by feed resistance,
Meanwhile, described grid connects the compensation circuit being made up of grid compensating electric capacity ground connection, shunt peaking between drain electrode and source electrode
Electric capacity, drain electrode is connected to the described drain electrode artificial transmission line considering Miller effect.
2. the power amplifier of distributed two stacked structures considering Miller effect according to claim 1, its feature exists
In the grid compensating electric capacity of described compensation circuit also concatenates a grid and compensates resistance.
3. the power amplifier of distributed two stacked structures considering Miller effect according to claim 1, its feature exists
In the described grid artificial transmission line considering Miller effect is by grid absorbing load, grid capacitance, grid feed inductance, k
+ 1 gate transmission line equivalent inductance and k gate transmission line equivalent capacity are constituted；
Described consider Miller effect drain electrode artificial transmission line by the absorbing load that drains, drain electrode capacitance, drain electrode feed inductance,
K+1 drain transmission line equivalent inductance and k drain transmission line equivalent capacity are constituted.
4. the power amplifier of distributed two stacked structures considering Miller effect according to claim 1, its feature exists
In the grid compensating electric capacity that the grid of the transistor of the superiors of described two stacking HiFET structures connects is Cggk：
Between drain electrode and source electrode, high frequency compensation electric capacity in parallel is Cddk：
Wherein, CgsFor transistor gate-source capacitance, CgdIt is Miller capacitance for transistor gate-drain parasitic capacitances, unit is pF；gmFor
Transistor transconductance, unit is mS, Zopt=Ropt+jXoptFor transistor optimum load impedance, unit is Ω.
5. the power amplifier of distributed two stacked structures considering Miller effect according to claim 4, its feature exists
In the equivalent capacity of the described grid artificial transmission line considering Miller effect is Cintk：
Cintk=(A2+ω2B2)/(ω2BY0-(B0+ω(Cgd+Cds))Aω)
The equivalent capacity of the described drain electrode artificial transmission line considering Miller effect is Coutk：
Wherein, A=ω2Cgd 2-ω(B0+ω(Cgd+Cds))(Cgs+Cgd), B=(Cgs+Cgd)Y0+Cgdgm
Yopt=Y0+jB0=1/Zopt, CgsFor transistor gate-source capacitance, CgdIt is Miller capacitance for transistor gate-drain parasitic capacitances, single
Position is pF；gmFor transistor transconductance, unit is mS；Zopt=Ropt+jXoptFor transistor optimum load impedance, unit is
Ω；ω is fundamental wave angular frequency, and unit is rad/s；CdsFor transistor drain source capacitance；CddkFor high frequency in parallel between drain electrode and source electrode
Compensating electric capacity.
6. the power amplifier of distributed two stacked structures considering Miller effect according to claim 5, its feature exists
In the input coupling in the RC stabilizing circuit in parallel of grid connection of the transistor of the bottom of described two stacking HiFET structures
Electric capacity is Cgk：
Wherein, CintkFor considering the gate transmission line equivalent capacity of the grid artificial transmission line of Miller effect, CoutkFor considering Miller
The drain transmission line equivalent capacity of the drain electrode artificial transmission line of effect.
7. the power amplifier of distributed two stacked structures considering Miller effect according to claim 5, its feature exists
In the drain electrode artificial transmission line's of the described equivalent inductance of grid artificial transmission line considering Miller effect and consideration Miller effect
Equivalent inductance is respectively LgkAnd Ldk
Wherein, k is integer, k >=3；Z0For the characteristic impedance of microstrip line, generally 50 Ω；CoutkFor considering the drain electrode of Miller effect
The drain transmission line equivalent capacity of artificial transmission line.
8. the power amplifier of distributed two stacked structures of the consideration Miller effect according to any one of claim 1 to 7,
It is characterized in that, it is active amplification network it is considered to the grid of Miller effect is artificial that described distributed two stacking HiFET amplify network
The drain electrode artificial transmission line of transmission line and consideration Miller effect is passive network.
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Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106936397A (en) * | 2017-03-14 | 2017-07-07 | 中国电子科技集团公司第二十四研究所 | High flat degree broad band amplifier |
| CN107528555A (en) * | 2017-08-09 | 2017-12-29 | 四川九洲电器集团有限责任公司 | A kind of distributed amplifier |
| CN107896094A (en) * | 2017-12-07 | 2018-04-10 | 中国电子科技集团公司第四十研究所 | A kind of distributed amplifier circuit and its implementation |
| CN107994875A (en) * | 2017-12-11 | 2018-05-04 | 成都嘉纳海威科技有限责任公司 | Ultra wide band based on compound reactance LC filter networks stacks power amplifier |
| CN108599730A (en) * | 2018-06-15 | 2018-09-28 | 成都嘉纳海威科技有限责任公司 | A kind of high efficiency F classes stacking power amplifier based on compact resonator |
| CN108664757A (en) * | 2018-08-14 | 2018-10-16 | 成都嘉纳海威科技有限责任公司 | Accurate harmonic controling high gain and high efficiency E3F2 classes stack power amplifier |
| CN108768319A (en) * | 2018-07-11 | 2018-11-06 | 成都嘉纳海威科技有限责任公司 | A kind of stacking traveling-wave power amplifier of high efficiency three based on active absorbing load |
| CN108768322A (en) * | 2018-07-11 | 2018-11-06 | 成都嘉纳海威科技有限责任公司 | A kind of high-efficient E type stacking power amplifier based on accurate harmonic controling |
| CN110311638A (en) * | 2019-07-24 | 2019-10-08 | 南京邮电大学 | A kind of multi-system modulated amplifier circuit |
| CN111030614A (en) * | 2019-12-11 | 2020-04-17 | 电子科技大学 | Transconductance enhancement type millimeter wave low noise amplifier |
| CN114244293A (en) * | 2022-01-11 | 2022-03-25 | 中国航天科工集团八五一一研究所 | Radio frequency stack power amplifier adopting parallel capacitors |
| CN115913146A (en) * | 2023-03-09 | 2023-04-04 | 成都嘉纳海威科技有限责任公司 | Reconfigurable amplifier chip |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106936397A (en) * | 2017-03-14 | 2017-07-07 | 中国电子科技集团公司第二十四研究所 | High flat degree broad band amplifier |
| CN107528555A (en) * | 2017-08-09 | 2017-12-29 | 四川九洲电器集团有限责任公司 | A kind of distributed amplifier |
| CN107528555B (en) * | 2017-08-09 | 2020-10-27 | 四川九洲电器集团有限责任公司 | Distributed amplifier |
| CN107896094A (en) * | 2017-12-07 | 2018-04-10 | 中国电子科技集团公司第四十研究所 | A kind of distributed amplifier circuit and its implementation |
| CN107994875B (en) * | 2017-12-11 | 2023-12-26 | 成都嘉纳海威科技有限责任公司 | Ultra-wideband stacked power amplifier based on composite reactance type LC filter network |
| CN107994875A (en) * | 2017-12-11 | 2018-05-04 | 成都嘉纳海威科技有限责任公司 | Ultra wide band based on compound reactance LC filter networks stacks power amplifier |
| CN108599730A (en) * | 2018-06-15 | 2018-09-28 | 成都嘉纳海威科技有限责任公司 | A kind of high efficiency F classes stacking power amplifier based on compact resonator |
| CN108599730B (en) * | 2018-06-15 | 2023-10-27 | 成都嘉纳海威科技有限责任公司 | High-efficiency F-type stacked power amplifier based on compact resonator |
| CN108768319A (en) * | 2018-07-11 | 2018-11-06 | 成都嘉纳海威科技有限责任公司 | A kind of stacking traveling-wave power amplifier of high efficiency three based on active absorbing load |
| CN108768322A (en) * | 2018-07-11 | 2018-11-06 | 成都嘉纳海威科技有限责任公司 | A kind of high-efficient E type stacking power amplifier based on accurate harmonic controling |
| CN108768319B (en) * | 2018-07-11 | 2023-09-01 | 成都嘉纳海威科技有限责任公司 | High-efficiency three-stack traveling wave power amplifier based on active absorption load |
| CN108664757A (en) * | 2018-08-14 | 2018-10-16 | 成都嘉纳海威科技有限责任公司 | Accurate harmonic controling high gain and high efficiency E3F2 classes stack power amplifier |
| CN108664757B (en) * | 2018-08-14 | 2023-10-31 | 成都嘉纳海威科技有限责任公司 | High-gain high-efficiency E3F2 type stacked power amplifier with accurate harmonic control |
| CN110311638A (en) * | 2019-07-24 | 2019-10-08 | 南京邮电大学 | A kind of multi-system modulated amplifier circuit |
| CN111030614B (en) * | 2019-12-11 | 2023-10-27 | 电子科技大学 | Transconductance enhanced millimeter wave low-noise amplifier |
| CN111030614A (en) * | 2019-12-11 | 2020-04-17 | 电子科技大学 | Transconductance enhancement type millimeter wave low noise amplifier |
| CN114244293A (en) * | 2022-01-11 | 2022-03-25 | 中国航天科工集团八五一一研究所 | Radio frequency stack power amplifier adopting parallel capacitors |
| CN115913146A (en) * | 2023-03-09 | 2023-04-04 | 成都嘉纳海威科技有限责任公司 | Reconfigurable amplifier chip |
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