CN106373921A - 用于互连方案的方法 - Google Patents
用于互连方案的方法 Download PDFInfo
- Publication number
- CN106373921A CN106373921A CN201510853081.4A CN201510853081A CN106373921A CN 106373921 A CN106373921 A CN 106373921A CN 201510853081 A CN201510853081 A CN 201510853081A CN 106373921 A CN106373921 A CN 106373921A
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- China
- Prior art keywords
- metal wire
- groove
- dielectric layer
- layer
- copper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 238000000034 method Methods 0.000 title claims abstract description 86
- 229910052751 metal Inorganic materials 0.000 claims abstract description 139
- 239000002184 metal Substances 0.000 claims abstract description 139
- 239000000758 substrate Substances 0.000 claims abstract description 33
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 22
- 229910052802 copper Inorganic materials 0.000 claims description 22
- 239000010949 copper Substances 0.000 claims description 22
- 238000005530 etching Methods 0.000 claims description 20
- 239000003989 dielectric material Substances 0.000 claims description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 6
- 229910052737 gold Inorganic materials 0.000 claims description 6
- 239000010931 gold Substances 0.000 claims description 6
- 239000011800 void material Substances 0.000 claims description 6
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- JRBRVDCKNXZZGH-UHFFFAOYSA-N alumane;copper Chemical compound [AlH3].[Cu] JRBRVDCKNXZZGH-UHFFFAOYSA-N 0.000 claims description 2
- WCCJDBZJUYKDBF-UHFFFAOYSA-N copper silicon Chemical compound [Si].[Cu] WCCJDBZJUYKDBF-UHFFFAOYSA-N 0.000 claims description 2
- 239000003792 electrolyte Substances 0.000 claims description 2
- 238000000059 patterning Methods 0.000 claims description 2
- OWXLRKWPEIAGAT-UHFFFAOYSA-N [Mg].[Cu] Chemical compound [Mg].[Cu] OWXLRKWPEIAGAT-UHFFFAOYSA-N 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 abstract description 26
- 238000004519 manufacturing process Methods 0.000 abstract description 12
- 239000010410 layer Substances 0.000 description 111
- 230000008569 process Effects 0.000 description 34
- 229920002120 photoresistant polymer Polymers 0.000 description 14
- 230000004888 barrier function Effects 0.000 description 13
- 238000000151 deposition Methods 0.000 description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- 238000011049 filling Methods 0.000 description 8
- 238000002955 isolation Methods 0.000 description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 7
- 230000008021 deposition Effects 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 7
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 5
- 239000007789 gas Substances 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 239000001301 oxygen Substances 0.000 description 5
- 229910052760 oxygen Inorganic materials 0.000 description 5
- 238000001039 wet etching Methods 0.000 description 5
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 230000008859 change Effects 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 3
- UGFAIRIUMAVXCW-UHFFFAOYSA-N Carbon monoxide Chemical compound [O+]#[C-] UGFAIRIUMAVXCW-UHFFFAOYSA-N 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 3
- 229910052721 tungsten Inorganic materials 0.000 description 3
- 239000010937 tungsten Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- -1 bpsg) Substances 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 239000005350 fused silica glass Substances 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 239000005360 phosphosilicate glass Substances 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 241000208340 Araliaceae Species 0.000 description 1
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- 229910005540 GaP Inorganic materials 0.000 description 1
- 229910000673 Indium arsenide Inorganic materials 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- GXDVEXJTVGRLNW-UHFFFAOYSA-N [Cr].[Cu] Chemical compound [Cr].[Cu] GXDVEXJTVGRLNW-UHFFFAOYSA-N 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- FTWRSWRBSVXQPI-UHFFFAOYSA-N alumanylidynearsane;gallanylidynearsane Chemical compound [As]#[Al].[As]#[Ga] FTWRSWRBSVXQPI-UHFFFAOYSA-N 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 238000000231 atomic layer deposition Methods 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 229910002091 carbon monoxide Inorganic materials 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- HPDFFVBPXCTEDN-UHFFFAOYSA-N copper manganese Chemical compound [Mn].[Cu] HPDFFVBPXCTEDN-UHFFFAOYSA-N 0.000 description 1
- IIQVQTNFAKVVCM-UHFFFAOYSA-N copper niobium Chemical compound [Cu][Nb][Nb] IIQVQTNFAKVVCM-UHFFFAOYSA-N 0.000 description 1
- IUYOGGFTLHZHEG-UHFFFAOYSA-N copper titanium Chemical compound [Ti].[Cu] IUYOGGFTLHZHEG-UHFFFAOYSA-N 0.000 description 1
- RPYFZMPJOHSVLD-UHFFFAOYSA-N copper vanadium Chemical compound [V][V][Cu] RPYFZMPJOHSVLD-UHFFFAOYSA-N 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009429 electrical wiring Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000005518 electrochemistry Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 1
- HDDJZDZAJXHQIL-UHFFFAOYSA-N gallium;antimony Chemical compound [Ga+3].[Sb] HDDJZDZAJXHQIL-UHFFFAOYSA-N 0.000 description 1
- 235000008434 ginseng Nutrition 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- WPYVAWXEWQSOGY-UHFFFAOYSA-N indium antimonide Chemical compound [Sb]#[In] WPYVAWXEWQSOGY-UHFFFAOYSA-N 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 229910052741 iridium Inorganic materials 0.000 description 1
- GKOZUEZYRPOHIO-UHFFFAOYSA-N iridium atom Chemical compound [Ir] GKOZUEZYRPOHIO-UHFFFAOYSA-N 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- PQIOSYKVBBWRRI-UHFFFAOYSA-N methylphosphonyl difluoride Chemical group CP(F)(F)=O PQIOSYKVBBWRRI-UHFFFAOYSA-N 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 229910052762 osmium Inorganic materials 0.000 description 1
- SYQBFIAQOQZEGI-UHFFFAOYSA-N osmium atom Chemical compound [Os] SYQBFIAQOQZEGI-UHFFFAOYSA-N 0.000 description 1
- 239000007800 oxidant agent Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 230000009257 reactivity Effects 0.000 description 1
- 229910052702 rhenium Inorganic materials 0.000 description 1
- WUAPFZMCVAUBPE-UHFFFAOYSA-N rhenium atom Chemical compound [Re] WUAPFZMCVAUBPE-UHFFFAOYSA-N 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000004062 sedimentation Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- 238000009736 wetting Methods 0.000 description 1
Classifications
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
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- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76883—Post-treatment or after-treatment of the conductive material
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53233—Copper alloys
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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Abstract
本发明涉及用于互连方案的方法。具体的,本发明提供一种制造半导体装置的方法,所述方法包含:形成第一电介质层于衬底上;形成第一沟槽于所述第一电介质层中;形成金属线于所述第一沟槽中;去除所述金属线的第一部分以形成第二沟槽,并去除所述金属线的第二部分以形成第三沟槽;所述金属线的第三部分安置在所述第二沟槽与所述第三沟槽之间。所述方法还包含形成第二电介质层于所述第二沟槽和所述第三沟槽内。
Description
技术领域
本发明涉及一种用于半导体互连方案的方法及相关装置。
背景技术
半导体集成电路(IC)产业经历了快速的成长期。IC的设计和材料的技术进步已产生了好几代的半导体集成电路,其中每一代都比上一代具有更小更复杂的电路。在半导体集成电路的演进过程中,功能密度(即每个芯片区域内互连设备的数量)已普遍增加,但几何尺寸(即制造过程可制造的最小装置(或线))却有所减少。
这种按照比例缩小的工艺具有提高生产效率和降低相关费用的好处。此外,这种按照比例缩小的工艺也提高了IC处理和制造的复杂性。为了实现这些先进的工艺,IC处理和制造方面也需要取得类似的发展。当例如金属氧化物半导体场效应晶体管(MOSFET)的半导体设备透过各种技术缩小尺寸时,其导线之间的互相连接以及晶体管和其它设备之间的布线相关联的介电材料在IC的性能提升方面扮演更重要的角色。尽管IC制造设备的现有方法已普遍满足其预期目的,但它们并没有在各方面都完全令人满意。例如,形成具有短长度的金属线,或简称为金属岛,则面对很大的挑战。
发明内容
本发明提供一种方法,其包含:形成第一介电层于衬底上;形成第一沟槽于所述第一介电层中;形成金属线于所述第一沟槽中;去除所述金属线的第一部分以形成第二沟槽,并去除所述金属线的第二部分以形成第三沟槽,其中所述金属线的第三部分安置在所述第二沟槽与所述第三沟槽之间;以及形成第二介电层于所述第二沟槽和所述第三沟槽内。
本发明也提供一种方法,其包含:形成第一介电层于衬底上;形成金属线于所述第一介电层中;形成图形化硬掩模层于所述金属线,其中所述图案化硬掩模层具有暴露所述金属线的第一开口和第二开口;通过所述第一开口和所述第二开口分别去除所述金属线的所述暴露部分,以形成第一沟槽和第二沟槽;以及形成第二介电层于所述第一沟槽和所述第二沟槽内。
本发明更提供一种装置,其包含:第一金属线沿着第一方向安置在衬底上;以及第二金属线沿着所述第一方向并对准到所述第一金属线,其中所述第二金属线的侧壁沿着所述第一方向具有一个锥形侧壁轮廓,其中所述第二金属线沿着所述第一方向的底侧比所述第二金属线的顶侧宽。
本发明内容提供一种形成小的金属岛的方法。所述方法使用切割金属线以形成金属岛以避免小的空隙填充缺陷。所述方法使用一方案,所述方案包含首先形成金属线,包括金属岛,接着形成低k介电层,以最小化工艺对低k介电层上所引起的损伤。
附图说明
为协助读者达到最佳理解效果,建议在阅读本发明时同时结合附图和以下详细说明。应该注意的是,遵照行业内标准做法,各特征不是按比例绘制。事实上,为了清楚的讨论,各特征尺寸可以任意放大或缩小。
图1为根据一些实施例构成的半导体装置的示例制造方法的流程图。
图2A、3A、4A、4C、5A、6A、6C和7A为根据一些实施例的示例半导体装置的俯视图。
图2B为根据一些实施例的示例半导体装置横跨图2A中的线A-A的截面图。
图3B为根据一些实施例的示例半导体装置横跨图3A中的线B-B的截面图。
图4B为根据一些实施例的示例半导体装置横跨图4A中的线B-B的截面图。
图4D为根据一些实施例的示例半导体装置横跨图4C中的线B-B的截面图。
图5B为根据一些实施例的示例半导体装置横跨图5A中的线A-A的截面图。
图6B为根据一些实施例的示例半导体装置横跨图6A中的线A-A的截面图。
图6D为根据一些实施例的示例半导体装置横跨图6C中的线A-A的截面图。
图7B和图7C为根据一些实施例的示例半导体装置横跨图7A中的线A-A的截面图。
具体实施方式
以下揭露内容提供了数个不同的实施例或示例,用于实现所提供主题的不同特征。为简化本发明内容,各装置和布局的具体示例描述如下。当然,这些仅仅是示例且并不旨在有所限定。例如,本描述中的第一特征基于第二特征,跟随第二特征的形成可以包含一些实施例,所述实施例中第一特征和第二特征以直接接触形成;也可以包含一些实施例,所述实施例中附加特征形成于第一特征与第二特征之间,以使得所述第一特征和第二特征以间接接触形成。此外,本发明内容可在各个示例中重复参考数值和/或字母。这种重复是为了简化和清楚的目的,本身并不表明所讨论的各个实施例和/或布置之间的关系。
此外,为便于描述本文,空间相对术语,如“在……之下”,“以下”,“下”,“上方”,“上面的”等,在本文中被使用。所述术语用来描述一个元件,或与另一元件(多个)特征的关系,或图中所示的特征(多个特征)。空间相对术语意在包括正在使用或操作中的装置的不同方向,除了在附图中已描述的方向。所述装置可被另外定位(旋转90度或沿其它方向),并在此使用的空间相对描述符同样可以相应地解释。
图1所示为根据一些实施例来制造一个或多个半导体装置的方法100的流程图。参看图2A到2B、图3A到3B、图4A到4D、图5A到5B、图6A到6D和图7A到7C中所示的半导体装置200,所述方法100在下文中详细讨论。
图1是根据本发明内容的各方面来制造一个或多个半导体装置的方法100的实施例的流程图。以图2A到图7B中所示的半导体装置200为例,所述方法100在下文中详细讨论。
参看图1和图2A到2B,所述方法100是从步骤102的提供衬底210开始。所述衬底210可以是硅块材衬底。或者,所述衬底210可以包含:元素半导体,如晶体结构中的硅或锗;化合物半导体,如硅锗、碳化硅、砷化镓、磷化镓、磷化铟、砷化铟和/或锑化铟;或上述的组合。其它可能的衬底210还包含绝缘体上的硅(Silicon-on-insulator,SOI)衬底。SOI衬底使用氧的注入分离(Separation by implantation of oxygen,SIMOX)、晶片接合和/或其它合适的方法制造。
一些衬底210的例子还包含绝缘层。所述绝缘层包括任何合适的材料,包含氧化硅、蓝宝石和/或上述的组合。一个绝缘层的例子为埋氧层(Buried oxide layer,BOX)。所述绝缘层可由任何合适的处理形成,如注入(如,SIMOX)、氧化、沉积和/或其它合适的处理。在某些半导体装置200例子中,所述绝缘层是绝缘体上的硅衬底的组成部分(如,层)。
衬底210还可以包含各种掺杂区域。所述掺杂区域可以与p型掺杂剂,如硼或二氟化硼(BF2);n型掺杂剂,如磷或砷;或上述的组合掺杂。所述掺杂区域可在P阱结构、N阱结构、双阱结构或使用凸起结构中直接形成于所述衬底210之上。所述衬底210可另包含各种活性区域,如经布置用于N型金属氧化物半导体晶体管装置的区域和经布置用于P型金属氧化物半导体晶体管装置的区域。
所述衬底210还可包含各种隔离特征。所述隔离特征于所述衬底210中分离各种装置区域。所述隔离功能包含不同的结构,所述不同的结构通过使用不同的处理技术形成。例如,所述隔离特征可包含浅沟槽隔离(Shallow trench isolation,STI)特征。STI的形成可包含于衬底210中蚀刻沟槽,且用如氧化硅、氮化硅或氮氧化硅的绝缘体材料填充沟槽。所述填充的沟槽可具有多层结构,如具有氮化硅填充的沟槽的热氧化物衬里层。可执行化学机械抛光(Chemical mechanical polishing,CMP)以回抛光超出的绝缘材料且平面化所述隔离特征的所述顶面。
所述衬底210还可包含栅极堆叠,所述栅极堆叠由介电层和电极层形成。所述介电层可包含接口层(Interfacial layer,IL)和高k(High-k,HK)介电层,所述高k介电层由适合的技术沉积,如化学气相沉积(Chemical vapor deposition,CVD)、原子层沉积(Atomic layerdeposition,ALD)、物理气相沉积(Physical vapor deposition,PVD)、热氧化、上述的组合或其它适合的技术。所述电极层可包含通过ALD、PVD、CVD或其它合适的处理形成的单层或者多层,如金属层、衬里层、润湿层和粘合层。
所述衬底210还可包含源/漏(S/D)特征,并通过所述栅极堆叠分离一旁。所述S/D特征可包含锗(Ge)、硅(Si)、砷化镓(GaAs)、砷化铝镓(AlGaAs)、硅锗(SiGe)、磷砷化镓(GaAsP)、镓锑(GaSb)、铟锑(InSb)、砷化铟镓(InGaAs)、砷化铟(InAs)和/或其它合适的材料。所述S/D特征可以通过外延生长处理,如CVD、VPE和/或UHV-CVD,分子束外延和/或其它合适的工艺来形成。
所述衬底210还可包含导电特征。所述导电特征可包含电极、电容器、电阻器或电阻器的一部分。所述导电特征还可包含互连方案的一部分,所述互连方案的一部分包含多层互连(Multi-layer interconnect,MLI)结构和与MLI结构集成的层间电介质(Interleveldielectric,ILD)层,所述互连方案提供电性布线以耦合衬底210中的各种装置以输入/输出功率和信号。所述互连方案包含各种金属线,接点和导孔特征(或导孔插头)。所述金属线提供水平的电性布线。所述接点提供硅衬底和金属线之间的垂直连接,同时导孔特征提供在不同的金属层的金属线之间的垂直连接。导电特征可以由包含光刻、蚀刻和沉积的程序形成。
在本实施例中,所述衬底210包含第一介电层220。所述第一介电层220可包含氧化硅、电介质材料,所述电介质材料具有小于热氧化硅的介电常数(k),因此被称为低k电介质材料层,如原硅酸四乙酯(Tetraethylorthosilicate,TEOS)氧化物、未掺杂的硅酸盐玻璃或掺杂的氧化硅,如硼磷硅玻璃(Borophosphosilicate glass,BPSG)、熔融石英玻璃(Fused silica glass,FSG)、磷硅酸盐玻璃(Phosphosilicate glass,PSG)、硼掺杂的硅玻璃(Boron doped silicon glass,BSG)和/或其它合适的电介质材料。所述第一介电层220可包含单层或多层。所述第一介电层220可以通过CVD、ALD或旋涂来沉积。
多层互连通常形成于衬底210的上,以连接各种装置(晶体管、电阻器和电容器等),以形成集成电路。在典型的互连方案中,金属线(例如,铜线)铺设在第一介电层220中,且通过导孔从一层连接到另一层。铜线和导孔通常使用单镶嵌处理或双镶嵌处理制成。在这样的处理中,所述第一介电层220被图形化以形成沟槽,然后在所述沟槽中填满过量的铜,并利用化学机械平坦化(Chemical-mechanical planarization,CMP)来去除过量的铜,从而于沟槽中形成铜线。随后,另一介电层形成于在其下的介电层之上,且重复上述过程以形成导孔和上层铜线。
各种长度的金属线的需求是很常见的,尤其是当装置比例缩小时。一般情况下,金属线首先是通过形成具有各种长度的沟槽,然后用金属层填充这些沟槽所形成。然而,当所述沟槽的尺寸变小,金属材料的空隙填充能力则受到限制,且空隙填充的质量和可靠性也受到了挑战。这导致在金属线中形成了空隙,所述空隙可引起高电阻问题和装置可靠性问题。在形成金属线过程中,将介电层上由工艺所引起的损伤降到最小化也面临了挑战。在本实施例中,所述方法100提供形成金属线(或岛),同时避免了在小的沟槽中填充金属层的许多挑战。
参看图1和图3A到3B,方法100的处理进行到步骤104,在第一介电层220中形成第一沟槽310。所述第一沟槽310沿图3A中的线A-A的方向延伸。在一些实施例中,所述第一沟槽310通过在所述第一介电层220之上形成图形化光致抗蚀剂层,然后通过图形化光致抗蚀剂层蚀刻所述第一介电层而形成。光刻处理的例子可包含形成光致抗蚀剂层,通过光刻曝光处理暴露所述光致抗蚀剂层,进行曝光后的烘烤处理,以及显影所述光致抗蚀剂层以形成图形化光致抗蚀剂层。在另一实施例中,所述第一沟槽310通过于所述第二介电层220上沉积HM层,于所述HM层上沉积光致抗蚀剂层,图形化所述光致抗蚀剂层,然后通过图形化的光致抗蚀剂层蚀刻HM层以将其图形化,然后通过所述图形化HM层蚀刻所述介电层220而形成。
所述蚀刻处理可包含选择性湿蚀刻、选择性干蚀刻和/或上述的组合。举例来说,所述蚀刻处理包含使用氟基化学的离子体干蚀刻处理,如CF4、SF6、CH2F2、CH2F2和/或C2F6等。各自的蚀刻处理可以调整各种蚀刻参数,如使用的蚀刻剂、蚀刻温度、蚀刻溶液的浓度、蚀刻压力、蚀刻剂流速和/或其它合适的参数。
形成所述第一沟槽310后,所述图形化HM通过合适的蚀刻处理去除。在例子中,所述图形化HM是光致抗蚀剂图案,而所述图形化HM是通过湿剥离和/或等离子体灰化后去除。
参看图1和图4A到图4B,所述方法100进行到步骤106,在所述第一沟槽310中形成金属层405。在本实施例中,金属层405沉积在所述第一沟槽310中。所述金属层405可以包含铜(Cu)、锡(Sn)、银(Ag)、金(Au)、钯(Pd)、铂(Pt)、铼(Re)、铱(Ir)、钌(Ru)、锇(Os)、铜锰(CuMn)、铜铝(CuAl)、铜钛(CuTi)、铜钒(CuV)、铜铬(CuCr)、铜硅(CuSi)、铜铌(CuNb)或其它合适的金属。所述金属层405可以通过PVD、CVD、ALD、电化学电镀(Electrochemical plating,ECP)或其它适当的处理来沉积。在实施例中,所述金属层405包含通过PVD沉积的铜层。在实施例中,所述金属层405包含通过PVD沉积的铜晶种层和通过电镀的块状铜层。在各种其它例子中,铜的沉积可通过其它技术,如CVD或MOCVD来实现。铜回流焊处理可另用来提高铜填充轮廓。
在一些实施例中,电金属扩散阻挡层(未图示)首先沉积在所述第一沟槽310中,所述金属层405沉积于所述阻挡层之上。所述阻挡层可包含钽(Ta)或氮化钽(TaN)和金属导体,所述金属导体可以是铜(Cu)、铝(Al)、钨(W)、钴(Co)或其它合适的金属。在实施例中,所述阻挡层包含材料的一层或多层。所述阻挡层通过PVD、MOCVD或其它合适的技术沉积。
接着,参看图4C到图4D,进行CMP处理以平坦化所述装置200的顶面以去除于所述第一介电层220上的过量的所述金属层405。所述金属层405在所述第一沟槽310中存留,形成所述金属线410。经由CMP处理的结果,所述介电层220的顶面和所述金属线410的顶面可形成实质上共面的结构。
所述金属线410可通过其它位于下层的互连方案或者通过有源和/或无源元件的端子(例如,源极、漏极和栅极接点)耦合到于所述衬底210中的有源和/或无源元件。
参看图1和图5A到图5B,所述方法100进行到步骤108,在所述金属线410上形成硬掩模510(或切割硬掩模)和介电层220。所述硬掩模510具有第一开口520和第二开口525,以分别暴露所述金属线410的第一部分和第二部分,其分别标记为参考数字410A和410B。在本实施例中,所述第一开口520沿A-A线的方向以一段距离远离所述第二开口525,所述距离被选择为未来金属岛的目标长度L,如下文所述。在一些实施例中,所述硬掩模510界定宽于金属线410的所述第一开口520和所述第二开口525,且所述第一介电层220的一部分也暴露在所述第一开口520和所述第二开口525中,其标记为参考数字220A。在其它的实施例中,所述第一开口520和所述第二开口525具有更大的宽度以使得其延伸到邻近所述第一介电层220A以具有更多的好处。
在一些实施例中,所述硬掩模510是图形化光致抗蚀剂层。在另一实施例中,所述硬掩模510是由一工艺所形成,所述工艺包含沉积硬掩模层,形成图形化光致抗蚀剂层于所述硬掩模层之上,以及使用所述图形化光致抗蚀剂层作为蚀刻掩模来蚀刻所述硬掩模层。
参看图1和图6A到图6B,所述方法100进行到步骤110,其分别通过所述第一开口520和所述第二开口525来去除所述金属线410暴露的第一部分410A和第二部分410B,以分别形成第二沟槽610和第三沟槽620。位于所述第一开口520和所述第二开口525之间的金属线410的第三部分在蚀刻处理期间由所述硬掩模520保护。蚀刻处理可以包含湿蚀刻、干蚀刻和/或上述的组合。在一些实施例中,所述金属线410是铜线,且在反应性离子蚀刻(Reactive ion etching,RIE)中应用的铜蚀刻气体包含CxHy、CxFy、CxHyFz或上述的组合。下标x,y或z的值大于0且小于6。在一些实施例中,在反应性离子蚀刻(RIE)中应用的铜蚀刻气体另包含一氧化碳(CO)和氧气(O2)中的一者,以及氮气(N2)和氩(Ar)中的一者。在进一步的例子中,蚀刻温度(衬底温度)的范围在约20℃到约120℃之内。在另一实例中,所述蚀刻温度的范围是约20℃到约80℃之内。
在一些实施例中,所述第二沟槽610和所述第三沟槽620都形成具有锥形侧壁轮廓,以使得沿线A-A的方向所述第二沟槽610和所述第三沟槽620具有大于第二宽度w2的第一宽度w1,所述第二宽度w2是所述第二沟槽610和所述第三沟槽620的底部开口的宽度。
在一些实施例中,湿蚀刻处理可被取代或另外用来去除暴露的所述第一部分410A和所述第二部分410B。相应的蚀刻剂包含HCl、FeCl3和H2O的混合。在另一实施例中,当所述金属线410包含其它合适的金属时,如铝或钨,也可以使用其它的蚀刻气体。
在一些实施例中,所述金属线410包含围绕所述金属线410A的阻挡层。在这种情况下,所述蚀刻处理另包含蚀刻所述阻挡层。在实施例中,去除暴露的所述金属线410A的所述蚀刻处理包含:如上所述的第一蚀刻子步骤以蚀刻所述金属层405;和第二蚀刻子步骤以蚀刻所述阻挡层,如干蚀刻和/或湿蚀刻。举例来说,蚀刻所述阻挡层的所述第二蚀刻子步骤包含使用包含CxFx、N2(或Ar)、CxHy、和Cl2(或HBr)的气体的干蚀刻。在另一个实施例中,湿蚀刻用来蚀刻所述阻挡层,且相应的蚀刻剂包含具有NH4OH、H2O2和H2O的标准清洁溶液(Standard clean solution,SC1)。
如上述参看图5A到图5B所讨论的内容,在一些实施例中,所述介电层220A的一部分暴露在所述第一开口520和所述第二开口525内。在这种情况下,合适地选择蚀刻处理以蚀刻暴露的所述第一部分410A和所述第二部分410B,而不用实质上蚀刻所述暴露的介电层220A。在这实施例中,于所述第一开口520和所述第二开口525内的介电层220A的暴露部分在蚀刻处理期间充当子蚀刻掩模。在具有适当的蚀刻选择性下,使用自对准特性来去除暴露的所述第一部分410A和所述第二部分410B,可以减少了蚀刻处理的限制。
参看图6C和图6D,去除暴露的所述第一部分410A和所述第二部分410B后,所述硬掩模510被蚀刻处理去除。在例子中,所述硬掩模510是光致抗蚀剂图形,所述硬掩模510通过湿气和/或等离子灰化去除。如图所示,所述金属线410被划分成多个子金属线,其包含金属岛410I,所述金属岛410I是在所述第一开口520和所述第二开口525之间的所述金属线410的第三部分,如图5A和5B所示。如图所示,所述金属线410的所述第一部分410A界定了所述第二沟槽610的第一侧壁615,所述金属岛410I界定了所述第二沟槽610的第二侧壁616,以及所述第三沟槽620的第三侧壁625。所述金属线410的所述第二部分410B界定了所述第三沟槽620的第四侧壁626。
如上述参看图5A到图5B所讨论的内容,在一些实施例中,所述第二沟槽610和第三沟槽620具有锥形侧壁轮廓。在这样的情况下,所述金属岛410I沿着线A-A的方向具有顶部长度LT,所述顶部长度LT小于其底部长度LB。同时,位于所述金属岛410I每一侧的金属线410的每一者分别具有大于其顶部长度LD的底部长度LC。
在本实施例中,所述金属岛410I是通过切割所述金属线410形成,而不是在小的沟槽中填充金属层以形成金属岛。这样的方法避免了空隙填充问题,如于金属岛410I内形成空隙,或用较差的金属填充步骤来覆盖所述沟槽的侧壁和底部。
参看图1和图7A到7B,所述方法100进行到步骤112,通过沉积第二介电层710于所述第一介电层220上、所述金属岛410I和所述金属线410,包含填充所述第二沟槽610和所述第三沟槽620以提供所述金属岛410I和所述金属线410之间的电隔离。所述金属岛410I嵌入所述第二介电层710中。在实施例中,所述第二电介质材料层710与所述第一电介质材料层220的组成相似。例如,所述第二介电层710包含低k介电材料、氧化硅或其它合适的介电材料层。所述第二介电层710具有介电常数(k)低于二氧化硅的介电常数的材料以降低电容成分以及金属线之间的串扰,以最小化时间延迟和功耗。所述第二介电层710可以通过CVD、ALD或旋涂沉积。
如图7A到7B所示,所述第二介电层710实质上填充所述第二沟槽610和所述第三沟槽620。如例子所示,所述第二介电层710是由旋涂电介质(SOD)处理沉积以实质上填充所述第二沟槽610和所述第三沟槽620。
在另一实施例中,所述第二介电层710安置在所述第二沟槽610和所述第三沟槽620中,其包含空隙(或空气空隙)715,以进一步降低平均介电常数且提高隔离效率,如图7C所示。所述空气空隙715可通过选择和调集成适的沉积处理以形成所述第二介电层710。在实施例中,所述第二介电层710由CVD沉积,且CVD沉积被调整以形成所述空气空隙715。例如,当所述CVD沉积速率被调整到更高以使得所述第二介电层710在完全填充所述第二沟槽610和所述第三沟槽620之前关闭,从而形成所述空气空隙715。
在本实施例中,所述第二介电层710在所述金属岛410I和所述金属线410形成后沉积。这有利地防止所述第二介电层710经历等离子体损伤。在所述金属层405形成期间和随后所述金属线410的蚀刻时,所述离子体损伤可发生到所述第二电介质710上。所述离子体损伤降低了低K介电常数值,且引起电路较差的电容性能。所述第二介电层710的沉积还伴随着所述第二沟槽610中的自我形成空气空隙的能力,如上述图7C所讨论的内容。
其它的步骤在此之前或在此期间被提供,在所述方法100后,一些所描述的步骤可以被替换、消除,或为所述方法100的其它实施例移动。
所述的半导体装置200可包含附加特征,所述附加特征可通过随后的处理形成。例如,在衬底210上形成各种导孔或线和多层互连功能(例如,金属层和夹层电介质)。例如,多层互连包含垂直互连,如常规的导孔或导线;以及水平互连,如金属线。各种互连特征可实施各种导电材料,包含铜、钨和/或硅化物。在实例中,使用单镶嵌和/或双镶嵌处理来形成铜有关的多层互连方案。
基于上述内容可以得出,本发明内容提供一种形成小的金属岛的方法。所述方法使用切割金属线以形成金属岛以避免小的空隙填充缺陷。所述方法使用一方案,所述方案包含首先形成金属线,包括金属岛,接着形成低k介电层,以最小化工艺对低k介电层上所引起的损伤。
本发明内容提供制造半导体装置的多个不同实施例,所述实施例提供了一个或多个针对现有方法的改进。在实施例中,一种用于制造半导体装置的方法包含:形成第一介电层于衬底上;形成第一沟槽于所述第一介电层中;形成金属线于所述第一沟槽中;去除所述金属线的第一部分以形成第二沟槽,并去除所述金属线的第二部分以形成第三沟槽。所述金属线的第三部分致安置在所述第二沟槽与所述第三沟槽之间。所述方法还包含形成第二介电层于所述第二沟槽和所述第三沟槽内。
在另一实施例中,一种方法包含形成第一介电层于衬底上;形成金属线于所述第一介电层中;形成图形化硬掩模层于所述金属线上。所述图形化硬掩模层具有暴露所述金属线的第一开口和第二开口。所述方法还包含:通过所述第一开口和所述第二开口分别去除所述金属线的暴露部分,以形成第一沟槽和第二沟槽;以及形成第二介电层于所述第一沟槽和所述第二沟槽内。
在另一实施例中,一种半导体装置包含:第一金属线,其沿着第一方向安置在衬底上;以及第二金属线,其沿着所述第一方向并对准到所述第一金属线。所述第二金属线的侧壁沿着所述第一方向具有一个锥形侧壁轮廓。所述第二金属线沿着所述第一方向的底侧比所述第二金属线的顶侧宽。
前文概述了几个实施例的特征,使得所属领域的技术人员可以更好地理解本发明内容的各个方面。所属领域的技术人员应当理解,其可以容易地使用本发明作为用于实现相同目的和/或实现本文所介绍的实施例的相同的优点设计或修改其它过程和结构的基础。所属领域的技术人员也应该认识到,这样的等效构造不偏离本发明内容的精神和范围,并且它们可以在此不脱离本发明的精神和范围的前提下进行各种改变、替换和变更。
Claims (10)
1.一种方法,其包括:
形成第一电介质层于衬底上;
形成第一沟槽于所述第一电介质层中;
形成金属线于所述第一沟槽中;
去除所述金属线的第一部分以形成第二沟槽,并去除所述金属线的第二部分以形成第三沟槽,其中所述金属线的第三部分安置在所述第二沟槽与所述第三沟槽之间;以及
形成第二电介质层于所述第二沟槽和所述第三沟槽内。
2.根据权利要求1所述的方法,其中所述金属线的第一部分包括具有第一宽度的顶部部分以及具有不同于所述第一宽度的第二宽度的底部部分。
3.根据权利要求2所述的方法,其中所述第二宽度大于所述第一宽度。
4.根据权利要求1所述的方法,其中去除所述金属线的所述第一部分以形成所述第二沟槽后,所述金属线的所述第一部分界定了所述第二沟槽的第一侧壁且所述金属线的所述第三部分界定了所述第二沟槽的第二侧壁,
其中去除所述金属线的所述第二部分以形成所述第三沟槽后,所述金属线的所述第二部分界定所述第二沟槽的第三侧壁且所述金属线的所述第三部分界定所述第三沟槽的第四侧壁。
5.根据权利要求1所述的方法,其中所述去除金属线的所述第一部分以形成所述第二沟槽且去除金属线的所述第二部分以形成所述第三沟槽的方法包括:
于所述金属线上形成具有两个开口的硬掩模,其中所述金属线的所述第一部分和所述第二部分分别暴露在所述两个开口处;
蚀刻所述金属线的所述两个暴露的部分;以及
去除所述硬掩模。
6.根据权利要求1所述的方法,其另包含延伸所述两个开口以分别暴露部分的所述第一电介质层,其中在去除所述金属线的所述两个暴露部分期间,所述暴露的电介质层是做为子蚀刻掩模。
7.根据权利要求1所述的方法,其中形成所述第二电介质层于所述第二沟槽和所述第三沟槽内包含于所述第二电介质材料层内形成空气空隙。
8.根据权利要求1所述的方法,其中所述形成所述金属线包括形成包含铜的金属线,所述包含铜的金属线是选自由铜(Cu)、铜镁(CuMn)、铜铝(CuAl)、铜硅(CuSi)与其组合所构成的群组。
9.一种方法,其包括:
形成第一电介质层于衬底上;
形成金属线于所述第一电介质层中;
形成图形化硬掩模层于所述金属线上,其中所述图案化硬掩模层具有暴露所述金属线的第一开口和第二开口;
通过所述第一开口和所述第二开口分别去除所述金属线的暴露部分,以形成第一沟槽和第二沟槽;以及
形成第二电介质层于所述第一沟槽和所述第二沟槽内。
10.一种装置,其包括:
第一金属线,其沿着第一方向安置在衬底上;以及
第二金属线,其沿着所述第一方向并对准到所述第一金属线,其中所述第二金属线的侧壁沿着所述第一方向具有一个锥形侧壁轮廓,其中所述第二金属线沿着所述第一方向的底侧比所述第二金属线的顶侧宽。
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CN113314461A (zh) | 2021-08-27 |
TW201705363A (zh) | 2017-02-01 |
KR102024971B1 (ko) | 2019-09-24 |
TWI600118B (zh) | 2017-09-21 |
US20170025346A1 (en) | 2017-01-26 |
US9589890B2 (en) | 2017-03-07 |
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