CN106298469A - A kind of ion injection method of SiC JBS device - Google Patents

A kind of ion injection method of SiC JBS device Download PDF

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Publication number
CN106298469A
CN106298469A CN201510240443.2A CN201510240443A CN106298469A CN 106298469 A CN106298469 A CN 106298469A CN 201510240443 A CN201510240443 A CN 201510240443A CN 106298469 A CN106298469 A CN 106298469A
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ion
sic
mask
photoresist
ion injection
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杨霏
李玲
田亮
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State Grid Corp of China SGCC
State Grid Anhui Electric Power Co Ltd
Smart Grid Research Institute of SGCC
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State Grid Corp of China SGCC
State Grid Anhui Electric Power Co Ltd
Smart Grid Research Institute of SGCC
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
    • H01L21/046—Making n or p doped regions or layers, e.g. using diffusion using ion implantation
    • H01L21/0465—Making n or p doped regions or layers, e.g. using diffusion using ion implantation using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/872—Schottky diodes

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

The ion injection method of a kind of SiC JBS device, this method includes: the upper surface at the second conductivity type silicon carbide substrate deposits and injects mask；The region not carrying out ion implanting, etching is protected to inject mask, expose the region needing to carry out ion implanting on substrate with photoresist；Continue etching silicon carbide substrate, form etched recesses；Remove photoresist；Inject the first conductive type ion, form the first the conductive type ion injection region under SiC JBS device electrode.The method is in the case of ion implantation energy is identical, increase the degree of depth of ion implanting under SiC JBS device electrode, improve the breakdown reverse voltage of device, make the first conductivity regions of injection increase with the contact area of the second conduction type SiC substrate simultaneously, increase electric current density to a certain extent, improve device performance, and technique be simple, it is easy to accomplish.

Description

A kind of ion injection method of SiC JBS device
Technical field
The present invention relates to the manufacture method of a kind of SiC JBS device, be specifically related to the ion implanting side of a kind of SiC JBS device Method.
Background technology
Relative to development on the first generation quasiconductor with silicon as representative and the second filial generation semiconductor foundation with GaAs representative The carborundum of third generation quasiconductor and gallium nitride have bigger energy gap and critical breakdown electric field, are suitable for manufacturing the big merit of high temperature Rate semiconductor device.Silicon carbide power device is one of current focus device researched and developed in the world.At silicon carbide power commutator In, most widely used have Power SBD (SBD), PiN diode and Junction Barrier Schottky (JBS) two Pole is managed.
SBD is easiest to manufacture, and is also the most business-like SiC power device, and it is 3kV applications below at blocking voltage In occupy dominant advantage.SBD is how sub-device, has less storage electric charge during forward conduction, therefore greatly reduces anti- To peak point current and recovery time, thus reduce the power attenuation of system.The transient state restoring current of the SBD sensitivity to temperature Property strong, therefore temperature raises the loss of Reverse recovery little.But its reverse leakage current is relatively big, the most in the case of a high temperature, Because of by backward voltage higher time Schottky image force potential barrier reduce and affected, reverse leakage current with reversed bias voltage increase more Significantly, in addition along with the rising of temperature, the conducting resistance of SBD also can be greatly increased, thus limits device for surge electricity The ability to bear of stream.SiC SBD Schottky barrier sector width ratio is relatively thin, and it is pressure by reverse leakage current in tunneling barrier district Restriction, for the barrier height of 1eV, under the highest reversed bias voltage corresponding with SiC critical breakdown electric field 3MV/cm Barrier region width only about 3nm, close to the representative width of generation electron tunneling, seriously limits the high-voltage applications of SBD.
PiN diode is a kind of bipolar device, has higher pressure and relatively low reverse leakage current, is mainly used in voltage More than in the application of 3kV, but owing to there is substantial amounts of storage electric charge during its forward conduction in drift region, seriously limit The switching speed of device, and during reversely turning off, there is bigger reverse recovery current at forward conduction, the most extensive The multiple time is relatively long, and cut-in voltage is relatively big (～about 2.5V), and in the case of forward bias is equal, its current value is remote Much smaller than SiC SBD, and after long-term work, it may appear that the situation that forward voltage reduces.If a kind of device can be had same Time possess the little cut-in voltage of SBD, turn on electric current, fast switching speed greatly, and PiN diode low-leakage current, height puncture The advantage of voltage, will be best selection undoubtedly.In order to solve the problems referred to above, JBS diode arises at the historic moment.
PN junction is integrated in Schottky junction structure by JBS diode, for the JBS device of N-type SiC substrate, is passing The network structure that the schottky device drift region of system is integrated with the P+ district of interdigital and is formed.Its operation principle is as follows:
1, when JBS device forward bias, due to cut-in voltage (～1.0V) the opening than PN junction of 4H-SiC schottky junction Opening voltage (～2.5V) low, Schottky diode first turns at lower voltages；Along with the increase of forward bias, PN Knot conducting, the now conductance modulation effect of PN junction will reduce Schottky diode electric conduction under forward high current density Resistance, thus reduce the forward voltage drop of device.Under less forward bias, its electrology characteristic is similar to Schottky diode, electricity Current density can reduce due to the existence of p type island region, and the characteristic under high current density is similar to PiN (referring mainly to MPS structure).
2, when JBS device reverse bias, the depletion region that PN junction is formed will extend along raceway groove to N-type region, necessarily Reversed bias voltage under, adjacent PN junction depletion region can UNICOM, this by conducting channel pinch off thus forms a gesture at channel region Building, and depletion layer is along with increase extension below the raceway groove of N+ substrate of reverse biased, the backward voltage increased will drop Fall on depletion layer, schottky interface is shielded from outside high electric field, it is to avoid Schottky barrier reduces effect, now JBS Reverse characteristic mainly determined by PiN diode, reverse leakage current is greatly reduced.
3, JBS device also has obvious additional carriers to inject when forward current density is bigger, in PiN, These carriers are many path extending transversely, can improve injection than and recombination rate, it is thus possible to reduce the density of storage carrier, Therefore there is less reverse recovery current and recovery time.It addition, use JBS structure potential barrier can be selected neatly low Metal does not worries that as Schottky contacts reverse leakage current can increase.
The PN formed under SiC JBS electrode must carry out ion implanting.Bigger close owing to having compared with SiC with Si Degree, therefore in the case of co-energy injection, the injection degree of depth that ion can be formed in SiC can be less, and this is accomplished by adopting Ion implantation technology is carried out with bigger Implantation Energy.In order to improve the breakdown reverse voltage of SiC JBS diode, need Increasing further the degree of depth of ion implanting, for reaching deeper injection zone, its Implantation Energy may need to reach MeV sometimes Rank, this is difficulty with under usual process conditions.Therefore, it is necessary to seek the ion implanting of more preferable SiC JBS device Method makes SiC JBS device.
Summary of the invention
For the problems referred to above, the present invention provides the ion injection method of a kind of SiC JBS device, and the method effectively increases The degree of depth of ion implanting under SiC JBS device electrode, improves the reverse voltage endurance capability of device, and the first simultaneously making injection is led Electricity class area increases with the contact area of the second conductivity type silicon carbide substrate, increases electric current density to a certain extent, carries High device performance, and technique is simple, it is easy to accomplish.
For achieving the above object, the present invention adopts the following technical scheme that the ion injection method of a kind of SiC JBS device, Said method comprising the steps of:
Step one, the upper surface in silicon carbide substrates deposits and injects mask；
Step 2, carries out photoetching to injecting mask, exposes the region needing to carry out ion implanting；
Step 3, etching is injected mask, and then etching silicon carbide substrate, is formed etched recesses；
Step 4, removes photoresist；
Step 5, injects ion, forms ion implanted region.
First optimal technical scheme of the ion injection method of described SiC JBS device, described silicon carbide substrates be 4H-SiC, 6H-SiC or 3C-SiC substrate.
Second optimal technical scheme of the ion injection method of described SiC JBS device, described silicon carbide substrates be N-type or P-type.
3rd optimal technical scheme of the ion injection method of described SiC JBS device, described injection mask be silicon oxide, The stepped construction of one or more builtup films in silicon nitride, non-crystalline silicon, metallic film, photoresist.
4th optimal technical scheme of the ion injection method of described SiC JBS device, the thickness of described injection mask is 0.5 μm～10 μm.
5th optimal technical scheme of the ion injection method of described SiC JBS device, the forming method of described injection mask Be plasma enhanced chemical vapor deposition method (PECVD:Plasma Enhanced Chemical Vapor Deposition), Low Pressure Chemical Vapor Deposition (LPCVD:Low Pressure Chemical Vapor Deposition), magnetron sputtering, heat The combination of one or more methods in evaporation coating method.
6th optimal technical scheme of the ion injection method of described SiC JBS device, described in step 2 during photoetching Photoresist is positive photoresist, negative photoresist or reversal photoresist.
7th optimal technical scheme of the ion injection method of described SiC JBS device, ion implanting described in step 2 Region is positioned at the base part of SiC JBS device.
8th optimal technical scheme of the ion injection method of described SiC JBS device, the method for etching described in step 3 It it is the combination of ICP etching, RIE etching, one or more methods in wet etching.
9th optimal technical scheme of the ion injection method of described SiC JBS device, described in step 2 after photoetching, hard Film photoresist.
Tenth optimal technical scheme of the ion injection method of described SiC JBS device, the method for described post bake photoresist: At 50 DEG C～350 DEG C, with hot plate post bake 0.1min～60min or with baking oven post bake 1min～180min.
11st optimal technical scheme of the ion injection method of described SiC JBS device, removes photoetching described in step 4 The method of glue: organic solvent removes photoresist, inorganic solvent removes photoresist or oxygen plasma dry method is removed photoresist.
12nd optimal technical scheme of the ion injection method of described SiC JBS device, injects ion described in step 5 Method be high temperature tension.
13rd optimal technical scheme of the ion injection method of described SiC JBS device, the temperature of described high temperature tension Degree is more than or equal to 500 degrees Celsius.
14th optimal technical scheme of the ion injection method of described SiC JBS device, the energy of described high temperature tension Amount is 10keV～2MeV.
With immediate prior art ratio, the invention have the benefit that
1) in the case of ion implantation energy is constant, p-type under SiC JBS device electrode or N-shaped ion implanting are increased The degree of depth, forms thicker voltage blocking layer in the case of device reverse operation, has given full play to SBD structure and has tied with PiN The advantage that structure combines, increases the most pressure of device；
2) p-type or N-shaped ion implanted region increase the most further with the contact area of SiC substrate, increase to a certain extent The device electric current density when forward works；
3) increase electric current density and the backward voltage of SiC JBS device simultaneously, improve the performance of SiC JBS device, and Its technique is simply easily achieved.
Accompanying drawing explanation
Fig. 1: use the SiC JBS device cross-section schematic diagram that conventional method makes；
Fig. 2: use the SiC JBS device cross-section schematic diagram that the inventive method makes；
Fig. 3: embodiment 1 deposits in N-type silicon carbide substrates 3 μm SiO2As the device cross-section signal injecting mask Figure；
To SiO in Fig. 4: embodiment 12Layer carries out the device cross-section schematic diagram of photoetching；
In Fig. 5: embodiment 1, RIE etches SiO2Under injection mask formation electrode, the device cross-section after ion implanting window shows It is intended to；
Fig. 6: embodiment 1 uses ICP mode continue to etch N-type silicon carbide substrates, form the device after etched recesses horizontal Schematic cross-section；
The cross sectional representation of device after removal positive photoresist in Fig. 7: embodiment 1；
Fig. 8: embodiment 1 intermediate ion injects and forms the device cross-section schematic diagram of p-type injection region under electrode.
Fig. 9: embodiment 2 deposits in N-type silicon carbide substrates SiO2And Si3N4Layer is transversal as the device injecting mask Face schematic diagram；
To SiO in Figure 10: embodiment 22And Si3N4Layer carries out the device cross-section schematic diagram of photoetching；
Figure 11: embodiment 2 etches SiO2And Si3N4Under injection mask formation electrode, the device after ion implanting window is transversal Face schematic diagram；
Figure 12: embodiment 2 continues etching N-type silicon carbide substrates, forms the device cross-section schematic diagram after etched recesses；
The cross sectional representation of device after removal positive photoresist in Figure 13: embodiment 2；
Figure 14: embodiment 2 intermediate ion injects and forms the device cross-section schematic diagram of p-type injection region under electrode.
To SiO in Figure 15: embodiment 32Layer carries out the device cross-section schematic diagram of negative-working photoresist；
Figure 16: embodiment 3 etches SiO in ICP mode2Inject the device after ion implanting window under mask formation electrode Cross sectional representation；
Figure 17: embodiment 3 continues to etch N-type silicon carbide substrates in ICP mode, forms the device after etched recesses horizontal Schematic cross-section；
Figure 18: embodiment 4 deposits in p-type silicon carbide substrates 3 μm SiO2Show as the device cross-section injecting mask It is intended to；
To SiO in Figure 19: embodiment 42Layer carries out the device cross-section schematic diagram of photoetching；
In Figure 20: embodiment 4, RIE etches SiO2Inject the device cross-section after ion implanting window under mask formation electrode Schematic diagram；
Figure 21: embodiment 4 uses ICP mode continue to etch p-type silicon carbide substrates, form the device after etched recesses horizontal Schematic cross-section；
The cross sectional representation of device after removal positive photoresist in Figure 22: embodiment 4；
Figure 23: embodiment 4 intermediate ion injects and forms the device cross-section schematic diagram of N-type injection region under electrode.
Figure 24: embodiment 5 deposits in p-type silicon carbide substrates SiO2And Si3N4Layer is transversal as the device injecting mask Face schematic diagram；
To SiO in Figure 25: embodiment 52And Si3N4Layer carries out the device cross-section schematic diagram of photoetching；
Figure 26: embodiment 5 etches SiO2And Si3N4Under injection mask formation electrode, the device after ion implanting window is transversal Face schematic diagram；
Figure 27: embodiment 5 continues etching p-type silicon carbide substrates, forms the device cross-section schematic diagram after etched recesses；
The cross sectional representation of device after removal positive photoresist in Figure 28: embodiment 5；
Figure 29: embodiment 5 intermediate ion injects and forms the device cross-section schematic diagram of N-type injection region under electrode.
To SiO in Figure 30: embodiment 62Layer carries out the device cross-section schematic diagram of negative-working photoresist；
Figure 31: embodiment 6 etches SiO in ICP mode2Inject the device after ion implanting window under mask formation electrode Cross sectional representation；
Figure 32: embodiment 6 continues to etch p-type silicon carbide substrates in ICP mode, forms the device after etched recesses transversal Face schematic diagram；
Description of reference numerals
1 N-type silicon carbide substrates
2 SiO2Ion implantation mask
3 p-types inject ion
4 p-type ion implanted regions
5 back electrodes
6 passivation layers
7 front electrodes
8 9920 positive photoresists
9 mask plates being used for positive photoresist photoetching
10 ultraviolet
11 Si3N4Ion implantation mask
12 L300 negative photoresists
13 mask plates being used for negative photoresist photoetching
14 p-type silicon carbide substrates
15 N-types inject ion
16 N-type ion implanted regions
Detailed description of the invention
Use SiC JBS device architecture that common ion injection method formed as it is shown in figure 1, due to the energy of ion implanting Being limited by process conditions, the degree of depth of 7 times ion implanted regions 4 of electrode typically in 0.4 μm～0.6 μm, limits device anti- To pressure further raising.
Present disclosure mainly during the first conductivity type implanted region, completes note under forming SiC JBS device electrode After entering the opening etch of mask 2, continue etching silicon carbide substrate 1, form etched recesses, then carry out the first conduction Types of ion 3 injects, and forms the first conductive type ion injection region that the degree of depth is bigger, as in figure 2 it is shown, increase device The most pressure, increase the electric current density during work of device forward to a certain extent simultaneously.
Below in conjunction with the accompanying drawings the detailed description of the invention of the present invention is described in further detail.Additionally, this invention is not limited to following Embodiment.In the scope identical and impartial with the present invention, following embodiment can be made various change.
Embodiment 1
Concrete technology flow process is as follows:
Step one: prepare the N-type silicon carbide substrates 1 with N-type silicon carbide epitaxial layers, carry out sample clean.Use sulphuric acid Sample is carried out by the 3# liquid constituted with hydrogen peroxide, uses 1# liquid that ammonia, hydrogen peroxide, water constitutes and hydrochloric acid, double Sample is entered by 2# liquid and buffer oxide layer etching agent (BOE:Buffered Oxide Etchant) solution that oxygen water, water are constituted Row cleans, then dries sample after acetone, ethanol, deionized water cleaning sample.
Step 2: with reference to Fig. 3, use PECVD method growth ion note in complete N-type silicon carbide substrates 1 cleaning Enter mask 2SiO2About 3 μm.
Step 3: with reference to Fig. 4, mask 2 is injected in photoetching.Spin coating 9920 positive photoresist 8 in N-type silicon carbide substrates, Sample is carried out front baking by hot plate, uses the mask plate 9 for positive photoresist photoetching, sample is exposed for 10 times at ultraviolet light Light operates, and the position of mask plate 9 printing opacity is the region needing to carry out ion implanting, after having exposed, needs to carry out ion note Enter positive photoresist 8 degeneration in region, can etch away with developed liquid, with baking oven, sample be carried out post bake operation, SiO2Carve Erosion barrier layer makes complete.
Step 4: with reference to Fig. 5, uses RIE technique etching SiO2Mask, through the etching process of about 15 minutes, SiO2 Material etch is complete, now needs the region carrying out ion implanting not have SiO2Mask protection, it is not necessary to carry out ion implanting There is SiO in region2Mask protection.
Step 5: SiO will be made2The sample of mask takes out from RIE etching apparatus, is immediately placed in ICP etching machine Row etching, is continuing with ICP and etches SiO2SiC material under mask, etching gas is SF6And O2, through about 5 points Clock, about etching depth areMeet etching requirement, with reference to Fig. 6.
Step 6: use positive glue stripper to remove SiO2On photoresist, with reference to Fig. 7, now SiO2Ion implantation mask system Make complete.
Step 7: with reference to Fig. 8, uses high temperature tension machine to carry out p-type ion implanting, forms the P under device electrode+District.
Step 9: again through follow-up prepare electrode and passivation technology after, can prepare increase simultaneously SiC JBS device electricity Current density and the device of backward voltage.
Embodiment 2
Concrete technology flow process is as follows:
Step one: prepare the N-type silicon carbide substrates 1 with N-type silicon carbide epitaxial layers, carry out sample clean.Use sulphuric acid Sample is carried out by the 3# liquid constituted with hydrogen peroxide, uses 1# liquid that ammonia, hydrogen peroxide, water constitutes and hydrochloric acid, double Oxygen water, water constitute 2# liquid and buffer oxide layer etching agent BOE solution sample is carried out, re-use acetone, ethanol, Deionized water cleans sample, dries sample afterwards.
Step 2: with reference to Fig. 9, grow ion implantation mask SiO on complete N-type silicon carbide substrates sample cleaning2About 2 μm, then at SiO2Grown silicon nitride mask 0.5 μm on mask.
Step 3: with reference to Figure 10, mask is injected in photoetching.Spin coating 9920 positive photoresist 8 in N-type silicon carbide substrates, Sample is carried out front baking by hot plate, uses the mask plate 9 for positive photoresist photoetching, sample is entered for 10 times at ultraviolet light Row exposing operation, the position of mask plate 9 printing opacity is the region needing to carry out ion implanting, lighttight position for need not into The region of row ion implanting, after having exposed, needs to carry out positive photoresist 8 degeneration of ion implanted regions, can be shown Shadow liquid etches away, it is not necessary to the most developed liquid in region carrying out ion implanting etches away, and with baking oven, sample is carried out post bake operation, Si3N4And SiO2Etching barrier layer makes complete.
Step 4: with reference to Figure 11, uses RIE technique etching Si3N4And SiO2Mask, etched through about 15 minutes Journey, Si3N4And SiO2Material etch is complete.The region carrying out ion implanting is now needed not have Si3N4And SiO2Mask is protected Protect, it is not necessary to there is Si in the region carrying out ion implanting3N4And SiO2Mask protection.
Step 5: sample is taken out, is immediately placed in ICP etching machine and performs etching.It is continuing with ICP and etches Si3N4With SiO2N-type SiC substrate material under mask, etching gas is SF6And O2, through about 5 minutes, about etching depth wasMeet etching requirement, with reference to Figure 12.
Step 6: use positive glue stripper to remove Si3N4And SiO2Photoresist in stepped construction, with reference to Figure 13, now Si3N4And SiO2The ion implantation mask of stepped construction completes.
Step 7: with reference to Figure 14, uses high temperature tension machine to carry out p-type injection, forms the P under device electrode+District.
Step 8: again through follow-up prepare electrode and passivation technology after, can prepare increase simultaneously SiC JBS device electricity Current density and the device of backward voltage.
Embodiment 3
Concrete technology flow process is as follows:
Step one: prepare the N-type silicon carbide substrates 1 with N-type silicon carbide epitaxial layers, carry out sample clean.Use sulphuric acid With hydrogen peroxide constitute 3# liquid sample is carried out, use ammonia, hydrogen peroxide, water constitute 1#, hydrochloric acid, hydrogen peroxide, Water constitute 2# liquid and buffer oxide layer etching agent BOE solution sample is carried out, re-use acetone, ethanol, go from Sub-water cleans sample, dries sample afterwards.
Step 2: inject mask SiO cleaning growth on complete N-type silicon carbide substrates sample2About 3 μm.
Step 3: with reference to Figure 15, mask is injected in photoetching.Spin coating L300 negative photoresist 12 in N-type silicon carbide substrates, Sample carries out front baking by hot plate, uses the mask plate 13 for negative photoresist photoetching, to sample ultraviolet light 10 times Being exposed operation, the position of mask plate 13 printing opacity is the region being made without ion implanting, and lighttight position is for needing The region of ion implanting to be carried out, after having exposed, it is not necessary to carries out negative photoresist 8 degeneration of ion implanted regions, no Can etch away by developed liquid, need the region carrying out ion implanting can etch away with developed liquid, with baking oven, sample is carried out heavily fortified point Membrane operations, SiO2Etching barrier layer makes complete.
Step 4: with reference to Figure 16, uses ICP to etch SiO2Mask, through the etching process of about 10 minutes, SiO2Material Etch complete.
Step 5: do not take out silicon carbide sample, immediately silicon carbide sample is carried out ICP etching, is continuing with ICP and etches SiO2 SiC material under mask, etching gas is SF6And O2, through about 5 minutes, about etching depth wasMeet Etching requirement, with reference to Figure 17.
Step 6: use negative glue stripper to remove SiO2On negative photoresist, now SiO2Ion implantation mask has made Finish.
Step 7: use high temperature tension machine to carry out p-type ion implanting, form the P under device electrode+District.
Step 8: again through follow-up prepare electrode and passivation technology after, can prepare increase simultaneously SiC JBS device electricity Current density and the device of backward voltage.
Embodiment 4
Concrete technology flow process is as follows:
The concrete technology flow process of present embodiment is as follows:
Step one: prepare the p-type silicon carbide substrates 14 with p-type silicon carbide epitaxial layers, carry out sample clean.Use sulphuric acid Sample is carried out by the 3# liquid constituted with hydrogen peroxide, uses 1# liquid that ammonia, hydrogen peroxide, water constitutes and hydrochloric acid, double Sample is entered by 2# liquid and buffer oxide layer etching agent (BOE:Buffered Oxide Etchant) solution that oxygen water, water are constituted Row cleans, and re-uses acetone, ethanol, deionized water cleaning sample, dries sample afterwards.
Step 2: with reference to Figure 18, use PECVD method growth ion note in complete p-type silicon carbide substrates 1 cleaning Enter mask SiO22 about 3 μm.
Step 3: with reference to Figure 19, mask is injected in photoetching.Spin coating 9920 positive photoresist 8 in p-type silicon carbide substrates, Sample is carried out front baking by hot plate, uses the mask plate 9 for positive photoresist photoetching, sample is entered for 10 times at ultraviolet light Row exposing operation, the position of mask plate 9 printing opacity is the region needing to carry out ion implanting, lighttight position for need not into The region of row ion implanting, after having exposed, needs to carry out positive photoresist 8 degeneration of ion implanted regions, can be shown Shadow liquid etches away, it is not necessary to the most developed liquid in region carrying out ion implanting etches away, and with baking oven, sample is carried out post bake operation, SiO2Etching barrier layer makes complete.
Step 4: with reference to Figure 20, uses RIE technique etching SiO2Mask, through the etching process of about 15 minutes, SiO2 Material etch is complete, now needs the region carrying out ion implanting not have SiO2Mask protection, it is not necessary to carry out ion implanting There is SiO in region2Mask protection.
Step 5: SiO will be made2The sample of mask takes out from RIE etching apparatus, is immediately placed in ICP etching machine Row etching, is continuing with ICP and etches SiO2P-type SiC material under mask, etching gas is SF6And O2, through about 5 Minute, about etching depth isMeet etching requirement, with reference to Figure 21.
Step 6: use positive glue stripper to remove SiO2On photoresist, with reference to Figure 22, now SiO2Ion implantation mask Make complete.
Step 7: with reference to Figure 23, uses high temperature tension machine to carry out N-type ion 15 and injects, formed under device electrode N+District 16.
Step 9: again through follow-up prepare electrode and passivation technology after, can prepare increase simultaneously SiC JBS device electricity Current density and the device of backward voltage.
Embodiment 5
Concrete technology flow process is as follows:
Step one: prepare the p-type silicon carbide substrates 14 with p-type silicon carbide epitaxial layers, carry out sample clean.Use sulphuric acid Sample is carried out by the 3# liquid constituted with hydrogen peroxide, uses 1# liquid that ammonia, hydrogen peroxide, water constitutes and hydrochloric acid, double Oxygen water, water constitute 2# liquid and buffer oxide layer etching agent BOE solution sample is carried out, re-use acetone, ethanol, Deionized water cleans sample, dries sample afterwards.
Step 2: with reference to Figure 24, grow ion implantation mask SiO on complete p-type silicon carbide substrates 14 sample cleaning2About 2 μm, then at SiO2Grown silicon nitride mask 0.5 μm on mask.
Step 3: with reference to Figure 25, mask is injected in photoetching.Spin coating 9920 positive photoresist 8 in p-type silicon carbide substrates 14, Sample is carried out front baking by hot plate, uses the mask plate 9 for positive photoresist photoetching, sample is entered for 10 times at ultraviolet light Row exposing operation, the position of mask plate 9 printing opacity is the region needing to carry out ion implanting, lighttight position for need not into The region of row ion implanting, after having exposed, needs to carry out positive photoresist 8 degeneration of ion implanted regions, can be shown Shadow liquid etches away, it is not necessary to the most developed liquid in region carrying out ion implanting etches away, and with baking oven, sample is carried out post bake operation, Si3N4And SiO2Etching barrier layer makes complete.
Step 4: with reference to Figure 26, uses RIE technique etching Si3N4And SiO2Mask, etched through about 15 minutes Journey, Si3N4And SiO2Material etch is complete.The region carrying out ion implanting is now needed not have Si3N4And SiO2Mask is protected Protect, it is not necessary to there is Si in the region carrying out ion implanting3N4And SiO2Mask protection.
Step 5: sample is taken out, is immediately placed in ICP etching machine and performs etching.It is continuing with ICP and etches Si3N4With SiO2P-type SiC substrate material 14 under mask, etching gas is SF6And O2, through about 5 minutes, about etching was deep Degree isMeet etching requirement, with reference to Figure 27.
Step 6: use positive glue stripper to remove Si3N4And SiO2Photoresist in stepped construction, with reference to Figure 28, now Si3N4And SiO2The ion implantation mask of stepped construction completes.
Step 7: with reference to Figure 29, uses high temperature tension machine to carry out N-type ion 15 and injects, formed under device electrode N+District 16.
Step 8: again through follow-up prepare electrode and passivation technology after, can prepare increase simultaneously SiC JBS device electricity Current density and the device of backward voltage.
Embodiment 6
Concrete technology flow process is as follows:
Step one: prepare the p-type silicon carbide substrates 14 with p-type silicon carbide epitaxial layers, carry out sample clean.Use sulphuric acid With hydrogen peroxide constitute 3# liquid sample is carried out, use ammonia, hydrogen peroxide, water constitute 1#, hydrochloric acid, hydrogen peroxide, Water constitute 2# liquid and buffer oxide layer etching agent BOE solution sample is carried out, re-use acetone, ethanol, go from Sub-water cleans sample, dries sample afterwards.
Step 2: inject mask SiO cleaning growth on complete p-type silicon carbide substrates 14 sample2About 3 μm.
Step 3: with reference to Figure 30, mask is injected in photoetching.Spin coating L300 negative photoresist 12 in p-type silicon carbide substrates, Sample carries out front baking by hot plate, uses the mask plate 13 for negative photoresist photoetching, to sample ultraviolet light 10 times Being exposed operation, the position of mask plate 13 printing opacity is the region being made without ion implanting, and lighttight position is for needing The region of ion implanting to be carried out, after having exposed, it is not necessary to carries out negative photoresist 8 degeneration of ion implanted regions, no Can etch away by developed liquid, need the region carrying out ion implanting can etch away with developed liquid, with baking oven, sample is carried out heavily fortified point Membrane operations, SiO2Etching barrier layer makes complete.
Step 4: with reference to Figure 31, uses ICP to etch SiO2Mask, through the etching process of about 10 minutes, SiO2Material Etch complete.
Step 5: do not take out silicon carbide sample, immediately silicon carbide sample is carried out ICP etching, is continuing with ICP and etches SiO2 P-type SiC material 14 under mask, etching gas is SF6And O2, through about 5 minutes, about etching depth was Meet etching requirement, with reference to Figure 32.
Step 6: use negative glue stripper to remove SiO2On negative photoresist, now SiO2Ion implantation mask has made Finish.
Step 7: use high temperature tension machine to carry out N-type ion implanting, form the N under device electrode+District.
Step 8: again through follow-up prepare electrode and passivation technology after, can prepare increase simultaneously SiC JBS device electricity Current density and the device of backward voltage.
The most according to specific exemplary embodiment, invention has been described.To one skilled in the art Carrying out suitable replacement without departing from the scope of the invention or amendment will be apparent from.Exemplary embodiment is only Being illustrative rather than limiting the scope of the present invention, the scope of the present invention be defined by the appended.

Claims (15)

1. an ion injection method for SiC JBS device, said method comprising the steps of:
Step one, the upper surface at the second conductivity type silicon carbide substrate deposits and injects mask；
Step 2, carries out photoetching to injecting mask, exposes the region needing to carry out ion implanting；
Step 3, etching is injected mask, and then etching silicon carbide substrate, is formed etched recesses；
Step 4, removes photoresist；
Step 5, injects the first conductive type ion, forms the first conductive type ion injection region.
The ion injection method of SiC JBS device the most according to claim 1, it is characterised in that described silicon carbide substrates It it is 4H-SiC, 6H-SiC or 3C-SiC substrate.
The ion injection method of SiC JBS device the most according to claim 1, it is characterised in that described the second conducts electricity Type is N-type or p-type.
The ion injection method of SiC JBS device the most according to claim 1, it is characterised in that described injection mask is The stepped construction of one or more builtup films in silicon oxide, silicon nitride, non-crystalline silicon, metallic film, photoresist.
The ion injection method of SiC JBS device the most according to claim 1, it is characterised in that described injection mask Thickness is 0.5 μm～10 μm.
The ion injection method of SiC JBS device the most according to claim 1, it is characterised in that described injection mask Forming method is plasma enhanced chemical vapor deposition method, Low Pressure Chemical Vapor Deposition, magnetron sputtering, thermal evaporation plating The combination of one or more methods in embrane method.
The ion injection method of SiC JBS device the most according to claim 1, it is characterised in that light described in step 2 Photoresist during quarter is positive photoresist, negative photoresist or reversal photoresist.
The ion injection method of SiC JBS device the most according to claim 1, it is characterised in that described in step 2 from The region that son injects is positioned at the base part of SiC JBS device.
The ion injection method of SiC JBS device the most according to claim 1, it is characterised in that carve described in step 3 The method of erosion is the combination of one or more methods in ICP etching, RIE etching, wet etching.
The ion injection method of SiC JBS device the most according to claim 1, it is characterised in that described in step 2 After photoetching, post bake photoresist.
The ion injection method of 11. SiC JBS devices according to claim 10, it is characterised in that described post bake photoetching The method of glue: at 50 DEG C～350 DEG C, with hot plate post bake 0.1min～60min or with baking oven post bake 1min～180min.
The ion injection method of 12. SiC JBS devices according to claim 1, it is characterised in that described in step 4 The method removing photoresist: organic solvent removes photoresist, inorganic solvent removes photoresist or oxygen plasma dry method is removed photoresist.
The ion injection method of 13. SiC JBS devices according to claim 1, it is characterised in that described in step 5 The method injecting ion is high temperature tension.
The ion injection method of 14. SiC JBS devices according to claim 13, it is characterised in that described High temperature ion The temperature injected is more than or equal to 500 degrees Celsius.
The ion injection method of 15. SiC JBS devices according to claim 13, it is characterised in that described High temperature ion The energy injected is 10keV～2MeV.
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CN109755110A (en) * 2017-11-08 2019-05-14 株洲中车时代电气股份有限公司 A kind of manufacturing method of SiC JBS device front electrode
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CN107331616A (en) * 2017-06-19 2017-11-07 中国科学院微电子研究所 A kind of trench junction barrier schottky diode and preparation method thereof
CN107331616B (en) * 2017-06-19 2020-03-06 中国科学院微电子研究所 Trench junction barrier Schottky diode and manufacturing method thereof
CN109755110A (en) * 2017-11-08 2019-05-14 株洲中车时代电气股份有限公司 A kind of manufacturing method of SiC JBS device front electrode
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CN110164983A (en) * 2019-05-29 2019-08-23 西安电子科技大学 A kind of Junction Barrier Schottky diode being gradually increased from center to edge Schottky contacts
CN110246846A (en) * 2019-06-18 2019-09-17 长江存储科技有限责任公司 A kind of 3D nand memory part and its manufacturing method
CN111755522A (en) * 2020-06-02 2020-10-09 西安电子科技大学 Silicon carbide UMOSFET device integrated with TJBS
CN111755522B (en) * 2020-06-02 2021-10-08 西安电子科技大学 Silicon carbide UMOSFET device integrated with TJBS
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