CN106783964A - A kind of wide band gap semiconductor device and preparation method thereof - Google Patents
A kind of wide band gap semiconductor device and preparation method thereof Download PDFInfo
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- CN106783964A CN106783964A CN201710060381.6A CN201710060381A CN106783964A CN 106783964 A CN106783964 A CN 106783964A CN 201710060381 A CN201710060381 A CN 201710060381A CN 106783964 A CN106783964 A CN 106783964A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 47
- 238000002360 preparation method Methods 0.000 title claims abstract description 34
- 238000005530 etching Methods 0.000 claims abstract description 30
- 229910052751 metal Inorganic materials 0.000 claims description 65
- 239000002184 metal Substances 0.000 claims description 65
- 238000000407 epitaxy Methods 0.000 claims description 27
- 239000000758 substrate Substances 0.000 claims description 15
- 239000007924 injection Substances 0.000 claims description 13
- 238000002347 injection Methods 0.000 claims description 13
- 239000000463 material Substances 0.000 claims description 10
- 230000004888 barrier function Effects 0.000 claims description 9
- 238000007254 oxidation reaction Methods 0.000 claims description 6
- 230000000873 masking effect Effects 0.000 claims description 4
- 230000003647 oxidation Effects 0.000 claims description 4
- 238000000034 method Methods 0.000 abstract description 13
- 238000005468 ion implantation Methods 0.000 abstract description 8
- 229910010271 silicon carbide Inorganic materials 0.000 description 30
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 26
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 25
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 18
- 230000002441 reversible effect Effects 0.000 description 15
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 14
- 150000002500 ions Chemical class 0.000 description 14
- 229910052719 titanium Inorganic materials 0.000 description 14
- 239000010936 titanium Substances 0.000 description 14
- 229910052759 nickel Inorganic materials 0.000 description 13
- 229940090044 injection Drugs 0.000 description 12
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 10
- 238000000137 annealing Methods 0.000 description 9
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 8
- 229920002120 photoresistant polymer Polymers 0.000 description 8
- 239000000377 silicon dioxide Substances 0.000 description 7
- 230000005611 electricity Effects 0.000 description 6
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 5
- 229910003978 SiClx Inorganic materials 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 5
- 229910052799 carbon Inorganic materials 0.000 description 5
- 230000005684 electric field Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 230000002829 reductive effect Effects 0.000 description 5
- 239000004411 aluminium Substances 0.000 description 4
- 239000004408 titanium dioxide Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- REDXJYDRNCIFBQ-UHFFFAOYSA-N aluminium(3+) Chemical compound [Al+3] REDXJYDRNCIFBQ-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000003763 carbonization Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 230000000670 limiting effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 241001640117 Callaeum Species 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
- -1 aluminum ions Chemical class 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- MOFOBJHOKRNACT-UHFFFAOYSA-N nickel silver Chemical compound [Ni].[Ag] MOFOBJHOKRNACT-UHFFFAOYSA-N 0.000 description 1
- 239000010956 nickel silver Substances 0.000 description 1
- 238000011017 operating method Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
Abstract
The present invention proposes a kind of wide band gap semiconductor device and preparation method thereof, and the wide band gap semiconductor device includes schottky portion, for the conducting electric current under normal voltage state；PN junction part, for occur current surge when with the common conducting electric current of schottky portion, the PN junction part includes at least one structure for increasing effective area, the structure for increasing effective area is used in the case where PN junction surface area is constant, increase the actual effective area of PN junction, so that device has surge current ability higher.The preparation method of wide band gap semiconductor device of the invention, by etching groove, small angle inclination ion implantation doping is carried out with the bottom to groove, side wall, form dentation p-type doped region, in the case where keeping Schottky and PN junction surface area constant, increase the actual effective area of PN junction so that the wide band gap semiconductor device being obtained by this method has surge current ability higher.
Description
Technical field
The present invention relates to field of semiconductor manufacture, more particularly to a kind of wide band gap semiconductor device and preparation method thereof, tool
Body is related to a kind of Schottky diode and preparation method thereof.
Background technology
The diode of carborundum is divided into Schottky diode and PN junction diode.Because PN junction diode cut-in voltage is high,
Be unfavorable for reducing the on-state loss of device, thus in the market commercialization silicon carbide diode ceiling voltage to 1700V, and all
It is Schottky diode.The characteristics of Schottky diode has cut-in voltage low, but it has the disadvantage when device bears pressure-resistant,
With the increase of backward voltage, because Schottky is influenceed by electric field, reverse leakage current is caused to be increased dramatically.In order to solve carbonization
Leaked electricity in silicon Schotty diode too high problem, the technology that each major company uses at present is JBS (junction barrier
Schottkky) Junction Barrier Schottky and MPS (merged PiN schottky).
The main p-type doped region using plane forms PN junction in JBS and MPS structures, when device bears reversely pressure-resistant, will
Point of maximum electric field is shifted, and makes it away from Schottky contacts, so as to reach the influence of shielding Electric Field on Surface Schottky, reduces device
Reverse leakage current.
Wherein, p-type doped region ratio is further have adjusted in MPS structures, makes its PN junction diode in certain forward direction electricity
Pressure can be turned on, and conductance modulation is carried out to device, be conducive to further being reduced in high current the forward voltage drop of whole diode,
It is more beneficial for improving the surge current ability of diode.Compared with JBS structure, MPS structures are more excellent, the current pole of each large silicon carbide two
Guan companies are progressively using MPS structures come instead preceding JBS structure.
For MPS structures, the positive contact of its structure is collectively constituted by schottky junction part and PN junction part.Low
Under voltage, opened by Schottky and bear forward current.Electric current increases, when forward voltage drop increases to PN junction cut-in voltage value, PN junction
Part just turns on.During generation current surge, electric current is undertaken by the unlatching of PN junction part.It is by Xiao Te when normally using
Base section undertakes electric current.Therefore, in order to further reduce forward voltage drop during diode current flow, the Xiao Te in device need to be improved
Base section.And in order to improve the surge capacity of device, it is necessary to PN junction area in improving device.In the timing of chip area one, this
It is formed certain contradictory relation.
No matter JBS or MPS, be that point of maximum electric field is shifted by p-type doped region, reduce surface field, reach drop
The purpose of low Schottky reverse leakage.In order to further reduce the reverse leakage of SiC schottky diode, it is necessary to further
Increase p-type doped region doping depth.And p-type doping is mainly injected or repeatedly injection by energetic ion in silicon carbide device
Extension is carried out, and the increase of doping depth also implies that the increase of technology difficulty and cost.
P-type doping is mainly realized by aluminum ions high temperature tension and high annealing in silicon carbide device, in height
After temperature annealing, the carborundum for having carried out p-type doping can be recrystallized, and surface roughness increases.P in the JBS and MPS of surface type
The silicon carbide roughness that type doped region is caused increases, and the reverse leakage current of adjacent Schottky contacts can be caused to increase.
The content of the invention
Schottky and PN junction can not be being kept the invention aims to solve Schottky diode of the prior art
Increase the problem of PN junction effective area in the case that surface area is constant, propose a kind of wide band gap semiconductor device and its making side
Method, particularly a kind of Schottky diode and preparation method thereof.
Wide band gap semiconductor device of the invention, including schottky portion, for the conducting electric current under normal voltage state；
PN junction part, for occur current surge when with the common conducting electric current of schottky portion, it is characterised in that the PN junction part
Including at least one structure for increasing effective area, metal electrode, the increasing are filled with the structure of the increase effective area
Plus the structure of effective area is used to increase in the case where PN junction surface area is constant the actual effective area of PN junction, so that
Device has larger PN junction part.
Preferably, be provided with insulating medium layer between the schottky portion and PN junction part, for formed barrier layer with
The two is avoided to contact.
Preferably, the structure for increasing effective area includes the groove being formed in N-type epitaxy layer, and by described
The bottom of groove and the injection doping of side wall form dentation p-type doped region.
Preferably, the PN junction part also includes：N-type substrate layer, its lower surface is formed with back metal electrode；Outside N-type
Prolong layer, be incorporated into the N-type substrate layer upper surface；Surface p-type doped region, is formed at the surface of the N-type epitaxy layer；Front gold
Category electrode, is filled in the structure of the increase effective area, and the surface for being formed at the surface p-type doped region.
Preferably, the schottky portion includes：N-type substrate layer, its lower surface is formed with back metal electrode；Outside N-type
Prolong layer, be incorporated into the upper surface of the N-type substrate layer；Schottky metal electrode, is formed at the surface of the N-type epitaxy layer.
Preferably, the top view shapes of the groove or dentation p-type doped region include bar shaped, circle, ellipse, rectangle,
More than triangle and five sides one kind in polygon or combination.
Preferably, the shape of cross section of the groove or dentation p-type doped region is included more than rectangle, triangle and five sides
Polygon in one kind or combination.
Preferably, the insulating medium layer is silica dioxide medium layer, or is answering comprising silica and silicon nitride
Close structured media layer.
Preferably, the metal in the front metal electrode and/or back metal electrode includes the one kind in nickel, titanium, aluminium
Or it is various.
Preferably, the schottky metal electrode is titanium；Or nickel；Or the complex metal layer of titanium, nickel.
The present invention also proposes a kind of preparation method of wide band gap semiconductor device, comprises the following steps：
S1：The material of extension n-type doping on N-type substrate material, forms N-type epitaxy layer；
S2：Doped p-type area is injected in N-type epitaxy layer, surface p-type doped region is formed；
S3：At least one is made in N-type epitaxy layer increases the structure of effective area.
Preferably, the step S3 is comprised the following steps：
S31：Etch to form a groove or the spaced ditch of two or more on the periphery of above-mentioned surface p-type doped region
Groove；
S32：On body structure surface after being processed through step S31, oxidation growth and the certain thickness insulating medium layer of deposit,
And etch away the insulating medium layer of channel bottom；
S33：Etching groove to the depth for needing is continued by the masking action of insulating medium layer；
S34：Being injected by small angle inclination carries out p type island region doping to channel bottom and side wall, forms the doping of dentation p-type
Area.
Preferably, in the step S34, bottom and side wall to groove carry out the inclination injector angle used during ion implanting
θ, value is designed according to following principle：
Wherein, WtIt is groove width, LtIt is the depth of groove, XoIt is thickness of dielectric layers.
Preferably, the preparation method of the wide band gap semiconductor device is further comprising the steps of：
S4：Schottky metal electrode is made on N-type epitaxy layer surface；
S5：Etch away the insulating medium layer on surface p-type doped region surface；
S6：Make front and back metal electrode.
Compared with prior art, beneficial effects of the present invention have：
Wide band gap semiconductor device of the invention, PN junction part includes at least one structure for increasing effective area, is protecting
Hold Schottky and PN junction surface area it is constant in the case of, the actual effective area of PN junction is increased, so that width of the invention
Bandgap semiconductor device has bigger PN, can have surge current ability higher under identical chips area.
Further, wide band gap semiconductor device of the invention, is set by between schottky portion and PN junction part
Insulating medium layer, forms barrier layer, it is to avoid the p-type doped region after high annealing easily causes Schottky to leak electricity increased shortcoming,
The reverse leakage current of wide band gap semiconductor device of the present invention can further be reduced.
Further, wide band gap semiconductor device of the invention, PN junction part includes at least one dentation p-type doped region,
The doping depth of p-type doped region is increased, the reverse leakage current of wide band gap semiconductor device of the present invention can be further reduced.
The preparation method of wide band gap semiconductor device of the invention, by etching groove, and bottom to groove, side wall enter
Row small angle inclination ion implantation doping, forms dentation p-type doped region, is keeping Schottky and the constant feelings of PN junction surface area
Under condition, the actual effective area of PN junction is increased so that the wide band gap semiconductor device being obtained by this method has wave higher
Gush current capacity.
Further, the preparation method of wide band gap semiconductor device of the invention, by etching groove and small angle inclination
Ion implantation doping, forms dentation p-type doped region, increases the depth of p-type doped region, can further reduce and be obtained by this method
Wide band gap semiconductor device reverse leakage current.
Brief description of the drawings
Fig. 1 is the structural representation of Schottky diode in the embodiment of the present invention 1.
Fig. 2 a are the structural representations that are presented of preparation method step S1 of the Schottky diode of the embodiment of the present invention 1.
Fig. 2 b are the structural representations that are presented of preparation method step S2 of the Schottky diode of the embodiment of the present invention 1.
Fig. 2 c are the structural representations that are presented of preparation method step S3 of the Schottky diode of the embodiment of the present invention 1.
Fig. 2 d are the structural representations that are presented of preparation method step S4 of the Schottky diode of the embodiment of the present invention 1.
Fig. 2 e are the structural representations that are presented of preparation method step S5 of the Schottky diode of the embodiment of the present invention 1.
Fig. 2 f are the structural representations that are presented of preparation method step S6 of the Schottky diode of the embodiment of the present invention 1.
Fig. 2 g are the structural representations that are presented of preparation method step S7 of the Schottky diode of the embodiment of the present invention 1.
Fig. 2 h are the structural representations that are presented of preparation method step S8 of the Schottky diode of the embodiment of the present invention 1.
Fig. 3 is the structural parameters schematic diagrames that are presented of preparation method step S5 of the Schottky diode of the embodiment of the present invention 1.
Fig. 4 is the structural representation of Schottky diode in the embodiment of the present invention 2.
Fig. 5 is the structural representation of Schottky diode in the embodiment of the present invention 3.
Fig. 6 is the structural representation of Schottky diode in the embodiment of the present invention 4.
Fig. 7 is the overlooking the structure diagram of Schottky diode in the embodiment of the present invention 5.
Fig. 8 is structural representations of the Fig. 7 at Section A-A in the embodiment of the present invention 5.
Specific embodiment
The present invention is described in detail by specific embodiment below in conjunction with the accompanying drawings, for a better understanding of this hair
It is bright, but following embodiments are not intended to limit the scope of the invention.In addition, it is necessary to explanation, the diagram provided in following embodiments
Basic conception of the invention is only illustrated in a schematic way, and only display is with relevant component in the present invention rather than according to reality in accompanying drawing
Component count, shape during implementation and size are drawn, it is actual when the implementing shape of each component, quantity and ratio can for one kind with
The change of meaning, and its assembly layout form be likely to it is increasingly complex.
Embodiment 1
Wide band gap semiconductor device of the invention specifically refers to a kind of schottky diode device, embodiments of the invention 1
Propose that a kind of use etching groove and small angle inclination injection doping form carborundum Xiao of the p-type doped region with dentalation
The structure of special based diode, as shown in figure 1, including front metal electrode 1, schottky metal electrode 2, insulating medium layer 3, p-type
The dentation p-type doped region adulterated in trivial 4, including surface p-type doped region and groove, silicon carbide N type epitaxial layer 5, silicon carbide N type
Substrate layer 6, back metal electrode 7.Be can see by Fig. 1, the PN junction part bag of the schottky diode device of the present embodiment
Containing two structures of increase effective area, the structure of the increase effective area specifically includes the groove being formed in N-type epitaxy layer,
Dentation p-type doped region is formed with doping is injected by the bottom to the groove and side wall, the groove top view shapes are bar
Shape, shape of cross section is rectangle.Wherein, in the present embodiment, above-mentioned schottky metal electrode 2 is titanium；Front metal
Electrode 1 is aluminum metal layer；The more metal layers that back metal electrode 7 is made up of nickel, titanium, aluminium；P-type doped region 4 is aluminium doping
Impurity range；Insulating medium layer 3 is silica dioxide medium layer.In other embodiments, above-mentioned schottky metal electrode 2 can also be
Nickel or titanium, the more metal layers of nickel；Back metal electrode 7 can also be titanium, aluminum metal layer or nickel, aluminum metal layer；Insulation is situated between
Matter layer 3 can also be the composite construction dielectric layer of silica and silicon nitride.
In the present embodiment, schottky metal electrode 2 and silicon carbide N type epitaxial layer 5, the silicon carbide N type substrate layer 6, back side
Metal electrode 7 forms Schottky diode portion；Front metal electrode 1, p-type doped region 4 and silicon carbide N type epitaxial layer 5, carbon
SiClx N-type substrate layer 6, back metal electrode 7 forms PN diode sections.It is tight between metal electrode 1 and metal electrode 2
The different metal of contact, the electric current of back metal electrode 2 can be flowed out by front metal electrode 1.
Forward voltage, when voltage is increased to about 0.8V, schottky metal electrode 2 and carbon are applied to front metal electrode 1
SiClx N-type epitaxy layer 5, silicon carbide N type substrate layer 6, back metal electrode 7 form Schottky diode conducting, electric current via
Front metal electrode 1 is flowed into, via schottky metal electrode 2 and silicon carbide N type epitaxial layer 5, silicon carbide N type substrate layer 6, from the back of the body
Face metal electrode 7 flows out.
When voltage continues to be increased to about 3V, front metal electrode 1, p-type doped region 4 and silicon carbide N type epitaxial layer 5, carbon
SiClx N-type substrate layer 6, back metal electrode 7 forms the unlatching of PN diodes, with the common electric conduction of Schottky diode portion
Stream.After being opened due to PN junction, a large amount of holoe carriers are injected to silicon carbide N type epitaxial layer 5, greatly reduce the electricity of epitaxial layer 5
Resistance rate, and when conducting is greatly lowered epitaxial layer 5 resistance so that the He of front metal electrode 1 when reducing whole break-over of device
Forward voltage drop between back metal electrode 7.Therefore, the part of PN is bigger in device architecture, more advantageously reduces under high current
The forward voltage drop of device, when device occurs current surge, lower forward voltage drop advantageously reduces device during current surge
Power consumption, so as to reduce caloric value and the temperature rise of device.
The p-type doped region of the dentation shape formed in the Schottky diode structure that the embodiment of the present invention is proposed, by front gold
Category electrode 1 is connected, and its effective PN junction area for being formed reaches Z* (W+4*L), with simple only with the p-type doped region phase of plane
Than in identical structure length Z and width W, the Schottky diode structure of the embodiment of the present invention can provide bigger PN junction face
Product, the i.e. effective area of PN junction increases 4L*Z (in traditional plane MPS or JBS structure, the area of PN junction only has W*Z).
So, device has the PN diode current flow electric currents of more many areas under high current, makes front metal electrode 1 and back metal electrode
There is lower forward voltage drop, whole device has stronger surge current ability between 7.
In the Schottky diode structure of the embodiment of the present invention, using etching groove, the injection of trenched side-wall small angle inclination
Doping forms dentation p-type doped region, so can effectively increase the depth of p-type doped region 4.Use identical Implantation Energy, table
The p-type doped region junction depth of face structure reaches X1, and after being injected using etching groove and side wall, the junction depth of p-type doped region 4 can reach X2,
As shown in figure 1, X2>X1.Under identical ion implantation energy, the structure of the embodiment of the present invention can obtain the P of bigger junction depth
Type doped region 4, advantageously reduces the electric field at electrode 2 when device bears reversely pressure-resistant, so as to reduce reverse leakage at electrode 2
Stream.
In the Schottky diode structure of the embodiment of the present invention, insulating medium layer 3 is in front metal electrode 1 and outer carborundum
N-type forms barrier layer between prolonging layer 5, can be prevented effectively from front metal electrode 1 and be served as a contrast with silicon carbide N type epitaxial layer 5, silicon carbide N type
Electric resistance structure is formed between bottom 6, back metal electrode 7.After injection doping and high annealing are carried out in carbofrax material, injection
Doped region form can be roughening, forms defect level.If schottky metal electrode 2 and the directly contact of implanting p-type doped region 4, meeting
The reverse leakage current when device bears backward voltage of schottky metal electrode 2 is caused to increase.Insulating medium layer 3 is in p-type doped region 4
Barrier layer is formed and schottky metal electrode 2 between, it is to avoid p-type doped region 4 is contacted with schottky metal electrode 2, be conducive to drop
The reverse leakage current of low Schottky metal electrode 2.
In view of the feasibility of actual process, the structure of the Schottky diode of the embodiment of the present invention, as shown in figure 1, knot
Each size has following span in structure：0.5μm<X1<1.5μm；0.5μm+X1<X2<5μm；5μm<W<30μm.
Schottky diode with said structure, its preparation method is comprised the following steps：
S1：The material of extension n-type doping on N-type substrate material, forms N-type epitaxy layer.As shown in Figure 2 a, silicon carbide N
The carborundum of extension n-type doping on type backing material, forms silicon carbide N type epitaxial layer, and epitaxial layer concentration is 1e15/cm2~
1e16/cm2.In the present embodiment, the concentration of epitaxial layer is preferably 1e15/cm2。
S2：Doped p-type area is injected in N-type epitaxy layer, surface p-type doped region is formed.As shown in Figure 2 b, on epitaxial layer
Photoresist coating, exposure, development are carried out, barrier layer is done using photoresist, energetic ion injection is carried out using multiple aluminium ion, it is many
Secondary ion Implantation Energy span be 60keV~950keV, preferably 60keV~750keV, in the present embodiment, repeatedly from
Sub- Implantation Energy is 500keV.After ion implanting surface p-type doped region, knot are formed by 1600 DEG C~1650 DEG C of high annealing
Deep about 0.5 μm~1.5 μm.In the present embodiment, surface p-type is formed by 1630 DEG C of high annealing after ion implanting to adulterate
Area, junction depth is about 0.5 μm.
S3：At least one is made in N-type epitaxy layer increases the structure of effective area.The step includes following step again
Suddenly：
S31：Etch to form the spaced groove of two or more on the periphery of above-mentioned surface p-type doped region.Such as Fig. 2 b institutes
Show, the groove to form same depth is etched in the both sides of above-mentioned surface p-type doped region by photo etched mask.First deposit a layer thickness about
The silicon dioxide layer of 300nm, and photoresist is coated, photoresist is exposed, by the bridging effect of photoresist, mixed in p-type
The both sides in miscellaneous area, carry out the etching of silica, then remove photoresist, and carrying out carbonization silicon trench using reactive ion etching technology carves
Erosion, when surface p-type doped region junction depth is 0.5 μm~1.5 μm, the groove of corresponding first etching is 0.3 μm~1.3 μm.To carbon
After SiClx completes first etching groove, surface residual silica is removed by wet etching.In the present embodiment, surface p-type
Doped region junction depth is 0.5 μm, and the gash depth of corresponding first etching is 0.5 μm.The groove width for being formed is etched according to two
Spacing between groove is designed adjustment, when spacing is 5 μm between two grooves, etches the groove width for being formed and should be
1.3 μm~1.5 μm；When spacing increase between two grooves, when maximum increases to 30 μm, the width of groove can be adjusted between 1.5 μ
Numerical value between m~3 μm.In the present embodiment, when spacing is 5 μm between two grooves, etch the groove width for being formed and should be
1.5μm。
S32：On body structure surface after being processed through step S31, oxidation growth and the certain thickness insulating medium layer of deposit,
And etch away the insulating medium layer of channel bottom.As shown in Figure 2 c, the high-temperature oxydation growth thickness at 1100 DEG C~1200 DEG C
It is the silicon dioxide layer of 100nm~150nm, and is 250nm's by LPCVD (low-pressure chemical vapour deposition technique) deposition thickness
Silica dioxide medium layer.The dielectric layer of channel bottom is etched away using reactive ion etching method, exposes silicon carbide.
In the present embodiment, high-temperature oxydation growth thickness is the silicon dioxide layer of 130nm at 1150 DEG C, and by LPCVD deposition thicknesses
It is the silica dioxide medium layer of 250nm.
S33：By the masking action of insulating medium layer, continue etching groove to the depth for needing.As shown in Figure 2 d, again
Etching groove is carried out by reactive ion etching technology, the groove overall depth formed after etching is between 1.5 μm~5 μm.Such as
When groove width is 1.5 μm, when surface p-type doped region junction depth is 0.5 μm, about 3 μm of the overall depth of groove after etching；Or such as ditch
When well width is 2 μm~3 μm, when surface p-type doped region junction depth is 1.5 μm, the overall depth maximum of etching groove is to 5 μm.
In the present embodiment, groove width is 1.5 μm, and surface p-type doped region junction depth is 0.5 μm, the μ of the overall depth of groove about 3 after etching
m。
S34：Being injected by small angle inclination carries out p type island region doping to channel bottom and side wall, forms the doping of dentation p-type
Area.As shown in Fig. 2 e and Fig. 3, using the ion implanting at angle of inclination method (angle be defined as inject ion beam incidence side
To the angle with crystal column surface vertical line), aluminium ion is injected, p type island region doping is carried out to trenched side-wall and channel bottom, and 1600
High annealing at DEG C -1700 DEG C.In the present embodiment, annealing temperature is preferably 1650 DEG C.Small angle inclination is injected to trench bottom
Portion and side wall carry out p type island region doping, the inclination injector angle θ used when carrying out ion implanting to channel bottom and side wall, according to
Lower principle is designed value：
Wherein, WtIt is groove width, LtIt is gash depth, XoIt is thickness of dielectric layers.
In the present embodiment, the groove width and depth that the angle of ion implanting is formed according to etching carry out injector angle angle value
Choose, when such as groove width is 1.5 μm, when surface p-type doped region junction depth is 0.5 μm, the μ of the overall depth of groove about 3 after etching
M, when titanium dioxide thickness of dielectric layers is 0.35 μm, the angle of ion implanting is 12.6 °；When groove width is 1.5 μm, surface p-type
When doped region junction depth is 0.5 μm, about 5 μm of the overall depth of groove after etching, when titanium dioxide thickness of dielectric layers is 0.35 μm, ion
The angle of injection is 8 °；When groove width is 3 μm, when surface p-type junction depth is 1.5 μm, the μ of the overall depth of groove about 5 after etching
M, when titanium dioxide thickness of dielectric layers is 0.4 μm, the angle of ion implanting is 15.5 °.In the present embodiment, groove width is 1.5 μ
M, surface p-type doped region junction depth is 0.5 μm, and about 3 μm of the overall depth of groove after etching, titanium dioxide thickness of dielectric layers is 0.35 μ
M, the angle of ion implanting is 12.6 °.
The Schottky diode of the present embodiment, its preparation method is further comprising the steps of：
S4：Schottky metal electrode is made on N-type epitaxy layer surface.As shown in figure 2f, N-type epitaxy layer surface is first etched away
SI semi-insulation dielectric layer, expose silicon carbide, then again on silicon carbide sputter or evaporation form titanium or nickel, in titanium
Or sputtered on the metal level of nickel or evaporate relatively thin aluminium lamination, form schottky metal electrode, titanium or nickel and aluminum metal in the technique
In the multiple layer metal that layer is formed, titanium, the atomic percent range of nickel are 20%~75%.In the present embodiment, the atom of titanium, nickel
Percentage is 45%.
S5：Etch away the insulating medium layer on p-type doped region surface.As shown in Figure 2 g, photoresist is applied, and is etched to and carbon
SiClx epi-layer surface is approached, and gluing and is exposed again, after the insulating medium layer of dry etching surface p-type doped region, is removed photoresist.
S6：Make front and back metal electrode.As shown in fig. 2h, front aluminum metal layer is formed by deposit, thickness is about
It is 3 μm~3.5 μm.The more metal layers electrode of back side titanium/nickel silver is formed by sputtering or evaporation, between each metal layer thickness
Ratio range be about 1:4:10~1:8:20.In the present embodiment, the thickness of front aluminum metal layer is 3.2 μm, back side titanium,
The more metal layers electrode of nickel, silver, the ratio range between each metal layer thickness is 1:5:15.
The preparation method of the Schottky diode of the embodiment of the present invention, by etching groove, and enters to channel bottom, side wall
Row small angle inclination ion implantation doping, forms dentation p-type doped region, is keeping Schottky and the constant feelings of PN junction surface area
Under condition, the actual effective area of PN junction is increased so that the Schottky diode being obtained by this method has surge electricity higher
Stream ability.
Further, the preparation method of Schottky diode of the invention, by etching groove and small angle inclination ion
Injection doping, forms dentation p-type doped region, increases the depth of p-type doped region, can further reduce Xiao being obtained by this method
The reverse leakage current of special based diode.
Embodiment 2
In the Schottky diode structure of the embodiment of the present invention, as shown in figure 4, by etching groove, outside silicon carbide N type
Yan Qu surfaces form multiple groove structures for repeating, and then small angle inclination injection, is doped, shape to channel bottom and side wall
Into multiple dentation p-type doped regions, can further increase the effective area of PN junction, reach the energy for further improving device surge current
Power.As shown in figure 4, in the present embodiment, Schottky diode contains 3 structures of increase effective area.
Embodiment 3
As shown in figure 5, in the present embodiment, Schottky diode contains 4 structures of increase effective area, can be further
Increase the effective area of PN junction, reach the ability for further improving device surge current.Therefore, the present invention adulterates to dentation p-type
The number in area is not construed as limiting.
Embodiment 4
In the present embodiment, by etching groove, formed with certain angle of inclination groove, as shown in fig. 6, or
More grooves are added in the structure of this inclined groove, the present invention is not limited the shape and number of groove and p-type doped region
Fixed, in other embodiments, the shape of cross section of the groove can be in polygons more than rectangle, triangle or five sides
One kind or combination.
Embodiment 5
Embodiments of the invention 5 propose a kind of structure of SiC schottky diode, as shown in Figure 7 and Figure 8.In figure
It can be seen that, the Schottky diode of the present embodiment, PN junction part includes 6 structures of increase effective area, and the increase is effective
The structure of area specifically includes the groove being formed in N-type epitaxy layer, and is mixed by the bottom to the groove and the injection of side wall
Miscellaneous to form discrete dentation p-type doped region, the groove top view shapes are rectangle, and shape of cross section is also rectangle.This reality
The Schottky diode of example is applied, other structures are same as Example 1, will not be repeated here.
In the present embodiment, PN junction part includes 6 structures of increase effective area, and the groove or dentation p-type are adulterated
The plan view shape in area is rectangle, and in other embodiments, PN junction part can include the structure of more increase effective areas, described
The plan view shape of groove or dentation p-type doped region can be more than circle, ellipse, bar shaped, triangle, or pentagon many
One kind or combination in the shape of side.The present invention is to the groove in N-type epitaxy layer or the shape and number of discontinuous dentation p-type doped region
It is not construed as limiting.
The preparation method of the wide band gap semiconductor device with said structure, comprises the following steps：
S1：The material of extension n-type doping on N-type substrate material, forms N-type epitaxy layer；
S2：Doped p-type area is injected in N-type epitaxy layer, surface p-type doped region is formed；
S3：At least one is made in N-type epitaxy layer increases the structure of effective area.The step is comprised the following steps again：
S31：Etch to form six spaced grooves on the periphery of above-mentioned surface p-type doped region；
S32：On body structure surface after being processed through step S31, oxidation growth and the certain thickness insulating medium layer of deposit,
And etch away the insulating medium layer of channel bottom；
S33：Etching groove to the depth for needing is continued by the masking action of insulating medium layer；
S34：Being injected by small angle inclination carries out p type island region doping to channel bottom and side wall, forms discontinuous dentation p-type
Doped region.The inclination injector angle θ used when carrying out ion implanting to channel bottom and side wall, is designed according to following principle and takes
Value：
Wherein, WtIt is groove width, LtIt is gash depth, XoIt is thickness of dielectric layers.
The preparation method of the wide band gap semiconductor device of the present embodiment is further comprising the steps of：
S4：Schottky metal electrode is made on N-type epitaxy layer surface；
S5：Etch away the insulating medium layer on surface p-type doped region surface；
S6：Make front and back metal electrode.
In the preparation method of the wide band gap semiconductor device of the present embodiment, operating method and the phase of embodiment 1 of specific steps
Together, will not be repeated here.
Wide band gap semiconductor device of the invention, PN junction part includes at least one structure for increasing effective area, is protecting
Hold Schottky and PN junction surface area it is constant in the case of, the actual effective area of PN junction is increased, so that width of the invention
Bandgap semiconductor device has bigger PN, can have surge current ability higher under identical chips area.
Further, wide band gap semiconductor device of the invention, is set by between schottky portion and PN junction part
Insulating medium layer, forms barrier layer, it is to avoid the p-type doped region after high annealing easily causes Schottky to leak electricity increased shortcoming,
The reverse leakage current of wide band gap semiconductor device of the present invention can further be reduced.
Further, wide band gap semiconductor device of the invention, PN junction part includes at least one dentation p-type doped region,
The doping depth of p-type doped region is increased, the reverse leakage current of wide band gap semiconductor device of the present invention can be further reduced.
The preparation method of wide band gap semiconductor device of the invention, by etching groove, and bottom to groove, side wall enter
Row small angle inclination ion implantation doping, forms dentation p-type doped region, is keeping Schottky and the constant feelings of PN junction surface area
Under condition, the actual effective area of PN junction is increased so that the wide band gap semiconductor device being obtained by this method has wave higher
Gush current capacity.
Further, the preparation method of wide band gap semiconductor device of the invention, by etching groove and small angle inclination
Ion implantation doping, forms dentation p-type doped region, increases the depth of p-type doped region, can further reduce and be obtained by this method
Wide band gap semiconductor device reverse leakage current.
Above content is to combine specific preferred embodiment further description made for the present invention, it is impossible to assert
Specific implementation of the invention is confined to these explanations.For those skilled in the art, do not taking off
On the premise of present inventive concept, some equivalent substitutes or obvious modification can also be made, and performance or purposes are identical, all should
When being considered as belonging to protection scope of the present invention.
Claims (10)
1. a kind of wide band gap semiconductor device, including schottky portion, for the conducting electric current under normal voltage state；PN junction portion
Point, for occur current surge when with the common conducting electric current of schottky portion, it is characterised in that the PN junction part include extremely
The structure of few increase effective area, the structure of the increase effective area is used in the constant situation of PN junction surface area
Under, increase the actual effective area of PN junction, so that device has larger PN junction part.
2. wide band gap semiconductor device according to claim 1, it is characterised in that the schottky portion and PN junction part
Between be provided with insulating medium layer, for forming barrier layer to avoid the two from contacting.
3. wide band gap semiconductor device according to claim 1 and 2, it is characterised in that the knot of the increase effective area
Structure includes the groove being formed in N-type epitaxy layer, and forms dentation p-type by the bottom to the groove and the injection doping of side wall
Doped region.
4. wide band gap semiconductor device according to claim 3, it is characterised in that the PN junction part also includes：N-type is served as a contrast
Bottom, its lower surface is formed with back metal electrode；N-type epitaxy layer, is incorporated into the N-type substrate layer upper surface；Surface p-type is mixed
Miscellaneous area, is formed at the surface of the N-type epitaxy layer；Front metal electrode, is filled in the structure of the increase effective area, with
And it is formed at the surface of the surface p-type doped region.
5. wide band gap semiconductor device according to claim 3, it is characterised in that the groove or dentation p-type doped region
Top view shapes include bar shaped, circle, ellipse, rectangle, triangle and five sides more than polygon in one kind or group
Close.
6. wide band gap semiconductor device according to claim 3, it is characterised in that the groove or dentation p-type doped region
Shape of cross section include rectangle, triangle and five sides more than polygon in one kind or combination.
7. a kind of preparation method of wide band gap semiconductor device, it is characterised in that comprise the following steps：
S1：The material of extension n-type doping on N-type substrate material, forms N-type epitaxy layer；
S2：Doped p-type area is injected in N-type epitaxy layer, surface p-type doped region is formed；
S3：At least one is made in N-type epitaxy layer increases the structure of effective area.
8. the preparation method of wide band gap semiconductor device according to claim 7, it is characterised in that the step S3 includes
Following steps：
S31：Etch to form a groove or the spaced groove of two or more on the periphery of above-mentioned surface p-type doped region；
S32：On body structure surface after being processed through step S31, oxidation growth and the certain thickness insulating medium layer of deposit, and will
The insulating medium layer of channel bottom is etched away；
S33：Etching groove to the depth for needing is continued by the masking action of insulating medium layer；
S34：Being injected by small angle inclination carries out p type island region doping to channel bottom and side wall, forms dentation p-type doped region.
9. the preparation method of wide band gap semiconductor device according to claim 8, it is characterised in that in the step S34,
Bottom and side wall to groove carry out the inclination injector angle θ used during ion implanting, and value is designed according to following principle：
Wherein, WtIt is groove width, LtIt is the depth of groove, XoIt is insulating medium layer thickness.
10. according to the preparation method of any described wide band gap semiconductor devices of claim 7-9, it is characterised in that the width
The preparation method of bandgap semiconductor device is further comprising the steps of：
S4：Schottky metal electrode is made on N-type epitaxy layer surface；
S5：Etch away the insulating medium layer on surface p-type doped region surface；
S6：Make front and back metal electrode.
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