CN106252301A - 具有增大的爬电距离的电子装置 - Google Patents

具有增大的爬电距离的电子装置 Download PDF

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Publication number
CN106252301A
CN106252301A CN201610407705.4A CN201610407705A CN106252301A CN 106252301 A CN106252301 A CN 106252301A CN 201610407705 A CN201610407705 A CN 201610407705A CN 106252301 A CN106252301 A CN 106252301A
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China
Prior art keywords
lead
wire
encapsulating material
protrusion
recess
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Pending
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CN201610407705.4A
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English (en)
Inventor
E·菲尔古特
C·卡斯特兰
H·T·屈克
T·S·李
S·K·穆鲁甘
R·奥特伦巴
L·S·王
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Infineon Technologies AG
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Infineon Technologies AG
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Publication of CN106252301A publication Critical patent/CN106252301A/zh
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Abstract

一种装置包括封装材料、伸出到封装材料的表面之外的第一引线和第二引线。凹部延伸至封装材料的所述表面中。隆起部布置在封装材料的所述表面上，其中，第一引线伸出到隆起部之外。

Description

具有增大的爬电距离的电子装置
技术领域
本公开总体上涉及电子装置。更具体地，本公开涉及具有增大的爬电距离的电子装置。
背景技术
电子装置、例如功率半导体可以以高电压运行。在此，所述装置可需要遵守根据给定的安全标准的电绝缘要求。电子装置经常需要被改进。特别地，期望能够在不降低装置的性能和品质的情况下满足所要求的安全标准。对此，尤其期望能够增大装置的爬电距离。此外，期望能够降低系统成本和提供更高的功率密度。
发明内容
根据本发明，提出了一种装置，包括：封装材料；伸出到所述封装材料的表面之外的第一引线和第二引线；延伸至封装材料的所述表面中的凹部；以及布置在封装材料的所述表面上的第一隆起部，其中，第一引线伸出到第一隆起部之外。
根据本发明一有利实施例，所述凹部布置在第一引线与第二引线之间。
根据本发明一有利实施例，所述装置还包括：布置在封装材料的所述表面上的第二隆起部，其中，所述第二引线伸出到所述第二隆起部之外。
根据本发明一有利实施例，第一隆起部和第二隆起部具有相似的形状和尺寸。
根据本发明一有利实施例，封装材料的所述表面限定一平面，并且所述凹部的在所述平面之下的深度位于从100微米至2毫米的范围内。
根据本发明一有利实施例，封装材料的所述表面限定一平面，并且第一隆起部的在所述平面之上的高度位于从100微米至2毫米的范围内。
根据本发明一有利实施例，第一隆起部形成包围第一引线的凸缘。
根据本发明一有利实施例，所述凹部和第一隆起部中的至少一个是矩形的。
根据本发明一有利实施例，所述凹部从所述封装材料的第一主表面延伸至所述封装材料的第二主表面。
根据本发明一有利实施例，所述封装材料和第一隆起部由相同材料整体地形成。
根据本发明一有利实施例，所述封装材料包括环氧树脂、玻璃纤维填充的环氧树脂、玻璃纤维填充的聚合物、酰亚胺、填充的或未填充的热塑性聚合物材料、填充的或未填充的硬塑料聚合物材料、填充的或未填充的聚合物共混物、热固性材料、模制化合物、圆顶封装体材料、层合材料中的至少一种。
根据本发明一有利实施例，第一引线与第二引线之间的间距在从200微米至2毫米的范围内。
根据本发明一有利实施例，所述装置还包括：载体，其中，所述半导体芯片布置在所述载体的第一表面之上，并且所述载体的与第一表面相反的第二表面从所述封装材料暴露。
根据本发明一有利实施例，所述装置还包括：布置在载体的第二表面之上的散热器。
根据本发明一有利实施例，所述装置还包括：布置在所述封装材料与所述散热器之间的电绝缘且导热的层。
根据本发明一有利实施例，所述装置还包括：至少部分地被所述封装材料所覆盖的半导体芯片，其中，第一引线和第二引线中的至少一个电耦接至所述半导体芯片。
根据本发明，还提出了一种装置，包括：封装材料；伸出到所述封装材料的表面之外的第一引线和第二引线；延伸至封装材料的所述表面中的凹部；以及布置在封装材料的所述表面上的第一凸缘，其中，第一凸缘包围第一引线。
根据本发明一有利实施例，所述凹部布置在在第一引线与第二引线之间。
根据本发明一有利实施例，所述装置还包括：布置在封装材料的所述表面上的第二凸缘，其中，所述第二凸缘包围第二引线。
根据本发明，还提出了一种装置，包括：构造成能够容纳半导体芯片的壳体，其中，所述壳体包括具有第一开口和第二开口的表面，所述第一开口构造成能够容纳第一引线，所述第二开口构造成能够容纳第二引线；延伸至壳体的所述表面中的凹部；以及布置在壳体的所述表面上的隆起部，其中，所述隆起部包括所述第一开口。
根据本发明一有利实施例，所述凹部布置在第一开口与第二开口之间。
附图说明
附图被包括以提供对多个方面的进一步的理解并且并入本说明书并构成本说明书的一部分。附图示出了多个方面并且结合说明书来解释方面的原理。其它方面以及方面的许多期望的优点将通过参考下述详细说明来更好地理解，从而可被容易地意识到。附图的元件不一定相对于彼此按比例绘制。相同的附图标记可指代对应的类似的部件。
图1A示意性地示出了根据本公开的装置100的俯视图；
图1B示意性地示出了装置100的侧剖视图；
图2A示意性地示出了根据本公开的装置200的俯视图；
图2B示意性地示出了装置200的侧剖视图；
图2C示意性地示出了装置200的仰视图；
图3A至3C示意性地示出了根据本公开的装置300A至300C的侧剖视图。
具体实施方式
下述详细说明参考了附图，所述附图中以展示性方式示出了可以实践本公开的具体方面。在这点上，方向术语如“顶”、“底”、“前”、“后”可参考所描述的附图的方位来使用。由于所描述的装置的部件可以以多种不同的方位定位，因此方向术语可用于展示的目的，而不是限制性的。可以使用其它方面并且可以做出结构性或逻辑性的改变，而不会脱离本公开的概念。因此，下述详细说明不是限制性的，本公开的概念由所附的权利要求来限定。
本说明书中所应用的术语“连接”、“耦接”、“电连接”和/或“电耦接”不一定意味着元件必须直接连接或耦接在一起。中介元件可以设置在“连接的”、“耦接的”、“电连接的”或“电耦接的”元件之间。
此外，对于例如材料层形成或定位在一个物体的表面之上所使用的词语“之上”在此可用来指，该材料层可“直接地”定位(例如形成、沉积)在相应表面上、例如与相应表面直接接触。对于例如材料层形成或定位在一表面之上所使用的词语“之上”在此也可用来指，该材料层可“间接地”定位(例如形成、沉积)在相应表面上而在所述相应表面与所述材料层之间布置有例如一个或一个以上的附加层。
此外，对于两个或两个以上部件的相对方位在此可以使用词语“垂直”和“平行”。应当理解的是，这些术语不是必然意味着所描述的几何关系是以完美的几何意义来实现的。相反，对此可能需要考虑所涉及部件的制造公差。例如，如果半导体封装体的封装材料的两个表面被描述为彼此垂直(或平行)，那么这些表面之间的实际角度可以以一偏离值相对于确切的90(或0)度的值偏离，该偏离值尤其取决于在执行用于制造由封装材料制成壳体的技术时通常会出现的公差。
在此说明装置和用于制造装置的方法。关于所描述的装置所进行的说明也可适用于相应的方法，反之亦然。例如，如果装置的一特定部件被描述，那么用于制造该装置的相应的方法可包括以适当的方式提供该部件的步骤，即使这种步骤没有被明确描述或在附图中未被明确展示。此外，除非另有说明，否则在此所描述的各种示例性方面的特征可以彼此组合。
在此所描述的装置可包括任意类型的一个或一个以上半导体芯片。通常，半导体芯片例如可包括集成电路、电光电路或者机电电路、无源装置。集成电路通常可设计成逻辑集成电路、模拟集成电路、混合信号集成电路、功率集成电路、记忆电路、集成式无源装置、微机电系统。在一个示例中，半导体芯片可由基本的半导体材料、例如Si制成。在另一示例中，半导体芯片可以由复合半导体材料、例如GaN、SiC、SiGe、GaAs制成。特别地，半导体芯片可包括一个或一个以上功率半导体。功率半导体芯片可构造成例如二极管、功率MOSFET(金属氧化物半导体场效应晶体管，Metal OxideSemiconductor Field Effect Transistor)、IGBT(绝缘栅双极晶体管，InsulatedGate Bipolar Transistor)、JFET(面结型栅场效应晶体管，Junction Gate FieldEffect Transistor)、HEMT(高电子迁移率场效晶体管，High Electron MobilityTransistor)、超结器件、功率双极晶体管。在一个示例中，半导体芯片可具有竖直结构，即，电流可以大体上沿垂直于半导体芯片的主面的方向流动。在另一示例中，半导体芯片可具有侧向结构，即电流可大体上沿平行于半导体芯片的主面的方向流动。
半导体芯片可被封装。对此，在此所使用的术语“半导体装置”和“半导体封装体”可以互换地使用。例如，半导体封装体可以是引线式或穿孔式封装体、SMD(表面安装器件)、IPM(智能功率模块)等。特别地，半导体封装体可以是包括封装材料的半导体装置，所述封装材料可至少部分地覆盖(或埋入或包封)半导体装置的一个或一个以上部件。封装材料可以是电绝缘的并且可以形成封装体。封装材料可包括环氧树脂、玻璃纤维填充的环氧树脂、玻璃纤维填充的聚合物、酰亚胺(imide)、填充的或未填充的热塑性聚合物材料、填充的或未填充的硬塑料(duroplastic)聚合物材料、填充的或未填充的聚合物共混物、热固性材料、模制化合物、圆顶封装体(glob-top)材料、层合材料中的至少一种。各种技术、例如压缩成型、注射成型、粉末成型、液态成型、转送成型、层压中的至少一种可用来以封装材料封装所述装置的部件。
在此所描述的装置可包括载体，一个或一个以上电子部件、例如半导体芯片可布置在该载体上。载体可由金属、合金、介电材料、塑料、陶瓷或它们的组合制造。载体可具有均质的结构，但是也可提供内部结构、如具有电再分配功能的导电路径。载体例如是引线框架、包括一个或一个以上再分配层的陶瓷基体、PCB(印刷电路板)、DCB(直接敷铜的，direct copperbonded)基体、IMS(绝缘金属基体)、混合陶瓷基体。引线框架可构造成使得能够形成芯片垫(diepad)(或芯片岛部)和引线。在制造所述装置的过程中，可以将芯片垫和引线彼此连接。芯片垫和引线也可以由一个件制成。为了在制造进程中将芯片垫和引线中的一些分离，芯片垫和引线可通过连接结构彼此连接。在此，分离芯片垫与引线例如可通过机械锯切、激光束、切割、冲压、磨削、蚀刻中的至少一种实现。特别地，引线框架可以是导电的。例如，引线框架可以完全由金属和/或金属合金、尤其是例如铜、铜合金、镍、铁镍、铝、铝合金、钢、不锈钢中的至少一种制成。在以封装材料将半导体封装体的半导体芯片封装之后，引线框架的引线可伸出到所形成的壳体之外，并且可提供半导体芯片与壳体外部之间的电连接。在此，引线可在壳体的仅一侧上或壳体的多侧、例如相反侧上伸出到封装材料之外。
图1包括示意性地示出了根据本公开的装置100的视图的图1A和图1B。特别地，图1A示出了装置100的俯视图，图1B示出了装置100的侧剖视图。由于所选择的视角，图1A可示出未被图1B示出的部件，反之亦然。在图1的示例中，装置100以通常的方式示出并且可包括为简单起见而未示出的其它部件。例如，装置100还可包括根据本公开的其它装置的一个或一个以上部件。
装置100包括可封装电子部件(未示出)、例如半导体芯片的封装材料10。特别地，封装材料10可形成壳体，以容纳电子部件。装置100还包括伸出到封装材料10的表面14之外的第一引线12A和第二引线12B。因此，所述壳体的表面14可包括构造成能够分别相应地容纳第一引线12A和第二引线12B的第一开口16A和第二开口16B。封装材料10的表面14可限定一平面。装置100还包括延伸至封装材料10的表面14中的凹部18。在图1的示例中，凹部18尤其可布置在第一引线12A与第二引线12B之间、即壳体的第一开口16A与第二开口16B之间。在另一示例中，凹部18可布置至第一引线12A的左边或布置至第二引线12B的右边。特别地，凹部18可以延伸到由表面14所限定的平面的水平之下。装置100还包括布置在封装材料10的表面14上的隆起部20，其中，第一引线12A伸出到隆起部20之外。特别地，隆起部20可以延伸到由表面14所限定的平面的水平之上。隆起部20尤其可形成包围第一引线12A的凸缘。
在装置100的运行期间，可在装置100的导电部件之间发生漏电起痕。在该方面，爬电距离可定义为两个导电材料之间的沿布置在它们之间的绝缘体的表面测量的最短路径。维持一定的爬电距离可解决使用寿命期间漏电起痕故障的风险。装置100的设计可产生能够降低漏电起痕故障的风险的爬电距离。在第一示例中，凹部18可使第一引线12A与第二引线12B之间的沿封装材料10的表面14的爬电距离增大，由此降低第一引线12A与第二引线12B之间的漏电起痕故障的风险。在第二示例中，隆起部20可使第一引线12A与可布置在封装材料10的主表面22上的散热器(未示出)之间的爬电距离增大。对此，根据本公开的装置可不必对所使用的散热器进行特别设计以考虑足够的爬电距离的问题。相反，使用在此论述的凹部和/或隆起部可以允许使用标准散热器、例如如图3A至3C所示的散热器。
图2包括示意性地示出根据本公开的装置200的视图的图2A至图2C。特别地，图2A示出了装置200的俯视图，图2B示出了装置200的侧剖视图，图2C示出了装置200的仰视图。由于所选择的视角，一个附图可能示出了未被相应的其它附图示出的部件，反之亦然。装置200可被视为装置100的更详细的实施方式，从而下面描述的装置200的细节可同样适用于装置100。
装置200可包括半导体芯片30，所述半导体芯片30可安装在载体、例如包括芯片垫32的引线框架之上。半导体芯片30可包括栅电极34、源电极36和漏电极38。图2示出了包括功率晶体管芯片的装置的一个示例。然而，应注意，所示示例不是限制性的，其它示例可基于任意的其它电子部件。装置200还可包括多个引线12A至12C，所述引线12A至12C也可以是引线框架的一部分。在图2B中，由于所选择的视角，不是所有引线12A至12C都可见。在此，多个引线12A至12C由单个附图标记12表示。装置200还可包括封装材料10和散热器40。散热器40可被视为或不视为装置200的一部分。此外，电绝缘且导热的层或垫42可布置在封装材料10与散热器40之间。
栅电极34、源电极36和漏电极38可布置在半导体芯片30的背向芯片垫32的主表面上。漏电极38可电连接至第一引线12A和芯片垫32，源电极36可电连接至第二引线12B，栅电极34可电连接至第三引线12C。如图2所示，所述引线和电极可通过装置200的导电元件来电耦接。所述导电元件可对应于导线和/或线夹。在图2的示例中，导电元件可对应于由实线所示的导线。由于漏电极38可电连接至布置在半导体芯片30的底侧上的芯片垫32，因此所示布置可被称为漏电极向下布置(drain downarrangement)。然而，应注意，所示布置是示例性的，其它布置形式也可被实施。在另一示例中，源电极可电连接至布置在半导体芯片的底侧上的芯片垫。这种布置可被称为源电极向下布置(source down arrangement)。可能的布置可包括具有侧向结构或竖直结构的半导体芯片。
引线12A至12C可伸出到封装材料10之外，使得可在半导体芯片30的电极与布置在封装材料10外的部件之间建立电连接。引线12A至12C可平行地布置，使得装置200例如可如图3A至3C中所示例性示出地布置在PCB之上。在图2C的仰视图中，引线12A至12C被示出为具有矩形形式的示例性横截面。然而，在另一示例中，引线12A至12C中的一个或一个以上的横截面也可具有其它任意形式，例如圆形形式、正方形形式、菱形形式。两个紧邻的引线之间的距离d1或间距可在从大约200微米至大约2毫米的范围内。
芯片垫32可至少部分地嵌入封装材料10中。在图2的示例中，芯片垫32可在其下表面44上从封装材料10暴露。特别地，芯片垫32的暴露的下表面44和封装材料10的下主表面46可以是齐平的，即，所述表面可布置在一个共同的平面中。由于所述表面的齐平的布置，芯片垫32的下表面44可接触散热器40、尤其在一个共同的平面中接触散热器40。在图2的示例中，一个或一个以上附加的电绝缘且导热的层42(例如热油脂、热板、相变材料)可布置在芯片垫32与散热器40之间。在另一示例中，芯片垫32可以与散热器40直接接触。在图2的示例中，当在俯视图中观察时，电绝缘且导热的层42的表面面积与封装材料10的覆盖区的表面面积可以是相等的。然而，在另一示例中，电绝缘且导热的层42的表面面积可大于封装材料10的覆盖区的表面面积。
封装材料10可包括环氧树脂、玻璃纤维填充的环氧树脂、玻璃纤维填充的聚合物、酰亚胺、填充的或未填充的热塑性聚合物材料、填充的或未填充的硬塑料聚合物材料、填充的或未填充的聚合物共混物、热固性材料、模制化合物、圆顶封装体材料、层合材料中的至少一种。填充颗粒例如可包括或可基于氮化硅、二氧化硅、氮化铝、氧化铝、氮化硼、硅树脂、双马来酰亚胺(BMI)、氰酸酯。封装材料10可包括可限定一个平面A(见图2A中的虚线)的表面14。特别地，平面A可垂直于图2A的图面。布置在第一引线12A与第二引线12B之间的第一凹部18A可延伸至封装材料10的表面14中，从而，增大了第一引线12A与第二引线12B之间的爬电距离。以相似的方式，布置在第二引线12B与第三引线12C之间的第二凹部18B可延伸至封装材料10的表面14中，从而，增大了第二引线12B与第三引线12C之间的爬电距离。例如，凹部18A和18B中的一个或两个的在平面A之下的深度d2可在从大约100微米至大约2毫米的范围内。一般地，凹部18A和18B的几何形状可以是任意的。在图2C的仰视图中，凹部18A和18B中的每一个都被示为具有可从封装材料10的第一主表面46延伸至该封装材料的第二主表面48的矩形的形状或覆盖区。然而，在另一示例中，凹部18A和18B的覆盖区可具有任意其它形式，例如圆形、菱形、正方形的形式。
第一隆起部20A可布置在封装材料10的表面14之上，其中，第一引线12A可伸出到第一隆起部20A之外。特别地，封装材料10和第一隆起部20A可以由相同材料整体地形成。对此，封装材料10和第一隆起部20A可在相同的制造过程中形成。例如，由封装材料10所形成的壳体可以通过成型工艺来产生，其中，使用的成型工具的形式也可包括第一隆起部20A的形状(以及例如第一凹部18A的形状)。第一隆起部20A可形成能够包围第一引线12A的凸缘。在一个示例中，该凸缘可以完全包围第一引线12A。第一隆起部20A可以增大第一引线12A与散热器40之间的爬电距离。此外，装置200可以包括可与第一隆起部20A类似的第二隆起部20B和第三隆起部20C中的一个或一个以上。例如，隆起部20A至20C中的一个或一个以上的在平面A之上的高度d3可在从大约100微米至大约2毫米的范围内。一般地，隆起部20A至20C的几何形状可以是任意的。在图2C的仰视图中，隆起部20A至20C中的每一个都被示为具有矩形的形状或覆盖区。然而，在另一示例中，隆起部20A至20C的覆盖区可具有任意其它形式，例如圆形、菱形、正方形的形式。在图2B的侧视图中，由于所选择的视角，不是所有隆起部20A至20C都可见。在此，隆起部20被示为具有示例性梯形形式。然而，在该视角的另一示例中，隆起部20可具有任意其它形式，例如矩形、三角形、正方形的形式。
图3A至3C示意性地示出了根据本公开的装置300A至300C的侧剖视图。特别地，图3A至3C示出了将根据本公开的半导体封装体安装在PCB上的各种可能性。装置300A至300C可包括半导体封装体，所述半导体封装体包括一个或一个以上电子部件、例如半导体芯片。所述电子部件可被封装材料所覆盖，因此是不可见的。
图3A的装置300A可包括可至少部分地与图1和图2的装置100和装置200中的一个对应的半导体封装体50。半导体封装体50可包括封装材料10和伸出到封装材料10之外的引线12。散热器40可附接至半导体封装体50，其中，电绝缘层42可布置在封装材料10与散热器40之间。散热器40可被视为或不视为装置300A的一部分。半导体封装体50可安装在PCB 52上，其中，半导体封装体50的电子部件与PCB 52之间的电连接可通过引线12来提供。在图3A的示例中，引线12可沿向上的方向弯曲。弯曲角度α可以是大约90度并且更一般性地可在从大约85度至大约95度的范围内。半导体封装体50的如图3A所示的安装方式可对应于大功率设备和大散热器的传统安装方式。
装置300B和300C可如装置300A那样包括类似的部件，但可以以不同方式安装在PCB 52上。在图3B的示例中，半导体封装体50可安装在散热器40的可以以大约45度的角度倾斜的表面上。引线12可由此以弯曲角度β弯曲，所述弯曲角度β可以是大约45度并且更一般性地可在从大约40度至大约50度的范围内。在图3C的示例中，引线12可沿向下的方向弯曲，其中，弯曲角度γ可以是大约90度并且更一般性地可在从大约85度至大约95度的范围内。
在图3A至3C中，封装材料10可包括如之前所讨论的使引线12与散热器40之间的爬电距离增大的隆起部20和凹部(未示出)。因此装置300A至300C可不必对散热器40进行特别的设计以考虑足够的爬电距离的问题。相反，根据本公开的封装材料10的设计可允许使用如图3A至3C所示的标准散热器。
尽管本公开的特殊的特征或方面可能仅参看了多个实施方式中的一个被公开，但这样的特征或方面可按照可能对于任何给定的或特别的应用来说期望的和有利的方式与其它实施方式的一个或一个以上其它特征或方面相结合。此外，对于术语“包含”、“具有”、“含有”或它们的其它变体在具体实施方式部分或权利要求中的使用范围，这种术语以类似于术语“包括”的方式用作包括性的。此外，术语“示例性”仅指示例，而不是最佳的或最优的。还应当理解，为了简单和易于理解的目的，在此所示的特征和/或元件被示为相对于彼此具有特定的尺寸，但实际尺寸可实质上与在此所示的不同。
尽管在此已经示出和描述了多个具体方面，但是本领域普通技术人员可以所理解的是，多种可选实施方式和/或等同实施方式可以代替所示出和描述的具体方面而不脱离本发明的概念。本申请旨在覆盖在此论述的具体方面的任何改型或变型。因此，要求本公开仅由权利要求及其等同表述所限制。

Claims (21)

1.一种装置，包括：
封装材料；
伸出到所述封装材料的表面之外的第一引线和第二引线；
延伸至封装材料的所述表面中的凹部；以及
布置在封装材料的所述表面上的第一隆起部，其中，第一引线伸出到第一隆起部之外。
2.如权利要求1所述的装置，其特征在于，所述凹部布置在第一引线与第二引线之间。
3.如权利要求1或2所述的装置，其特征在于，所述装置还包括：
布置在封装材料的所述表面上的第二隆起部，其中，所述第二引线伸出到所述第二隆起部之外。
4.如权利要求3所述的装置，其特征在于，第一隆起部和第二隆起部具有相似的形状和尺寸。
5.如前述权利要求中任一项所述的装置，其特征在于，封装材料的所述表面限定一平面，并且所述凹部的在所述平面之下的深度位于从100微米至2毫米的范围内。
6.如前述权利要求中任一项所述的装置，其特征在于，封装材料的所述表面限定一平面，并且第一隆起部的在所述平面之上的高度位于从100微米至2毫米的范围内。
7.如前述权利要求中任一项所述的装置，其特征在于，第一隆起部形成包围第一引线的凸缘。
8.如前述权利要求中任一项所述的装置，其特征在于，所述凹部和第一隆起部中的至少一个是矩形的。
9.如前述权利要求中任一项所述的装置，其特征在于，所述凹部从所述封装材料的第一主表面延伸至所述封装材料的第二主表面。
10.如前述权利要求中任一项所述的装置，其特征在于，所述封装材料和第一隆起部由相同材料整体地形成。
11.如前述权利要求中任一项所述的装置，其特征在于，所述封装材料包括环氧树脂、玻璃纤维填充的环氧树脂、玻璃纤维填充的聚合物、酰亚胺、填充的或未填充的热塑性聚合物材料、填充的或未填充的硬塑料聚合物材料、填充的或未填充的聚合物共混物、热固性材料、模制化合物、圆顶封装体材料、层合材料中的至少一种。
12.如前述权利要求中任一项所述的装置，其特征在于，第一引线与第二引线之间的间距在从200微米至2毫米的范围内。
13.如前述权利要求中任一项所述的装置，其特征在于，所述装置还包括：
载体，其中，所述半导体芯片布置在所述载体的第一表面之上，并且所述载体的与第一表面相反的第二表面从所述封装材料暴露。
14.如权利要求13所述的装置，其特征在于，所述装置还包括：
布置在载体的第二表面之上的散热器。
15.如权利要求14所述的装置，其特征在于，所述装置还包括：
布置在所述封装材料与所述散热器之间的电绝缘且导热的层。
16.如前述权利要求中任一项所述的装置，其特征在于，所述装置还包括：
至少部分地被所述封装材料所覆盖的半导体芯片，其中，第一引线和第二引线中的至少一个电耦接至所述半导体芯片。
17.一种装置，包括：
封装材料；
伸出到所述封装材料的表面之外的第一引线和第二引线；
延伸至封装材料的所述表面中的凹部；以及
布置在封装材料的所述表面上的第一凸缘，其中，第一凸缘包围第一引线。
18.如权利要求17所述的装置，其特征在于，所述凹部布置在在第一引线与第二引线之间。
19.如权利要求17或18所述的装置，其特征在于，所述装置还包括：
布置在封装材料的所述表面上的第二凸缘，其中，所述第二凸缘包围第二引线。
20.一种装置，包括：
构造成能够容纳半导体芯片的壳体，其中，所述壳体包括具有第一开口和第二开口的表面，所述第一开口构造成能够容纳第一引线，所述第二开口构造成能够容纳第二引线；
延伸至壳体的所述表面中的凹部；以及
布置在壳体的所述表面上的隆起部，其中，所述隆起部包括所述第一开口。
21.如权利要求20所述的装置，其特征在于，所述凹部布置在第一开口与第二开口之间。
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