CN106206501A - 半导体装置及半导体装置的制造方法 - Google Patents

半导体装置及半导体装置的制造方法 Download PDF

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CN106206501A
CN106206501A CN201510848901.0A CN201510848901A CN106206501A CN 106206501 A CN106206501 A CN 106206501A CN 201510848901 A CN201510848901 A CN 201510848901A CN 106206501 A CN106206501 A CN 106206501A
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hole
semiconductor device
metal
electrode
metal parts
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CN106206501B (zh
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右田达夫
小木曾浩二
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Kioxia Corp
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Toshiba Corp
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Abstract

本发明的实施方式提供一种能够减少形成着空腔的金属部件的裂痕扩展的半导体装置及半导体装置的制造方法。根据实施方式，半导体装置具备半导体基板、金属部件、及金属氧化膜。半导体基板形成着从一面贯通到对向的另一面的贯通孔。金属部件设置在贯通孔的内侧，且在内部形成着空腔。金属氧化膜形成在金属部件的空腔侧的面上。

Description

半导体装置及半导体装置的制造方法
[相关申请]
本申请享有以日本专利申请2015-110745号(申请日：2015年5月29日)作为基础申请的优先权。本申请通过参照该基础申请而包含基础申请的全部内容。
技术领域
本发明的实施方式涉及一种半导体装置、及半导体装置的制造方法。
背景技术
已知一种具备金属部件的半导体装置，该金属部件作为形成在基板上的贯通孔所设置的贯通电极发挥功能。进而，公开了一种在金属部件形成着空腔的半导体装置。
然而，因形成空腔而导致存在金属部件上所形成的裂痕容易扩展之类的问题。
发明内容
本发明的实施方式提供一种能够减少形成着空腔的金属部件的裂痕扩展的半导体装置及半导体装置的制造方法。
根据实施方式，半导体装置具备半导体基板、金属部件、及金属氧化膜。半导体基板形成着从一面贯通到对向的另一面的贯通孔。金属部件设置在贯通孔的内侧，且在内部形成着空腔。金属氧化膜形成在金属部件的所述空腔侧的面上。
附图说明
图1是实施方式的半导体装置的纵剖视图。
图2是说明半导体装置的制造方法的步骤图。
图3是说明半导体装置的制造方法的步骤图。
图4是说明半导体装置的制造方法的步骤图。
图5是说明半导体装置的制造方法的步骤图。
图6是说明半导体装置的制造方法的步骤图。
图7是说明半导体装置的制造方法的步骤图。
图8是说明半导体装置的制造方法的步骤图。
图9是说明半导体装置的制造方法的步骤图。
图10是说明半导体装置的制造方法的步骤图。
图11是说明半导体装置的制造方法的步骤图。
具体实施方式
以下的例示性的实施方式或变化例中包含相同的构成要素。因此，以下，对相同的构成要素标注共用的符号，并且部分省略重复的说明。实施方式或变化例中所包含的部分能与其他实施方式或变化例的对应部分进行替换而构成。而且，只要未特别提及，则实施方式或变化例中所包含的部分的构成或位置等与其他实施方式或变化例相同。
＜实施方式＞
图1是实施方式的半导体装置10的纵剖视图。半导体装置10具有TSV(Through-Silicon Via，硅穿孔)。
如图1所示，半导体装置10具备基板12、器件部14、配线层16、层间绝缘层18、第1钝化层20、第2钝化层22、电极垫24、第1绝缘层26、第2绝缘层28、第3绝缘层30、及贯通电极32。
基板12以半导体为主成分。例如，基板12以硅为主成分。基板12的厚度的一例为25μm～35μm。在基板12形成着贯通孔40。贯通孔40是从基板12的一面42跨及对向的另一面44而形成。即，贯通孔40贯通基板12。贯通孔40在俯视时为例如圆形状。因此，贯通孔40为圆柱形状。俯视时的贯通孔40的直径的一例为10μm。
器件部14具有晶体管等半导体元件。器件部14设置在基板12的另一面。在器件部14具有未图示的栅电极层。
配线层16设置在与基板12为相反侧的器件部14的部分。配线层16与器件部14的半导体元件电连接。配线层16包含导电性材料。例如，配线层16以钨、硅化镍、硅化钴、铜、铝、掺杂了硼的多晶硅等为主成分。此外，虽在图1中只图示了1层配线层16，但也可以具有包含多层配线层的多层配线构造。
层间绝缘层18被覆基板12的另一面44、器件部14及配线层16的至少一部分，从而器件部14及配线层16除电连接的区域等以外的区域绝缘。层间绝缘层18以绝缘性材料为主成分。例如，层间绝缘层18是使用氧化硅膜而形成。
第1钝化层20被覆层间绝缘层18的至少一部分。第1钝化层20保护配线层16使其不受透过第2钝化层22的外部气体中所包含的水分等影响。第1钝化层20是使用氮化硅膜而形成。
第2钝化层22被覆第1钝化层20的至少一部分。第2钝化层22保护器件部14等。第2钝化层22由绝缘性树脂等形成。例如，第2钝化层22以聚酰亚胺树脂为主成分。
电极垫24与配线层16电连接。电极垫24的一部分从第2钝化层22露出。电极垫24与另一半导体装置10的贯通电极32等电连接。电极垫24具有障壁金属层50、籽晶层52、电极主体54、及电极连接部56。
障壁金属层50被覆配线层16的一部分。障壁金属层50与配线层16电连接。障壁金属层50抑制构成电极主体54的金属材料扩散到层间绝缘层18等。障壁金属层50以钛(Ti)等金属材料为主成分。
籽晶层52被覆障壁金属层50的内周面。籽晶层52以镀敷构成电极主体54的金属材料时成为籽晶的材料为主成分。籽晶层52例如以铜(Cu)为主成分。
电极主体54以填埋籽晶层52的内侧的方式形成。电极主体54以导电性材料为主成分。电极主体54例如以镍(Ni)为主成分。此外，电极主体54也可以由含有铜(Cu)、金(Au)、银(Ag)、钴(Co)、钯(Pd)、钨(W)、钽(Ta)、Pt(铂)、Rh(铑)、Ir(铱)、Ru(钌)、Os(锇)、Re(铼)、Mo(钼)、Nb(铌)、B(硼)、Hf(铪)中的至少1种金属的材料形成。
电极连接部56覆盖电极主体54的与覆盖障壁金属层50的面为相反侧的面。电极连接部56以导电性材料为主成分。电极连接部56例如以金(Au)为主成分。
第1绝缘层26被覆基板12的一面42的至少一部分。第1绝缘层26以绝缘性材料为主成分。例如，第1绝缘层26以氧化硅膜为主成分。第1绝缘层26将基板12的一面电绝缘。
第2绝缘层28被覆第1绝缘层26的与和基板12相接的面为相反侧的面的至少一部分。第2绝缘层28以绝缘性材料为主成分。例如，第2绝缘层28由氮化硅膜形成。
第3绝缘层30被覆第2绝缘层28的与和第1绝缘层26相接的面为相反侧的面、及基板12的贯通孔40的侧面。第3绝缘层30以绝缘性材料为主成分。例如，第3绝缘层30由氧化硅膜形成。
贯通电极32具有作为金属层的一例的障壁金属层60、作为金属层的一例的籽晶层62、作为金属部件的一例的通孔电极64、金属氧化膜66、及电极连接部68。
障壁金属层60被覆形成在一面42的贯通孔40的开口周围所形成的第3绝缘层30、及形成在贯通孔40的内部的第3绝缘层30的内表面。而且，障壁金属层60以堵塞另一面44的贯通孔40的开口的方式形成。障壁金属层60与器件部14所包含的栅电极层电连接。障壁金属层60抑制构成籽晶层62的金属材料扩散到第3绝缘层30等。障壁金属层60以钛(Ti)等金属材料为主成分。
籽晶层62被覆障壁金属层60的内周面。换句话说，籽晶层62形成在一面42上所形成的贯通孔40的开口周围、及贯通孔40的内表面。籽晶层62以镀敷构成通孔电极64的金属材料时成为籽晶的材料为主成分。籽晶层62例如以铜(Cu)为主成分。
通孔电极64形成在籽晶层62上。通孔电极64设置在贯通孔40的内侧。即，通孔电极64是以填埋贯通孔40的方式形成。通孔电极64的一部分从形成在一面42的贯通孔40的开口突出。通孔电极64以导电性材料为主成分。通孔电极64例如以镍(Ni)为主成分。通孔电极64也可以由含有铜(Cu)、银(Ag)、钴(Co)、钨(W)、钽(Ta)、Rh(铑)、Ir(铱)、Ru(钌)、Os(锇)、Re(铼)、Mo(钼)、Nb(铌)、B(硼)、Hf(铪)中的至少1种金属的材料形成。在通孔电极64的内侧形成着空腔67。空腔67缓和通孔电极64内产生的应力。
金属氧化膜66形成在通孔电极64与空腔67之间。换句话说，金属氧化膜66被覆通孔电极64与空腔67相接的面的至少一部分。金属氧化膜66以含有构成通孔电极64的金属材料的金属氧化物为主成分。例如，金属氧化膜66以含有构成通孔电极64的镍的镍氧化物为主成分。
电极连接部68形成在从一面42上所形成的贯通孔40的开口突出的通孔电极64的部分。电极连接部68以导电性材料为主成分。电极连接部68优选为由能够容易地与电极垫24的电极连接部56连接的导电性材料构成。例如，电极连接部68以锡(Sn)或铜(Cu)为主成分。
图2至图11是说明半导体装置10的制造方法的步骤图。参照图2至图11，对半导体装置10的制造方法进行说明。本实施方式的制造方法是在制成器件部14之后制成贯通电极32的后通孔(via last)方式。
如图2所示，半导体装置10的制造方法是在基板12的另一面44形成器件部14、配线层16、层间绝缘层18、第1钝化层20、第2钝化层22、及电极垫24。接着，利用机械研磨法等对基板12的一面42进行研磨，而使基板12成为例如30μm左右的厚度。在进行研磨后，利用CVD(Chemical Vapor Deposition，化学气相沉积)法在基板12的一面42形成使用氧化硅膜的第1绝缘层26。接着，利用CVD法在第1绝缘层26上形成使用氮化硅膜的第2绝缘层28。
如图3所示，通过使用掩模的RIE(Reactive Ion Etching，反应性离子蚀刻)法对第1绝缘层26、第2绝缘层28、及基板12进行蚀刻。由此，在基板12形成从基板12的一面42贯通到另一面44的贯通孔40。
如图4所示，在第2绝缘层28、贯通孔40的侧面、及从贯通孔40的另一面侧的开口露出的器件部14的区域，利用CVD法形成使用氧化硅膜的第3绝缘层30。
如图5所示，利用干式蚀刻等蚀刻去除形成在器件部14的第3绝缘层30。由此，器件部14露出于贯通孔40。
如图6所示，在第3绝缘层30、及从贯通孔40的另一面侧的开口露出的器件部14的区域，利用真空蒸镀法或溅镀法形成使用钛的障壁金属层60。接着，利用真空蒸镀法或溅镀法在障壁金属层60上形成使用铜的籽晶层62。
如图7所示，利用光刻法在贯通孔40的内侧以外的区域、及贯通孔40的一面42侧的开口周围以外的区域的籽晶层62上形成抗蚀膜70。
如图8所示，利用保形镀敷在从抗蚀膜70露出的籽晶层62上形成使用镍的通孔电极64。随着通孔电极64形成，贯通孔40内侧的未形成通孔电极64的区域的另一面44侧的宽度与一面42侧的宽度相比变小。换句话说，形成在贯通孔40内侧的通孔电极64的一面42侧的开口比另一面44侧的未形成通孔电极64的区域的宽度更快地变小。
如图9所示，通过继续进行保形镀敷，而在通孔电极64的内侧形成空腔67，在该状态下，将通孔电极64的一面42侧的开口堵塞。由此，在贯通孔40的内侧形成通孔电极64，该通孔电极64在内部形成着空腔67。此外，通孔电极64的形成并不限定于保形镀敷，但就处理时间的缩短及能够选择的镀敷种类的多少来说，优选为保形镀敷。
如图10所示，通过至少对通孔电极64进行加热，而在通孔电极64与空腔67之间形成含有镍氧化物的金属氧化膜66。例如，以200°到250°的温度，加热几分钟到几小时左右。由此，构成通孔电极64的镍等金属被封入在空腔67内的镀敷液中的水分等氧化。由此，在通孔电极64与空腔67之间形成金属氧化膜66。
如图11所示，在从抗蚀膜70露出的通孔电极64上形成使用锡的电极连接部68。其后，去除抗蚀膜70，并且利用表面张力使电极连接部68呈曲面状变形。
如上所述，在半导体装置10中，在通孔电极64与形成在通孔电极64的内部的空腔67之间形成着金属氧化膜66。由此，金属氧化膜66加强通孔电极64，所以即便在经过长时间地对通孔电极64施加热或机械应力的情况下通孔电极64产生裂痕，半导体装置10也能抑制通孔电极64的裂痕扩展。
在半导体装置10中，由含有构成通孔电极64的金属的金属氧化物构成金属氧化膜66，所以能够通过对通孔电极64进行加热而容易地形成金属氧化膜66。
所述实施方式也可以适当进行变更。
例如，在所述实施方式中，应用后通孔方式作为半导体装置10的制造方法，但也可以利用先通孔方式等其他制造方法制造半导体装置。
已对本发明的若干个实施方式进行了说明，但这些实施方式是作为示例而提出的，并非意图限定发明的范围。这些新颖的实施方式能以其他各种方式实施，且能够在不脱离发明主旨的范围内进行各种省略、替换、变更。这些实施方式或其变化包含在发明的范围或主旨中，并且包含在权利要求书所记载的发明及其均等的范围内。
[符号的说明]
10 半导体装置
12 基板
14 器件部
16 配线层
18 层间绝缘层
20 第1钝化层
22 第2钝化层
24 电极垫
26 第1绝缘层
28 第2绝缘层
30 第3绝缘层
32 贯通电极
40 贯通孔
60 障壁金属层(金属层)
62 籽晶层(金属层)
64 通孔电极(金属部件)
66 金属氧化膜
67 空腔
68 电极连接部

Claims (5)

1.一种半导体装置，其特征在于具备：
半导体基板，具有从一面贯通到对向的另一面的贯通孔；
金属部件，设置在所述贯通孔的内侧，且在内部具有空腔；及
金属氧化膜，设置在所述金属部件的所述空腔侧的面上。
2.根据权利要求1所述的半导体装置，其特征在于：
所述金属氧化膜包含所述金属部件所包含的金属材料的氧化物。
3.根据权利要求1或2所述的半导体装置，其特征在于：
还具备金属层，该金属层设置在所述基板的所述一面上所形成的所述贯通孔的开口周围，且
所述金属部件设置在所述金属层上，从所述贯通孔的所述开口突出。
4.根据权利要求3所述的半导体装置，其特征在于：
在从所述贯通孔的所述开口突出的所述金属部件的部分形成着含有锡或铜的连接部。
5.一种半导体装置的制造方法，其特征在于包括如下步骤：
将从半导体基板的一面贯通到对向的另一面的贯通孔形成在所述半导体基板；
将在内部形成着空腔的金属部件形成在所述贯通孔的内侧；及
在所述金属部件的所述空腔侧的面上形成金属氧化膜。
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