CN106024026B - 包含具有供应电压噪声衰减的主轴电机电流感测的数据存储装置 - Google Patents
包含具有供应电压噪声衰减的主轴电机电流感测的数据存储装置 Download PDFInfo
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Abstract
本申请公开了一种数据存储装置，该数据存储装置包括在磁盘上方致动的磁头和被配置为旋转磁盘的主轴电机，其中主轴电机包括多个线圈。利用响应于供应电压生成的电力电压给主轴电机供电。当感应到电流从电力电压流过至少一个线圈时，箝位电路被启用，其中箝位电路被配置以将电力电压箝位到小于供应电压的峰值电压，以便减弱电力电压中的噪声。当没有感应到电流时，禁用箝位电路。
Description
背景技术
诸如磁盘驱动器等的数据存储装置包括磁盘和连接到致动器臂的远端的磁头，致动器臂通过音圈电机(VCM)绕枢轴旋转从而将磁头径向定位在磁盘上方。磁盘包括多个径向间隔的用于记录用户数据扇区和伺服扇区的同心磁道。伺服扇区包括磁头定位信息(例如，磁道地址)，其被磁头读取并且被伺服控制系统处理，从而在致动器臂逐磁道寻道时控制致动器臂。
图1示出了现有技术的磁盘格式2，其包括被伺服扇区60-6N限定的若干伺服磁道4，伺服扇区绕着每个伺服磁道的圆周而被记录。每个伺服扇区6i包括：前导码8，该前导码8用于存储周期性图案，其允许读信号适当的增益调整和时序同步；以及同步记号10，该同步记号10用于将被用于符号同步化的特殊图案存储到伺服数据字段12。伺服数据区12存储粗略的磁头定位信息，例如伺服磁道地址，其用于在寻道操作期间将磁头定位在目标数据磁道的上方。每个伺服扇区6i进一步包括若干组伺服脉冲14(例如，N和Q伺服脉冲)，其用相对于彼此以及相对于伺服轨道中心线的预定相位进行记录。基于相位的伺服脉冲14提供精细的磁头定位信息，其用于中心线追踪并且在读/写操作期间访问数据磁道。位置误差信号(PES)通过读取伺服脉冲14生成，其中PES代表相对于目标伺服磁道的中心线测量的磁头的位置。伺服控制器处理PES以生成应用到磁头致动器(例如，音圈电机)的控制信号，以便在磁头上方以减少PES的方向径向致动磁头。
附图说明
图1示出了包括多个被伺服扇区限定的伺服磁道的现有技术的磁盘格式。
图2A示出了根据一个实施例的磁盘驱动器形式的数据存储装置，其包括通过主轴电机在磁盘上方致动的磁头，其中主轴电机包括多个线圈并且被响应于供应电压所生成的电力电压供电。
图2B是根据一个实施例的流程图，其中当感应到电流从电力电压流过至少一个线圈时，电力电压被箝位到小于供应电压的峰值电压。
图2C说明当感应到电流时的电力电压的箝位，以便减弱在电力电压中的噪声。
图3示出了一个实施例，其中基于控制电路是否正感应到电流流过至少一个线圈，适当的箝位电路被启用/禁用。
图4示出了一个实施例，其中箝位电路包括箝位场效应晶体管(FET)，所述箝位场效应晶体管被配置为源极跟随器并且被命令电压控制以箝位电力电压。
图5示出了一个实施例，其中反馈回路基于源极电压和命令电压之间的差值生成箝位FET的栅极电压。
图6示出了一个实施例，其中当感应到电流流过至少一个线圈时，电流传感器感应到电流流过箝位FET。
图7A和图7B说明了一个实施例，其中当供应电压下降到低于阈值时，箝位FET被配置进入隔离模式，其中通过将P-阱体从源极断开并且将P-阱体连接到漏极实现配置FET进入隔离模式。
具体实施方式
图2A示出了根据一个实施例的磁盘驱动器形式的数据存储装置，其包括在磁盘18上被致动的磁头16以及被配置以旋转磁盘18的主轴电机20，其中主轴电机20包括多个线圈。主轴电机20用响应于供应电压22所生成的电力电压供电。磁盘驱动器进一步包括控制电路24，该控制电路24被配置以执行图2B的流程图，其中当感应到电流从电力电压流过至少一个线圈时(方框26)，电力电压被箝位到小于供应电压的峰值电压，以便减弱电力电压中的噪声(方框28)。当没有感应到电流时(方框30)，禁用电力电压的箝位(方框32)。
出于任何适当的原因，控制电路24可以被配置以感应电流从电力电压流过主轴电机20的至少一个线圈。在一个实施例中，流过线圈的电流可以被感应以检测转子相对于定子的位置，其可用于在起转主轴电机20之前确定换向序列的初始状态。在图2A的实施例中，流过线圈的电流34是被用来向主轴电机20供电的电力电压的函数。如果电力电压被生成如供应电压22，电流感应可能被供应电压22中的任何噪声不利地影响，例如在图2C的示例中所说明的噪声。因此，在一个实施例中，用于向主轴电机20供电的电力电压可以被箝位在供应电压的峰值电压以下的电平，例如，箝位在基本上等于峰值电压减去供应电压22中的噪声振幅的电平，如图2C中所说明的。以这种方式，电力电压中噪声被减弱，其提高了电流感应的准确性。
图3示出了被配置以控制主轴电机的操作的控制电路，其包括箝位电路36，箝位电路36被配置为当感应到电流流过主轴电机20的至少一个线圈时，将电力电压38箝位到小于供应电压22。在主轴电机20的正常操作过程中，由主轴电机20的线圈生成的反电动势(BEMF)电压40可以被处理，以便驱动换向控制器42的换向序列。主轴控制块44可以处理BEMF信号46，其可以是代表BEMF零点交叉的方波，如被BEMF检测器48所检测的。换向控制器42可以生成控制信号50，其配置BEMP检测器48以在磁盘旋转时检测由每个线圈生成的BEMF电压的零点交叉。换向控制器42也生成应用到换向逻辑54的控制信号52。在图3的实施例中，换向逻辑54被控制信号52配置以控制开关56的状态，以便用电力电压38驱动线圈。换向逻辑54可以以任何适当的方式操作，例如通过驱动开关56作为线性放大器，其将连续-时间的正弦曲线电压应用到线圈。在另外的实施例中，换向逻辑54可以使用脉宽调制(PWM)驱动开关56，例如使用方波PWM，梯形的PWM，或者正弦曲线的PWM。不管线圈怎样被驱动，换向控制器42生成控制信号52使得线圈在正确的时段被换向，从而生成所期望的旋转磁场，该磁场引起主轴电机旋转。在一个实施例中，主轴控制块44可以生成控制信号58，该控信号58控制驱动电压(连续的或PWM)的有效振幅，从而控制主轴电机20的速度。
例如，当感应到电流流过至少一个线圈时，为了在起转操作开始时检测转子相对于定子的位置，箝位电路36被控制信号60启用以箝位电力电压38小于供应电压22的峰值电压，如参照图2C上面所述，从而减弱在电力电压38中的噪声。从电力电压38流过至少一个线圈的电流可以以任何适当的方式被感应。在一个实施例中，在图3中所示的开关56可以包括用于感应流过线圈的电流的适当的电路，以及在下面所描述的其他实施例中，流过线圈的电流可以通过感应流过箝位电路36的电流被感应，或者通过感应流过隔离FET(ISOFET)的电流被感应。
图4示出了一个实施例，其中箝位电路36包括箝位FET 62，该箝位FET62被配置为源极跟随器，其中控制电路通过调整命令电压64而启用箝位电路36，命令电压64被配置以控制箝位FET 62的栅极。例如，在一个实施例中，控制电路配置命令电压64近似为：
Vd_峰值－噪声振幅+Vth
Vd_峰值代表供应电压22的峰值电压，噪声振幅代表供应电压22中的噪声振幅，以及Vth代表箝位FET 62的阈值电压。在这种方式中，箝位FET 62的源极电压(并且因此电力电压38)被箝位在：
Vd_峰值－噪声振幅
如图2C中的示例所示，因此在电流感应模式期间减弱了电力电压38中的噪声。
图4的实施例也包括隔离FET(ISOFET)66，其在正常操作期间被配置到开(ON)态。如果供应电压22下降到阈值以下(例如，在电力故障期间)，ISOFET 66被配置到关(OFF)态，以至于ISOFET 66的体二极管阻止电流从电力电压流到供应电压22。在图4所说明的一个实施例中，适当的电流感应电路68被耦合到ISOFET 66，以便在电流感应模式期间感应流过ISOFET 66的电流以及因此感应流过主轴电机20的至少一个线圈的电流。
图5示出了一个实施例，其中控制电路24启用箝位电路36，其中启用箝位电路36是通过设置命令电压70近似为：
Vd_峰值－噪声振幅
以及通过使用反馈回路基于箝位FET 62的源极电压与命令电压70之间的差值(由比较器74生成)，生成栅极电压72。栅极电压72被应用到箝位FET 62的栅极，其将源极电压(以及电力电压38)驱动到所期望的箝位电平。
在上面参考图4和图5所描述的实施例中，当没有感应到流过至少一个线圈的电流时，控制电路24可以通过将命令电压(64或70)增大到适当的电平而禁用箝位电路36。例如，在一个实施例中，控制电路24可以将命令电压增大到高于供应电压22的电平(使用适当的升压电路)，以至于当箝位电路36在禁用状态时，没有相对于供应电压22的电力电压38的箝位。在另外的实施例中，控制电路24可以将命令电压配置到供应电压22的峰值电压附近，或者低于峰值电压的适当的边缘，以至于甚至当箝位电路36在禁用状态时，箝位电路36仍然可以提供电力电压38的一定数量的箝位。
图6示出了一个实施例，其中当供应电压22下降到阈值以下时(例如，在电力故障时期)，图4中的ISOFET 66被移除并且箝位FET 62被配置到隔离模式。在图6中所说明的一个实施例中，适当的电流感应电路76被耦合到箝位FET 62，以便在电流感应模式期间，感应流过箝位FET 62的电流以及因此感应流过主轴电机20的至少一个线圈的电流。
图7A和图7B说明了一个实施例，其中在电流感应模式中时，箝位FET 62通过开关78被配置以箝位电力电压38。当供应电压22下降到阈值以下(例如，在电力故障期间)时，箝位FET 62被配置到隔离模式，其中通过配置开关78以从箝位FET 62的源极断开箝位FET 62的P-阱体，以及将箝位FET 62的P-阱体连接到箝位FET 62的漏极从而将FET 62配置到隔离模式。这将箝位FET 62有效地配置到二极管，该二极管阻挡来自电力电压38的电流流到供应电压22，与图4中的ISOFET 66的体二极管相似。在另外的实施例中(未示出)，通过将栅极终端和P-阱体接地，箝位FET 62可以被配置到隔离模式中。这个后面的实施例假定供应电压22保持在阈值电平以下，否则在隔离模式中时将会损坏箝位FET 62。
图3的箝位电路36可以被配置以将电力电压38箝位到相对于供应电压22的任何适当的电平。在一个实施例中，箝位电平可以被选择为低于噪声的振幅，如图2C中的示例所示，但是在其他实施例中，箝位电平可以被设置得稍微较高，以便减弱供应电压22中的一些但不是全部的噪声。在一个实施例中，通过估计在不同的操作环境中的若干磁盘驱动器以及估计影响供应电压22的最大的噪声振幅，供应电压22的噪声振幅可以被预先确定。在另外的实施例中，控制电路24可以在进入电流感应模式之前测量供应电压22中的噪声振幅，并且随后配置箝位电路36，以便相对于被测量的供应电压22中的噪声振幅减弱电力电压38中的噪声电平。
任何适当的控制电路可以被用于实施上面的实施例中的流程图，例如任何适当的集成电路或电路。例如，控制电路可以在读通道集成电路中被实施，或者在与读通道分开的元件中被实施，例如磁盘控制器，或者上面所描述的某些操作可以通过读通道和其他被磁盘控制器执行。在一个实施例中，读通道和磁盘控制器被作为分开的集成电路实施，而在替代实施例中，它们被装配到单一的集成电路或片上系统(SOC)中。除此之外，控制电路可以包括适当的前置放大电路，其被实施为单独的集成电路，被集成到读通道或磁盘控制器电路中，或者被集成到SOC中。
在一个实施例中，控制电路包括执行指令的微处理器，指令可操作以引起微处理器执行本文所描述的流程图。指令可以被存储在任何计算机-可读媒介中。在一个实施例中，它们可以被存储在微处理器之外或者与SOC中的微处理器集成的非易失性半导体存储器中。在另外的实施例中，当磁盘驱动器被通电时，指令被存储在磁盘上并且读入易失性半导体存储器中。而在另外的实施例中，控制电路包括适当的逻辑电路，例如状态机电路。
在各种实施例中，磁盘驱动器可以包括磁性磁盘驱动器，光盘驱动器等等。除此之外，尽管上面的示例涉及到磁盘驱动器，各种实施例不被限制在磁盘驱动器并且能够被应用到其他数据存储装置和系统中，例如磁带驱动器、固态驱动器、混合驱动器等等。此外，一些实施例可以包括电子装置，例如计算装置、数据服务器装置、媒体内容存储装置等等，其包括如上所述的存储媒体和/或控制电路。
上面所描述的各种特征和过程可以独立于彼此使用，或者可以用各种方式结合。所有可能的结合和子组合旨在落入本公开的范围内。此外，在一些实施例中，某些方法、事件或过程块可以被省略。本文所描述的方法和过程也不被限制到任何特定的序列，并且与其相关的块或状态能够在其他合适的序列中被执行。例如，描述的任务或者事件可以以具体公开的顺序之外的其他顺序执行，或者多个可以被结合在单一的块或状态中。示例任务或事件可以串行、并行或以某些其他方式被执行。任务或事件可以被添加到或从公开的示例实施例中移除。本文公开的示例系统和元件可以被配置为与公开的不同。例如，与所公开的示例实施例相比，元件可以被添加、移除或重新安排。
尽管已经描述某些示例实施例，这些实施例只以示例的形式被表示，并不旨在限制本文所公开的发明的范围。因此，前面的说明不旨在暗示任何特定特征、特性、步骤、模块或块是必要的或不可缺少的。事实上，本文所述的新颖的方法和系统可以以各种其他的形式实现；另外，可以实现本文所述的方法和系统的形式的各种省略、置换和改变，而不脱离本文所公开的实施例的精神。
Claims (19)
1.一种数据存储装置包括：
磁盘；
主轴电机，其被配置以旋转所述磁盘，其中所述主轴电机包括多个线圈；
磁头，其在所述磁盘上被致动；以及
控制电路，其被配置以：
用响应于供应电压所生成的电力电压给所述主轴电机供电；
当感应到电流从所述电力电压流过至少一个所述线圈时，启用箝位电路，其中所述箝位电路被配置以将所述电力电压箝位到小于所述供应电压的峰值电压，以便减弱所述电力电压中的噪声；以及
当没有感应到所述电流时，禁用所述箝位电路。
2.如权利要求1中所述的数据存储装置，其中所述箝位电路进一步被配置以箝位所述电力电压为：
Vd_峰值－噪声振幅
其中：
Vd_峰值代表所述供应电压的所述峰值电压；以及
噪声振幅代表所述供应电压中的噪声振幅。
3.如权利要求1中所述的数据存储装置，其中：
所述箝位电路包括场效应晶体管即FET，所述FET被配置为源极跟随器；以及
所述控制电路进一步被配置以通过调整命令电压而启用所述箝位电路，所述命令电压被配置以控制所述FET的栅极。
4.如权利要求3中所述的数据存储装置，其中所述控制电路进一步被配置以启用所述箝位电路，其中启用所述箝位电路是通过设置所述命令电压为：
Vd_峰值－噪声振幅+Vth
其中：
Vd_峰值代表所述供应电压的所述峰值电压；
噪声振幅代表所述供应电压中的噪声振幅；以及
Vth代表所述FET的阈值电压。
5.如权利要求3中所述的数据存储装置，其中所述控制电路进一步被配置以启用所述箝位电路，其中启用所述箝位电路是通过设置所述命令电压为：
Vd_峰值－噪声振幅
以及通过使用反馈回路基于所述FET的源极电压与所述命令电压之间的差值，生成栅极电压，其中：
所述栅极电压被应用到所述FET的栅极；
Vd_峰值代表所述供应电压的所述峰值电压；
噪声振幅代表在所述供应电压中的噪声振幅；以及
Vth代表所述FET的阈值电压。
6.如权利要求3中所述的数据存储装置，其中当所述供应电压下降到阈值以下时，所述控制电路进一步被配置以将所述FET配置到隔离模式中，以便阻止电流从所述电力电压流向所述供应电压。
7.如权利要求6中所述的数据存储装置，其中所述控制电路进一步被配置以：通过将所述FET的P-阱体从所述FET的源极断开，以及通过将所述FET的所述P-阱体连接到所述FET的漏极，将所述FET配置到所述隔离模式中。
8.一种操作数据存储装置的方法，所述方法包括：
用响应于供应电压所生成的电力电压给主轴电机供电，其中所述主轴电机包括多个线圈，并且所述主轴电机被配置以旋转磁盘并在所述磁盘上致动磁头；
当感应到电流从所述电力电压流过至少一个所述线圈时，将所述电力电压箝位到小于所述供应电压的峰值电压，以便减弱所述电力电压中的噪声；以及
当没有感应到所述电流时，禁用所述箝位。
9.如权利要求8中所述的方法，进一步包括箝位所述电力电压为：
Vd_峰值－噪声振幅
其中：
Vd_峰值代表所述供应电压的所述峰值电压；以及
噪声振幅代表所述供应电压中的噪声振幅。
10.如权利要求8中所述的方法，进一步包括通过调整命令电压而箝位所述电力电压，其中所述命令电压被配置以控制场效应晶体管即FET的栅极，其中所述FET被配置为源极跟随器。
11.如权利要求10中所述的方法，进一步包括箝位所述电力电压，其中箝位所述电力电压是通过设置所述命令电压为：
Vd_峰值－噪声振幅+Vth
其中：
Vd_峰值代表所述供应电压的所述峰值电压；
噪声振幅代表在所述供应电压中的噪声振幅；以及
Vth代表所述FET的阈值电压。
12.如权利要求10中所述的方法，进一步包括箝位所述电力电压，其中箝位所述电力电压是通过设置所述命令电压为：
Vd_峰值－噪声振幅
以及通过使用反馈回路基于所述FET的源极电压与所述命令电压之间的差值，生成栅极电压，其中：
所述栅极电压被应用到所述FET的所述栅极；
Vd_峰值代表所述供应电压的所述峰值电压；
噪声振幅代表在所述供应电压中的噪声振幅；以及
Vth代表所述FET的阈值电压。
13.如权利要求10中所述的方法，其中当所述供应电压下降到阈值以下时，进一步包括将所述FET配置到隔离模式中，以便阻止电流从所述电力电压流向所述供应电压。
14.如权利要求13中所述的方法，进一步包括：通过将所述FET的P-阱体从所述FET的源极断开，以及通过将所述FET的所述P-阱体连接到所述FET的漏极，将所述FET配置到所述隔离模式中。
15.一种控制电路，其被配置以：
用响应于供应电压所生成的电力电压给主轴电机供电，其中所述主轴电机包括多个线圈，并且所述主轴电机被配置以旋转磁盘并在所述磁盘上方致动磁头；
当感应到电流从所述电力电压流过至少一个所述线圈时，启用箝位电路，其中所述箝位电路被配置以将所述电力电压箝位到小于所述供应电压的峰值电压，以便减弱在所述电力电压中的噪声；以及
当没有感应到所述电流时，禁用所述箝位电路。
16.如权利要求15中所述的控制电路，其中所述箝位电路进一步被配置以箝位所述电力电压为：
Vd_峰值－噪声振幅
其中：
Vd_峰值代表所述供应电压的所述峰值电压；以及
噪声振幅代表所述供应电压中的噪声振幅。
17.如权利要求15中所述的控制电路，其中：
所述箝位电路包括场效应晶体管即FET，所述FET被配置为源极跟随器；以及
所述控制电路进一步被配置以通过调整命令电压而启用所述箝位电路，所述命令电压被配置以控制所述FET的栅极。
18.如权利要求17中所述的控制电路，其中当所述供应电压下降到阈值以下时，所述控制电路进一步被配置以将所述FET配置到隔离模式中，以便阻止电流从所述电力电压流向所述供应电压。
19.如权利要求18中所述的控制电路，进一步被配置以：通过将所述FET的P-阱体从所述FET的源极断开，以及通过将所述FET的所述P-阱体连接到所述FET的漏极，将所述FET配置到所述隔离模式中。
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