The content of the invention
The technical problems to be solved by the invention are to provide a kind of High Precision Low Temperature drift bandgap voltage reference, based on standard
CMOS technology realizes that whole circuit is without extra biasing circuit;Without operational amplifier to voltage clamping, it is possible to decrease circuit is multiple
Miscellaneous degree.
In order to solve the above technical problems, the present invention uses following technical scheme:
A kind of High Precision Low Temperature floats bandgap voltage reference, it is characterized in that, including:
Positive temperature coefficient current generating circuit, produces the electric current I with PTATPTAT;
Negative temperature parameter current produces circuit, produces the electric current I being inversely proportional with absolute temperatureCTAT;
2 temperature sensings and compensation circuit, compensation is added by align temperature coefficient current and negative temperature parameter current,
Band-gap reference is set to obtain the temperature flex point of more than three in operating temperature interval;
Start-up circuit, drives positive temperature coefficient current generating circuit and negative temperature parameter current to produce during power supply electrifying
Raw circuit breaks away from degeneracy bias point, sets up normal working point;
Electric current summing circuit, aligns temperature coefficient current and is sued for peace with the electric current of negative temperature parameter current, produces band-gap reference
Voltage Vref.
Positive temperature coefficient current generating circuit includes the current mirror being made up of metal-oxide-semiconductor M1, M2, M3 and M4, current mirror correspondence
Negative-feedback clamper is constituted by metal-oxide-semiconductor M5, M6, M7 and M8, makes the node 3 of current mirror equal with the voltage of node 4.
Positive temperature coefficient current generating circuit include metal-oxide-semiconductor M1, M2, M3, M4, M5, M6, M7, M8 and PNP pipe Q1, Q2 and
Resistance R1;
The source electrode of metal-oxide-semiconductor M1, M2, M5 and M6 meets power vd D;The drain electrode of the grid and M2 of M1, M2 connects altogether, the leakage of M1, M2
Pole connects the drain electrode of M3, M4, the grid of the grid connection M8 of M3 and drain electrode, the grid and drain electrode shape of the grid connection M7 of M4 respectively
Into node 11;The source electrode of M3 and the source electrode of M7, one end of resistance R1 connect to form current mirror node 3 altogether, the source electrode of M4 and the source of M8
Pole, the emitter stage of PNP pipe Q2 connect to form current mirror node 4 altogether;The emitter stage of the other end connection PNP pipe Q1 of resistance R1, PNP pipe
The grounded collector of Q1;The base stage of PNP pipe Q1 is connected ground, the grounded collector of PNP pipe Q2 altogether with the base stage of PNP pipe Q2;M7、M8
Drain electrode be connected with the drain electrode of M5, M6 respectively;The drain electrode of the grid and M1 of M5, M6 connects to form node 1 altogether.
Negative temperature parameter current generation circuit includes the current mirror being made up of metal-oxide-semiconductor M1A, M2A, M3A and M4A, current mirror
Correspondence constitutes negative-feedback clamper by metal-oxide-semiconductor M5A, M6A, M7A and M8A, makes the node 5 of current mirror equal with the voltage of node 4.
Negative temperature parameter current generation circuit includes M1A, M2A, M3A, M4A, M5A, M6A, M7A, M8A and resistance R2;
The source electrode of metal-oxide-semiconductor M1A, M2A, M5A and M6A meets power vd D;The drain electrode of the grid and M2A of M1A, M2A connects altogether,
The drain electrode of M1A, M2A connects the drain electrode of M3A, M4A respectively, and the grid of M3A, M4A connects grid and the drain electrode of M8AA, M7A respectively,
The source electrode of M3A connects to form current mirror node 5 altogether with the source electrode of M7A, one end of resistance R2, and the source electrode of M4A connects altogether with the source electrode of M8A
Form current mirror node 4;The other end ground connection of resistance R2;The drain electrode of M7A, M8AA is connected with the drain electrode of M5A, M6A respectively;M5A、
The grid of M6A connects to form node 2 altogether with the drain electrode of M1A.
2 temperature sensings and compensation circuit include metal-oxide-semiconductor M11, M12, M13, M14, M15, M16, M17, M18, M19 and
M20;
M11, M13, M14, M15, M17, M18 and M19 source electrode meet power vd D;The grid of M11 is connected to node 1, M11's
Drain electrode is connected to the drain electrode of M12 and grid forms node 6;The grid of M13 is connected to node 2, the drain electrode of M13 and the drain electrode of M14
Drain electrode with grid, the grid of M15, M16 connects to form node 7 altogether;The grid of M17 is connected to node 2, and the drain electrode of M17 is with M18's
Drain and gate, the grid of M19, the drain electrode of M20 connect to form node 8 altogether;The drain electrode of M15 connects to form node altogether with the drain electrode of M19
10;The source electrode of M12, M16, M20 is connected to ground altogether.
Start-up circuit includes metal-oxide-semiconductor M21, M22, M23 and M24;
The source electrode of M21 connects the grounded-grid of power vd D, M21, the drain electrode of M21 and the drain electrode of M22, the grid of M23, M24
Grid connects to form node 12 altogether;The grid of M22 is connected to node 11;The drain electrode of M23 is connected to node 1;The drain electrode of M24 is connected to
Node 2;The source ground of M22, M23 and M24.
Electric current summing circuit includes metal-oxide-semiconductor M9, M10, resistance R3, resistance R4, resistance R5;
The source electrode of M9, M10 meets power vd D;The grid of M9, M10 is respectively connecting to node 2 and node 1;The drain electrode of M10 with
Resistance R3 one end connects to form bandgap voltage reference Vref altogether;The drain electrode of the resistance R3 other ends and M9, one end of resistance R4 connect shape altogether
Into node 9;The other end of resistance R4 connects to form node 10 altogether with one end of resistance R5;The other end ground connection of resistance R5.
The beneficial effect that the present invention is reached:
The High Precision Low Temperature realized based on standard CMOS process of the invention floats bandgap voltage reference, introduces 2 temperature controls
Current comparator realizes multiple temperature-compensating, and 5 temperature flex points are obtained in the range of total temperature, and whole circuit is without extra
Biasing circuit;High-precision positive temperature coefficient and negative temperature parameter current are obtained by simple loop negative feedback voltage clamper,
Complexity in circuits thus is reduced to voltage clamping without operational amplifier.
Specific embodiment
The invention will be further described below in conjunction with the accompanying drawings.Following examples are only used for clearly illustrating the present invention
Technical scheme, and can not be limited the scope of the invention with this.
As depicted in figs. 1 and 2, circuit composition of the invention:
(1) metal-oxide-semiconductor M1, M2, M3, M4, M5, M6, M7, M8 and substrate PNP transistor Q1, Q2 and resistance R1 constitute the positive temperature of high accuracy
Degree coefficient current produces circuit, that is, produce the electric current I with PTATPTAT。
If metal-oxide-semiconductor M1 and M2, M3 and M4, M5 and M6, M7 W wide with M8, L long are more identical than difference, i.e.,:
Metal-oxide-semiconductor M5, M6, M7 and M8 constitute negative-feedback clamper, make the current mirror node being made up of metal-oxide-semiconductor M1, M2, M3 and M4
3 and node 4 voltage it is accurately equal, i.e. V3=V4;Ensure V simultaneously3And V4Do not influenceed by power vd D and channel modulation effect.
The source electrode of metal-oxide-semiconductor M1, M2, M5 and M6 meets power vd D;The drain electrode of the grid and M2 of M1, M2 connects altogether, the leakage of M1, M2
Pole connects the drain electrode of M3, M4, the grid of the grid connection M8 of M3 and drain electrode, the grid and drain electrode shape of the grid connection M7 of M4 respectively
Into node 11;The source electrode of M3 and the source electrode of M7, one end of resistance R1 connect to form current mirror node 3 altogether, the source electrode of M4 and the source of M8
Pole, the emitter stage of PNP pipe Q2 connect to form current mirror node 4 altogether;The emitter stage of the other end connection PNP pipe Q1 of resistance R1, PNP pipe
The grounded collector of Q1;The base stage of PNP pipe Q1 is connected ground, the grounded collector of PNP pipe Q2 altogether with the base stage of PNP pipe Q2.M7、M8
Drain electrode be connected with the drain electrode of M5, M6 respectively;The drain electrode of the grid and M1 of M5, M6 connects to form node 1 altogether.
If PNP pipe Q1 emitter currents are IPTAT:
WhereinIt is thermal voltage, KBIt is Boltzmann constant, T is absolute temperature, and q is an electricity for electronics;N
It is the emitter area ratio of PNP pipe Q1 and Q2, M is PNP pipe Q2 and Q1 collector current value ratio;R1 is the resistance of resistance R1;VEB2
It is the emitter junction bias voltage of PNP pipe Q2, VEB1It is the emitter junction bias voltage of PNP pipe Q1.
WhenA is proportionality coefficient, a>0
It is the breadth length ratio of metal-oxide-semiconductor M10;
Then the electric current of metal-oxide-semiconductor M5 and M10 is
(2) metal-oxide-semiconductor M1A, M2A, M3A, M4A, M5A, M6A, M7A, M8A and resistance R2 constitutes high accuracy negative temperature coefficient electricity
The raw circuit of miscarriage, that is, produce the electric current I being inversely proportional with absolute temperatureCTAT。
When metal-oxide-semiconductor M1A and M2A, M3A and M4A, M5A and M6A, M7A are more identical than difference with the W wide of M8A, L long, i.e.,:
Metal-oxide-semiconductor M5A, M6A, M7A and M8A constitute negative-feedback clamper, make the electricity being made up of metal-oxide-semiconductor M1A, M2A, M3A and M4A
The voltage of stream mirror node 5 and node 4 is accurately equal, i.e. V5=V4;Ensure V simultaneously5And V4Do not imitated by power vd D and channel modulation
The influence answered.
The source electrode of metal-oxide-semiconductor M1A, M2A, M5A and M6A meets power vd D;The drain electrode of the grid and M2A of M1A, M2A connects altogether,
The drain electrode of M1A, M2A connects the drain electrode of M3A, M4A respectively, and the grid of M3A, M4A connects grid and the drain electrode of M8AA, M7A respectively,
The source electrode of M3A and the source electrode of M7A, one end of resistance R2 connect to form current mirror node 5 altogether, the source electrode of M4A and the source electrode of M8A, PNP
The emitter stage of pipe Q2 connects to form current mirror node 4 altogether;The other end ground connection of resistance R2.The drain electrode of M7A, M8AA respectively with M5A,
The drain electrode connection of M6A;The drain electrode of the grid and M1A of M5A, M6A connects to form node 2 altogether.
If the electric current on resistance R2 is ICTAT:
Wherein, R2 is the resistance of resistance R2;
IfB is proportionality coefficient, b>0
It is the breadth length ratio of metal-oxide-semiconductor M9;
Then the electric current of M5A and M9 is
(3) metal-oxide-semiconductor M11, M12, M13, M14, M15, M16, M17, M18, M19, M20 constitutes 2 temperature sensings with compensation
Circuit.
Metal-oxide-semiconductor M11, M13, M14, M15, M17, M18 and M19 source electrode meets power vd D.The grid of M11 is connected to node 1,
The drain electrode of M11 is connected to the drain electrode of M12 and grid forms node 6;The grid of M13 is connected to node 2, and the drain electrode of M13 is with M14's
Drain and gate, the grid of M15, the drain electrode of M16 connect to form node 7 altogether;The grid of M17 is connected to node 2, the drain electrode of M17 with
The drain and gate of M18, the grid of M19, the drain electrode of M20 connect to form node 8 altogether;The drain electrode of M15 and drain electrode, the resistance R4 of M19
The other end, one end of resistance R5 connects to form node 10 altogether;The source electrode of M12, M16, M20 is connected to ground altogether.
By the compensation that is added of positive temperature coefficient and negative temperature parameter current, band-gap reference obtains a temperature flex point T0。
When the temperature limit of circuit is wider, reference voltage variation with temperature accordingly increases.
If metal-oxide-semiconductor M5 is more identical than difference with the W wide of M16, M20, L long with M11, M12,
Then the electric current of metal-oxide-semiconductor M5, M11, M12, M16 and M20 is equal, I5=I11=I12=I16=I20
Ifc>0, d>0
The then electric current I of metal-oxide-semiconductor M1313=cI5A, the electric current I of metal-oxide-semiconductor M1717=dI5A。
Because I13It is negative temperature parameter current, I16It is positive temperature coefficient electric current.When the temperature is low, I13≥I16, so
M14 and M15 do not have electric current, and in cut-off state, M15 is not in the Injection Current of node 10.Until being increased to temperature T1When, work as I13<
I16, M15 starts in the Injection Current of node 10, and electric current is I15=k1(I16-I13), wherein k1It is proportionality coefficient, this electric current I15Have
Positive temperature coefficient, thus obtain second temperature flex point T1.Wherein,Respectively
The W wide of metal-oxide-semiconductor M15, M14, L long ratios.
As temperature continues to rise, the decline of EB junction voltages is dominant, until rising to temperature T2When, there is the 3rd temperature flex point T2。
Similarly, because I17It is negative temperature parameter current, I20It is positive temperature coefficient electric current, when temperature is more than T2Less than T3, I17
≥I20, M18 and M19 do not have electric current, and in cut-off state, thus M19 is not in the Injection Current of node 10.Until temperature T3When, I17<
I20, M19 starts in the Injection Current of node 10, and electric current is I19=k2(I20-I17), wherein k2It is proportionality coefficient, obtains the 4th temperature
Degree flex point T3。
Wherein,The respectively W wide of metal-oxide-semiconductor M19, M18, L long ratios.
At this moment total compensation electric current is I15+I19, and c<d.
As temperature continues to be increased to T4When, EB junction voltages decline and start to be dominant, and the 5th temperature flex point T occur4.Wherein,
Temperature flex point T0<T1<T2<T3<T4。
This circuit is in whole operating temperature 5 temperature flex points of interval appearance, a temperature with traditional single order temperature-compensating
Degree flex point or 2~3 temperature flex points of second-order temperature compensation are compared, and greatly reduce reference voltage variation with temperature.
(4) metal-oxide-semiconductor M21, M22, M23 and M24 constitutes start-up circuit, it is ensured that band gap reference is driven during power supply electrifying
Circuit breaks away from degeneracy bias point, sets up normal working point.
The source electrode of metal-oxide-semiconductor M21 connects the grounded-grid of power vd D, M21, the drain electrode of M21 and the drain electrode of M22, the grid of M23,
The grid of M24 connects to form node 12 altogether;The grid of M22 is connected to node 11;The drain electrode of M23 is connected to node 1;The drain electrode of M24
It is connected to node 2;The source ground of M22, M23 and M24.
Power vd D raises the initial stage from 0, and the voltage of node 12 is equal to power vd D, therefore the voltage of node 1 is 0, metal-oxide-semiconductor M5
Turned on M6 and charged to positive temperature coefficient current generating circuit;Similarly, the voltage of node 2 be 0, metal-oxide-semiconductor M5A and M6A turn on to
Negative temperature parameter current produces circuit to charge until setting up normal operating point.When the voltage of node 11 is more than 1 NMOS threshold value
After voltage, metal-oxide-semiconductor M22 conductings, the voltage of node 12 is pulled to 0, thus metal-oxide-semiconductor M23 and M24 shut-off, start completion.
(5) metal-oxide-semiconductor M9, M10, resistance R3, resistance R4, resistance R5 constitute electric current summing circuit, produce bandgap voltage reference
Vref.The source electrode of M9, M10 meets power vd D.The grid of M9, M10 is respectively connecting to node 2 and node 1.The drain electrode of M10 and resistance
R3 one end connects to form bandgap voltage reference Vref altogether;The drain electrode of the resistance R3 other ends and M9, one end of resistance R4 connect to form section altogether
Point 9;The other end of resistance R4 connects to form node 10 altogether with one end of resistance R5, the drain electrode of M15 with the drain electrode of M19;Resistance R5's
The other end is grounded.
Work as I13≥I16, i.e.,
Wherein, R3, R4, R5 are respectively resistance R3, resistance R4, the resistance of resistance R5;
Work as I13<I16And I17≥I20, i.e.,
Work as I17<I20, i.e.,
The above is only the preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, on the premise of the technology of the present invention principle is not departed from, some improvement and deformation can also be made, these improve and deform
Also should be regarded as protection scope of the present invention.