CN1057639C - 半导体元件的制造方法 - Google Patents
半导体元件的制造方法 Download PDFInfo
- Publication number
- CN1057639C CN1057639C CN97110282A CN97110282A CN1057639C CN 1057639 C CN1057639 C CN 1057639C CN 97110282 A CN97110282 A CN 97110282A CN 97110282 A CN97110282 A CN 97110282A CN 1057639 C CN1057639 C CN 1057639C
- Authority
- CN
- China
- Prior art keywords
- layer
- hemispherical silicon
- hemispherical
- silicon grain
- grain layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (20)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN97110282A CN1057639C (zh) | 1997-04-10 | 1997-04-10 | 半导体元件的制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN97110282A CN1057639C (zh) | 1997-04-10 | 1997-04-10 | 半导体元件的制造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1195886A CN1195886A (zh) | 1998-10-14 |
CN1057639C true CN1057639C (zh) | 2000-10-18 |
Family
ID=5171377
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN97110282A Expired - Fee Related CN1057639C (zh) | 1997-04-10 | 1997-04-10 | 半导体元件的制造方法 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN1057639C (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1324650C (zh) * | 2003-10-31 | 2007-07-04 | 海力士半导体有限公司 | 制造半导体器件中的电容器的方法 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1328783C (zh) * | 2003-09-28 | 2007-07-25 | 中芯国际集成电路制造(上海)有限公司 | 垂直式快闪存储器的结构及其制造方法 |
CN113972174A (zh) * | 2020-07-22 | 2022-01-25 | 长鑫存储技术有限公司 | 埋入式栅极及其制作方法 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0732738A1 (en) * | 1995-03-09 | 1996-09-18 | Texas Instruments Incorporated | DRAM capacitor electrode process |
-
1997
- 1997-04-10 CN CN97110282A patent/CN1057639C/zh not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0732738A1 (en) * | 1995-03-09 | 1996-09-18 | Texas Instruments Incorporated | DRAM capacitor electrode process |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1324650C (zh) * | 2003-10-31 | 2007-07-04 | 海力士半导体有限公司 | 制造半导体器件中的电容器的方法 |
Also Published As
Publication number | Publication date |
---|---|
CN1195886A (zh) | 1998-10-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5770500A (en) | Process for improving roughness of conductive layer | |
US6124607A (en) | Capacitive memory cell | |
US5182232A (en) | Metal silicide texturizing technique | |
US5837580A (en) | Method to form hemi-spherical grain (HSG) silicon | |
JP2501065B2 (ja) | 高容積キャパシタをもつ高集積半導体装置の製造方法 | |
EP0572943A1 (en) | High resolution etching mask | |
US5208479A (en) | Method of increasing capacitance of polycrystalline silicon devices by surface roughening and polycrystalline silicon devices | |
JPH06163853A (ja) | 半導体装置のキャパシタ製造方法 | |
JPH0629219A (ja) | 気相核生成を利用したポリシリコンのテクスチヤ化方法 | |
EP0923117B1 (en) | Method of manufacture of single transistor ferroelectric memory cell using chemical-mechanical polishing | |
KR20110129079A (ko) | 비휘발성 메모리 소자 및 이의 제조방법 | |
US6238972B1 (en) | Method for increasing capacitance | |
EP0567748B1 (en) | Fabrication of rough silicon surfaces | |
US5798280A (en) | Process for doping hemispherical grain silicon | |
KR100316027B1 (ko) | 반도체 소자의 전하저장 전극 형성방법 | |
CN1057639C (zh) | 半导体元件的制造方法 | |
JPH10275902A (ja) | 半導体素子の電荷貯蔵電極形成方法及びフラッシュメモリ素子の電極形成方法 | |
US6013555A (en) | Process for rounding an intersection between an HSG-SI grain and a polysilicon layer | |
EP0941552B1 (en) | Semiconductor device with memory capacitor and method of manufacturing such a device | |
US11469103B2 (en) | Semiconductor structure formation | |
TW313691B (en) | Structure with increased capacitance and process thereof | |
TW313679B (en) | Method of increasing capacitance | |
JPH10209397A (ja) | キャパシタンスの増大方法 | |
JP2972145B2 (ja) | 半球状の粒状シリコンの成長方法 | |
KR100379006B1 (ko) | 반구체입자상실리콘층을이용하여정전용량이개선된반도체장치의제조방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
REG | Reference to a national code |
Ref country code: HK Ref legal event code: GR Ref document number: 1050720 Country of ref document: HK |
|
ASS | Succession or assignment of patent right |
Owner name: LANZE TECHNOLOGY CO., LTD. Free format text: FORMER OWNER: LIANHUA ELECTRONIC CO., LTD. Effective date: 20100802 |
|
C41 | Transfer of patent application or patent right or utility model | ||
COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 000000 HSINCHU SCIENCE INDUSTRY PARK, TAIWAN PROVINCE, CHINA TO: DELAWARE STATE, USA |
|
TR01 | Transfer of patent right |
Effective date of registration: 20100802 Address after: Delaware Patentee after: Blue Ze Technology Co., Ltd. Address before: 000000 Hsinchu Science Industrial Park, Taiwan, China Patentee before: United Microelectronics Corporation |
|
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20001018 Termination date: 20120410 |