CN105679895A - Preparation method of vertical ultraviolet LED chip - Google Patents
Preparation method of vertical ultraviolet LED chip Download PDFInfo
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- CN105679895A CN105679895A CN201610196094.3A CN201610196094A CN105679895A CN 105679895 A CN105679895 A CN 105679895A CN 201610196094 A CN201610196094 A CN 201610196094A CN 105679895 A CN105679895 A CN 105679895A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0054—Processes for devices with an active region comprising only group IV elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/10—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/405—Reflective materials
Abstract
The invention discloses a preparation method of a vertical ultraviolet LED chip, in particular, a method applicable for manufacturing a semiconductor device which is provided with at least one potential jump barrier and is suitable for light emission. A metal current spreading layer Ni/Ag and a DBR are adopted to replace a metal reflective layer of the vertical ultraviolet LED chip, the thickness of Ni in the metal current spreading layer Ni/Ag being controlled in the range of 5 to 10 Angstroms, and the thickness of Ag in the metal current spreading layer Ni/Ag being controlled in the range of 10 to 40 Angstroms. According to the DBR, at first, a SiO2 layer of which the thickness ranges from 4200 to 4400 Angstroms is formed through electron beam evaporation; and TiO2 and SiO2 are evaporated alternately, and evaporation is performed for 4 to 20 cycles, and the thickness of the TiO2 in each evaporation cycle ranges from 278 to 348 Angstroms, and the thickness of the SiO2 in each evaporation cycle ranges from 477 to 596 Angstroms. With the preparation method of the invention adopted, problems caused by the absorption of light by a metal reflective layer in the prior art can be improved, and the illumination brightness of the vertical ultraviolet LED chip can be improved.
Description
Technical field
Technical scheme relates to being applicable to manufacture the method being specially adapted for photoemissive semiconductor device having at least a jump in potential potential barrier, the specifically preparation method of a kind of vertical UV LED chip.
Background technology
Along with the fast development of LED technology, wave-length coverage is also more and more wider in the range of application of the ultraviolet LED of 350-280nm. Ultraviolet LED compares that traditional ultraviolet source is more energy-conservation, and the life-span is longer, and without noxious substance. But compare with the near ultraviolet LED of InGaN base or blue-ray LED, the quantum efficiency of ultraviolet LED very low, additionally plus metallic mirror, the Absorption of ultraviolet band light is directly resulted in the output of ultraviolet LED and be only the 5%-8% of input power.
Existing upside-down mounting and vertical UV LED chip mainly form metallic mirror as the reflecting layer on LED chip to reach reflecting effect using the metal of Ni, Ag, Al, and Cr, Pt, Au prepare metal electrode. But these metal pair wavelength of Ni, Ag, Al, Cr, Pt, Au have significantly high absorbability at the ultraviolet band of 350-280nm, directly influence the luminosity of UV LED chip. Existing DBR technology is used on packed LED chip, reaches reflection light by plating DBR at the back side of the packed LED chip back of the body and improves the purpose of brightness, and the thickness of the DBR that the LED chip of different-waveband uses is different. CN201110212605.3 discloses TCO type conduction rectilinear blue-light LED chip of DBR and preparation method thereof, its main technical schemes is to use conduction DBR as reflecting mirror and TCO as current extending, there is TCO, for deep ultraviolet light, there is very strong absorbability, be not suitable for being applied to ultraviolet vertical LED chip, and TCO and electric conductivity DBR exists expensive, the defect that preparation technology is unstable.
Summary of the invention
The technical problem to be solved is: the preparation method providing a kind of vertical UV LED chip, metal current extending Ni/Ag is adopted to replace the metallic reflector of vertical UV LED chip of the prior art plus DBR, overcome the metallic reflector absorption to light in prior art, improve the luminosity of vertical UV LED chip.
This invention address that the preparation method that this technical problem be the technical scheme is that a kind of vertical UV LED chip, step is as follows:
The first step, grows N-type epitaxy layer, multiple quantum well layer and P type epitaxial layer on Sapphire Substrate slice, thin piece successively, is 98%H by the epitaxial wafer mass percent concentration grown with MOCVD2SO4It is 30%H with mass percent concentration2O2The mixed solution of by volume=3: 1 is heated to 80 DEG C, soaks 10 minutes, then uses deionized water rinsing 5 minutes, finally dries 20 minutes with drier;
Second step, on the surface of the P type epitaxial layer of the Sapphire Substrate slice, thin piece processed through the first step, W metal/Ag that deposited by electron beam evaporation platform evaporation is a layer ultra-thin, as current extending, wherein the THICKNESS CONTROL of Ni existsThe THICKNESS CONTROL of Ag existsRequire that this metal current extending forms Ohmic contact with P type epitaxial layer after next step annealing;
3rd step, the Ni/Ag metal current extending annealing furnace obtained by second step is at N2Annealing under environment, annealing temperature is 350 DEG C～400 DEG C, N2Flow velocity is 10L/min, and annealing time is 5～10 minutes;
4th step, the Ni/Ag metal current extending after three-step annealing prepares DBR layer, and the material of use is SiO2And TiO2Evaporation source, the method for deposited by electron beam evaporation is first deposited with a layer thickness and isSiO2, then by TiO2And SiO2Alternatively vaporised, evaporates 4～20 cycles, the TiO in each evaporation periods2Thickness beSiO2Thickness beDuring evaporation, electron beam evaporation platform pressure value is 0.0213Pa, and temperature is 300 DEG C;
5th step, the DBR layer that 4th step prepares carries out gluing, exposure, development and post bake, form out 2～10 P electrode plug figures, then 2～10 P electrode holes are etched with HF corrosive liquid again, the degree of depth in etched P electrode hole is just the thickness of DBR layer, then cleaning of removing photoresist again dries, finally carry out gluing again, exposed and developed, deposited by electron beam evaporation platform is deposited with Cr/Al/Ti/Au successively as P electrode plug again, and guarantee that 2～10 the P electrode plugs formed are prepared on above-mentioned Ni/Ag metal current extending, the thickness of P electrode plug is identical with the thickness of DBR layer,
6th step, after the evaporation P electrode plug of the 5th step completes, with blue film by useless metal-stripping, clean after stripping and dry, then on the above-mentioned DBR layer prepared, it is deposited with bonding metal layer, additionally with an equal amount of silicon chip of Sapphire Substrate slice, thin piece or copper sheet on be deposited with the bonding metal layer of same thickness, to the 5th step process and be deposited with the Sapphire Substrate slice, thin piece of bonding metal layer and evaporation has an equal amount of silicon chip of same thickness bonding metal layer or copper sheet to be bonded together in Bonding machine by completing the first step;
7th step, in the Bonding machine of the 6th step after bonding, laser lift-off technique is used to be stripped down from epitaxial layer by the substrate of Sapphire Substrate slice, thin piece, carry out gluing again, exposed and developed, deposited by electron beam evaporation platform evaporation N electrode again, finally by useless metal removal, it is finally completed the preparation of vertical UV LED chip.
The preparation method of above-mentioned a kind of vertical UV LED chip, described deposited by electron beam evaporation platform is deposited with Cr/Al/Ti/Au successively as P electrode plug, and formed Cr thickness isAl thickness isTi thickness is Change with the change along with DBR layer thickness of the thickness of Au.
The preparation method of above-mentioned a kind of vertical UV LED chip, the thickness that described bond wire is Cr and Au, Cr is The thickness of Au is 1～5 μm.
The preparation method of above-mentioned a kind of vertical UV LED chip, described deposited by electron beam evaporation platform evaporation N electrode, is that deposited by electron beam evaporation platform is deposited with Cr/Al/Ti/Au successively, and forming Cr thickness isAl thickness isTi thickness isWith Au thickness it isN electrode.
The preparation method of above-mentioned a kind of vertical UV LED chip, raw material used and equipment are all well known in the art, known approach obtain; Operating procedure is all that those skilled in the art will appreciate that.
The invention has the beneficial effects as follows: compared with prior art, the present invention has following prominent substantive distinguishing features and marked improvement:
(1) the main substantive distinguishing features of the present invention is in that: DBR layer and Ni/Ag metal current extending combine composition high reflectivity mirror, DBR layer is utilized to instead of the metallic reflector that ultraviolet light has Absorption, directly increase luminous efficiency, overcome the metallic reflector absorption to light in prior art, improve the luminosity of vertical UV LED chip; And 2～10 P electrode plugs are deposited with on metal current extending, contribute to the extension of electric current, increase LED chip brightness further.
(2) the P electrode plug in the present invention and N electrode are all be made up of Cr/Al/Ti/Au, and this P electrode plug and N electrode all have reflection.
(3) technique of the present invention is simple, and production cost is low.
(4) present disclosure additionally applies for the preparation of blue-ray LED vertical chip, it is only necessary to change SiO in DBR layer2And TiO2Thickness, just can form the reflecting mirror of high blu-ray reflection rate, basic get rid of the metallic mirror absorption to light, thus reaching to improve the effect of LED chip brightness.
Accompanying drawing explanation
Below in conjunction with drawings and Examples, the present invention is further described.
Fig. 1 is the structural representation of a kind of vertical UV LED chip of the present invention.
Fig. 2～9 are each step schematic diagram of the inventive method, wherein:
Fig. 2 is the schematic diagram of the N-type epitaxy layer, multiple quantum well layer and the P type epitaxial layer that grow on Sapphire Substrate slice, thin piece in the inventive method;
Fig. 3 is the schematic diagram being deposited with Ni/Ag metal current extending in the inventive method on the P type epitaxial layer of epitaxial layer;
Fig. 4 prepares DBR layer on Ni/Ag metal current extending and etches the schematic diagram in P electrode hole in the inventive method;
Fig. 5 is deposited with P electrode plug on Ni/A metal current extending and is deposited with the schematic diagram of bonding metal layer Cr/Au on DBR layer in the inventive method;
Fig. 6 is the schematic diagram being deposited with bond wire Cr/Au in the inventive method on silicon chip;
Fig. 7 completes the schematic diagram that the first step has an equal amount of silicon chip of same thickness bond wire to be bonded together in Bonding machine to the Sapphire Substrate slice, thin piece of the 5th step process and evaporation in the inventive method;
Fig. 8 uses laser lift-off technique by the substrate of Sapphire Substrate slice, thin piece from the schematic diagram after stripping down the N epitaxial layer of epitaxial layer in the inventive method;
Fig. 9 is prepared after N electrode in the inventive method, completes the schematic diagram of the preparation of vertical UV LED chip.
In figure, 1.N type epitaxial layer, 2. MQW, 3.P type epitaxial layer, 4.Ni/Ag metal current extending, 5.DBR layer, 6.P electrode plug, 7. bond wire Cr layer a, 8. bond wire Au layer a, 9. bond wire Au layer b, 10. bond wire Cr layer b, 11. silicon chips, 12.N electrode, 13. Sapphire Substrate slice, thin piece, 14.P electrode hole.
Detailed description of the invention
Embodiment illustrated in fig. 1 shows, the structure of a kind of vertical UV LED chip of the present invention includes N-type epitaxy layer 1, MQW 2, P type epitaxial layer 3, Ni/Ag metal current extending 4, DBR layer 5, P electrode plug 6, bond wire Cr layer a7, bond wire Au layer a8, bond wire Au layer b9, bond wire Cr layer b10, silicon chip 11 and N electrode 12.
Embodiment illustrated in fig. 2 shows, N-type epitaxy layer 1, multiple quantum well layer 2 and the P type epitaxial layer 3 grown on Sapphire Substrate slice, thin piece 13 in the inventive method.
Embodiment illustrated in fig. 3 shows, in the inventive method on Sapphire Substrate slice, thin piece 13 after the N-type epitaxy layer 1 of growth, multiple quantum well layer 2 and P type epitaxial layer 3, then is deposited with Ni/Ag metal current extending 4 on P type epitaxial layer 3.
Embodiment illustrated in fig. 4 shows, N-type epitaxy layer 1, multiple quantum well layer 2 and the P type epitaxial layer 3 grown on Sapphire Substrate slice, thin piece 13 in the inventive method, it is deposited with after Ni/Ag metal current extending 4 on P type epitaxial layer 3 again, is prepared for DBR layer 5 at Ni/Ag metal current extending 4 and erodes away three P electrode holes 14.
Embodiment illustrated in fig. 5 shows, N-type epitaxy layer 1, multiple quantum well layer 2 and the P type epitaxial layer 3 grown on Sapphire Substrate slice, thin piece 13 in the inventive method, Ni/Ag metal current extending 4 it is deposited with again on P type epitaxial layer 3, again after Ni/Ag metal current extending 4 is prepared for DBR layer 5, on P electrode hole 14, deposited by electron beam evaporation platform is deposited with Cr/Al/Ti/Au successively and forms P electrode plug 6 again, is deposited with bond wire Cr layer a7 and bond wire Au layer a8 on DBR layer 5.
Embodiment illustrated in fig. 6 shows, is deposited with bond wire Au layer b9 and bond wire Cr layer b10 in the inventive method on silicon chip 11.
Embodiment illustrated in fig. 7 shows, the inventive method there is an equal amount of silicon chip 11 of same thickness bond wire to be bonded together in Bonding machine by completing first step Sapphire Substrate slice, thin piece 13 and evaporation to the 5th step process, including the N-type epitaxy layer 1 of growth on Sapphire Substrate slice, thin piece 13, multiple quantum well layer 2 and P type epitaxial layer 3, P type epitaxial layer 3 is deposited with Ni/Ag metal current extending 4, DBR layer 5 in the preparation of Ni/Ag metal current extending 4, on P electrode hole 14, deposited by electron beam evaporation platform is deposited with the Cr/Al/Ti/Au P electrode plug 6 formed successively, the bond wire Cr layer a7 and bond wire Au layer a8 of evaporation on DBR layer 5, and on silicon chip 11 evaporation bond wire Au layer b9 and bond wire Cr layer b10.
Embodiment illustrated in fig. 8 shows, the inventive method use laser lift-off technique by the substrate desquamation of the Sapphire Substrate slice, thin piece 13 shown in Fig. 7, by exposed for N-type epitaxy layer 1 out, now product includes in N-type epitaxy layer 1, multiple quantum well layer 2 and P type epitaxial layer 3, P type epitaxial layer 3 is deposited with Ni/Ag metal current extending 4, DBR layer 5 in the preparation of Ni/Ag metal current extending 4, on P electrode hole 14, deposited by electron beam evaporation platform is deposited with the Cr/Al/Ti/Au P electrode plug 6 formed successively, the bond wire Cr layer a7 and bond wire Au layer a8 of evaporation on DBR layer 5, and on silicon chip 11 evaporation bond wire Au layer b9 and bond wire Cr layer b10.
Embodiment illustrated in fig. 9 shows, prepares after N electrode 12, complete the preparation of vertical UV LED chip in the inventive method. The composition of this vertical UV LED chip includes N electrode 12, N-type epitaxy layer 1, multiple quantum well layer 2 and P type epitaxial layer 3, P type epitaxial layer 3 is deposited with Ni/Ag metal current extending 4, DBR layer 5 in the preparation of Ni/Ag metal current extending 4, on P electrode hole 14, deposited by electron beam evaporation platform is deposited with the Cr/Al/Ti/Au P electrode plug 6 formed successively, the bond wire Cr layer a7 and bond wire Au layer a8 of evaporation on DBR layer 5, and the bond wire Au layer b9 being deposited with on silicon chip 11 and bond wire Cr layer b10.
Embodiment 1
A kind of preparation method of the vertical UV LED chip of the present embodiment, step is as follows:
The first step, grows N-type epitaxy layer, multiple quantum well layer and P type epitaxial layer on Sapphire Substrate slice, thin piece successively, is 98%H by the epitaxial wafer mass percent concentration grown with MOCVD2SO4It is 30%H with mass percent concentration2O2The mixed solution of by volume=3: 1 is heated to 80 DEG C, soaks 10 minutes, then uses deionized water rinsing 5 minutes, finally dries 20 minutes with drier;
Second step, on the surface of the P type epitaxial layer of the Sapphire Substrate slice, thin piece processed through the first step, W metal/Ag that deposited by electron beam evaporation platform evaporation is a layer ultra-thin, as current extending, wherein the THICKNESS CONTROL of Ni existsThe THICKNESS CONTROL of Ag existsRequire that this metal current extending forms Ohmic contact with P type epitaxial layer after next step annealing;
3rd step, the Ni/Ag metal current extending annealing furnace obtained by second step is at N2Annealing under environment, annealing temperature is 350 DEG C, N2Flow velocity is 10L/min, and annealing time is 5 minutes;
4th step, the Ni/Ag metal current extending after three-step annealing prepares DBR layer, and the material of use is SiO2And TiO2Evaporation source, the method for deposited by electron beam evaporation is first deposited with a layer thickness and isSiO2, then by TiO2And SiO2Alternatively vaporised, evaporated for 4 cycles, TiO in each evaporation periods2Thickness beSiO2Thickness beDuring evaporation, electron beam evaporation platform pressure value is 0.0213Pa, and temperature is 300 DEG C;
5th step, the DBR layer that 4th step prepares carries out gluing, exposure, development and post bake, form out 2 P electrode plug figures, then 2 P electrode holes are etched with HF corrosive liquid again, the degree of depth in etched P electrode hole is just the thickness of DBR layer, and cleaning of then removing photoresist again dries, and finally carries out gluing again, exposed and developed, deposited by electron beam evaporation platform is deposited with Cr/Al/Ti/Au successively as P electrode plug again, and formed Cr thickness isAl thickness isTi thickness isWith the change along with DBR layer thickness of the thickness of Au and change and guarantee that 2 the P electrode plugs formed are prepared on above-mentioned Ni/Ag metal current extending, the thickness of P electrode plug is identical with the thickness of DBR layer;
6th step, after the evaporation P electrode plug of the 5th step completes, with blue film by useless metal-stripping, cleans after stripping and dries, be then deposited with bonding metal layer on the above-mentioned DBR layer prepared, and the thickness that described bond wire is Cr and Au, Cr isThe thickness of Au is 5 μm, additionally with an equal amount of silicon chip of Sapphire Substrate slice, thin piece or copper sheet on be deposited with the bonding metal layer of same thickness, to the 5th step process and be deposited with the Sapphire Substrate slice, thin piece of bonding metal layer and evaporation has an equal amount of silicon chip of same thickness bonding metal layer or copper sheet to be bonded together in Bonding machine by completing the first step;
7th step, in the Bonding machine of the 6th step after bonding, laser lift-off technique is used to be stripped down from epitaxial layer by the substrate of Sapphire Substrate slice, thin piece, carry out gluing again, exposed and developed, deposited by electron beam evaporation platform evaporation N electrode again, being that deposited by electron beam evaporation platform is deposited with Cr/Al/Ti/Au successively, forming Cr thickness isAl thickness isTi thickness isWith Au thickness it isN electrode, finally by useless metal removal, be finally completed the preparation of vertical UV LED chip.
Embodiment 2
A kind of preparation method of the vertical UV LED chip of the present embodiment, step is as follows:
The first step, with embodiment 1;
Second step, on the surface of the P type epitaxial layer of the Sapphire Substrate slice, thin piece processed through the first step, W metal/Ag that deposited by electron beam evaporation platform evaporation is a layer ultra-thin, as current extending, wherein the THICKNESS CONTROL of Ni existsThe THICKNESS CONTROL of Ag existsRequire that this metal current extending forms Ohmic contact with P type epitaxial layer after next step annealing;
3rd step, except annealing temperature is 370 DEG C, annealing time is outside 8 minutes, and other are with embodiment 1;
4th step, the Ni/Ag metal current extending after three-step annealing prepares DBR layer, and the material of use is SiO2And TiO2Evaporation source, the method for deposited by electron beam evaporation is first deposited with a layer thickness and isSiO2, then by TiO2And SiO2Alternatively vaporised, evaporated for 12 cycles, TiO in each evaporation periods2Thickness beSiO2Thickness beDuring evaporation, electron beam evaporation platform pressure value is 0.0213Pa, and temperature is 300 DEG C;
5th step, the DBR layer that 4th step prepares carries out gluing, exposure, development and post bake, form out 5 P electrode plug figures, then 5 P electrode holes are etched with HF corrosive liquid again, the degree of depth in etched P electrode hole is just the thickness of DBR layer, and cleaning of then removing photoresist again dries, and finally carries out gluing again, exposed and developed, deposited by electron beam evaporation platform is deposited with Cr/Al/Ti/Au successively as P electrode plug again, and formed Cr thickness isAl thickness isTi thickness isWith the change along with DBR layer thickness of the thickness of Au and change, and guarantee that 5 the P electrode plugs formed are prepared on above-mentioned Ni/Ag metal current extending, the thickness of P electrode plug is identical with the thickness of DBR layer;
6th step, after the evaporation P electrode plug of the 5th step completes, with blue film by useless metal-stripping, cleans after stripping and dries, be then deposited with bonding metal layer on the above-mentioned DBR layer prepared, and the thickness that described bond wire is Cr and Au, Cr isThe thickness of Au is 3 μm, additionally with an equal amount of silicon chip of Sapphire Substrate slice, thin piece or copper sheet on be deposited with the bonding metal layer of same thickness, to the 5th step process and be deposited with the Sapphire Substrate slice, thin piece of bonding metal layer and evaporation has an equal amount of silicon chip of same thickness bonding metal layer or copper sheet to be bonded together in Bonding machine by completing the first step;
7th step, in the Bonding machine of the 6th step after bonding, laser lift-off technique is used to be stripped down from epitaxial layer by the substrate of Sapphire Substrate slice, thin piece, carry out gluing again, exposed and developed, deposited by electron beam evaporation platform evaporation N electrode again, deposited by electron beam evaporation platform is deposited with Cr/Al/Ti/Au successively, forms Cr thickness and isAl thickness isTi thickness isWith Au thickness it isN electrode, finally by useless metal removal, be finally completed the preparation of vertical UV LED chip.
Embodiment 3
A kind of preparation method of the vertical UV LED chip of the present embodiment, step is as follows:
The first step, with embodiment 1;
Second step, on the surface of the P type epitaxial layer of the Sapphire Substrate slice, thin piece processed through the first step, W metal/Ag that deposited by electron beam evaporation platform evaporation is a layer ultra-thin, as current extending, wherein the THICKNESS CONTROL of Ni existsThe THICKNESS CONTROL of Ag existsRequire that this metal current extending forms Ohmic contact with P type epitaxial layer after next step annealing;
3rd step, except annealing temperature is 400 DEG C, annealing time is outside 10 minutes, and other are with embodiment 1;
4th step, the Ni/Ag metal current extending after three-step annealing prepares DBR layer, and the material of use is SiO2And TiO2Evaporation source, the method for deposited by electron beam evaporation is first deposited with a layer thickness and isSiO2, then by TiO2And SiO2Alternatively vaporised, evaporated for 20 cycles, TiO in each evaporation periods2Thickness beSiO2Thickness beDuring evaporation, electron beam evaporation platform pressure value is 0.0213Pa, and temperature is 300 DEG C;
5th step, the DBR layer that 4th step prepares carries out gluing, exposure, development and post bake, form out 10 P electrode plug figures, then 10 P electrode holes are etched with HF corrosive liquid again, the degree of depth in etched P electrode hole is just the thickness of DBR layer, and cleaning of then removing photoresist again dries, and finally carries out gluing again, exposed and developed, deposited by electron beam evaporation platform is deposited with Cr/Al/Ti/Au successively as P electrode plug again, and formed Cr thickness isAl thickness isTi thickness isWith the change along with DBR layer thickness of the thickness of Au and change and guarantee that 10 the P electrode plugs formed are prepared on above-mentioned Ni/Ag metal current extending, the thickness of P electrode plug is identical with the thickness of DBR layer;
6th step, after the evaporation P electrode plug of the 5th step completes, with blue film by useless metal-stripping, cleans after stripping and dries, be then deposited with bonding metal layer on the above-mentioned DBR layer prepared, and the thickness that described bond wire is Cr and Au, Cr isThe thickness of Au is 1 μm, additionally with an equal amount of silicon chip of Sapphire Substrate slice, thin piece or copper sheet on be deposited with the bonding metal layer of same thickness, to the 5th step process and be deposited with the Sapphire Substrate slice, thin piece of bonding metal layer and evaporation has an equal amount of silicon chip of same thickness bonding metal layer or copper sheet to be bonded together in Bonding machine by completing the first step;
7th step, in the Bonding machine of the 6th step after bonding, laser lift-off technique is used to be stripped down from epitaxial layer by the substrate of Sapphire Substrate slice, thin piece, carry out gluing again, exposed and developed, deposited by electron beam evaporation platform evaporation N electrode again, being that deposited by electron beam evaporation platform is deposited with Cr/Al/Ti/Au successively, forming Cr thickness isAl thickness isTi thickness isWith Au thickness it isN electrode, finally by useless metal removal, be finally completed the preparation of vertical UV LED chip.
Embodiment 4
Except, in second step, the THICKNESS CONTROL of Ni existsThe THICKNESS CONTROL of Ag existsIn 3rd step, annealing temperature controls at 375 DEG C, N2Flow velocity is 10L/min, and annealing time is 5 minutes; In 4th step, the method for deposited by electron beam evaporation is first deposited with a layer thickness and isSiO2, then by TiO2And SiO2Alternatively vaporised, evaporated for 4 cycles, TiO in each evaporation periods2Thickness beSiO2Thickness beIn 5th step, form out 3 P electrode plug figures, etch 3 P electrode holes with HF corrosive liquid, 3 P electrode plugs of formation; Deposited by electron beam evaporation platform is deposited with Cr/Al/Ti/Au successively as P electrode plug again, and formed Cr thickness isAl thickness isTi thickness isChange with the change along with DBR layer thickness of the thickness of Au; In 6th step, the thickness that described bond wire is Cr and Au, Cr isThe thickness of Au is 2 μm; In 7th step, deposited by electron beam evaporation platform is deposited with Cr/Al/Ti/Au successively, forms Cr thickness and isAl thickness isTi thickness isWith Au thickness it isN electrode outside, other are with embodiment 1, thus prepare the vertical UV LED chip of the deep ultraviolet of 350nm wavelength.
Embodiment 5
Except, in second step, the THICKNESS CONTROL of Ni existsThe THICKNESS CONTROL of Ag existsIn 4th step, the method for deposited by electron beam evaporation is first deposited with a layer thickness and isSiO2, then by TiO2And SiO2Alternatively vaporised, evaporated for 9.5 cycles, TiO in each evaporation periods2Thickness beSiO2Thickness beOutside, other, with embodiment 4, thus prepare the vertical UV LED chip of the blue light of 460nm wavelength.
Embodiment 6
Except in the 4th step, the method for deposited by electron beam evaporation is first deposited with a layer thickness and isSiO2, then by TiO2And SiO2Alternatively vaporised, evaporated for 6 cycles, TiO in each evaporation periods2Thickness beSiO2Thickness beOutside, other, with embodiment 4, thus prepare the vertical UV LED chip of high brightness.
Raw material used in above-described embodiment and equipment are all well known in the art, known approach obtain; Operating procedure is all that those skilled in the art will appreciate that.
Claims (4)
1. the preparation method of a vertical UV LED chip, it is characterised in that step is as follows:
The first step, grows N-type epitaxy layer, multiple quantum well layer and P type epitaxial layer on Sapphire Substrate slice, thin piece successively, is 98%H by the epitaxial wafer mass percent concentration grown with MOCVD2SO4It is 30%H with mass percent concentration2O2The mixed solution of by volume=3: 1 is heated to 80 DEG C, soaks 10 minutes, then uses deionized water rinsing 5 minutes, finally dries 20 minutes with drier;
Second step, surface at the P type epitaxial layer of the Sapphire Substrate slice, thin piece processed through the first step, W metal/Ag that deposited by electron beam evaporation platform evaporation is one layer ultra-thin, as current extending, wherein the THICKNESS CONTROL of Ni is 5～10, the THICKNESS CONTROL of Ag is 10～40, it is desirable to this metal current extending forms Ohmic contact with P type epitaxial layer after next step annealing;
3rd step, the Ni/Ag metal current extending annealing furnace obtained by second step is at N2Annealing under environment, annealing temperature is 350 DEG C～400 DEG C, N2Flow velocity is 10L/min, and annealing time is 5～10 minutes;
4th step, the Ni/Ag metal current extending after three-step annealing prepares DBR layer, and the material of use is SiO2And TiO2Evaporation source, the method for deposited by electron beam evaporation is first deposited with the SiO that a layer thickness is 4200～44002, then by TiO2And SiO2Alternatively vaporised, evaporates 4～20 cycles, the TiO in each evaporation periods2Thickness be 278～348, SiO2Thickness be 477～596, during evaporation, electron beam evaporation platform pressure value is 0.0213Pa, and temperature is 300 DEG C;
5th step, the DBR layer that 4th step prepares carries out gluing, exposure, development and post bake, form out 2～10 P electrode plug figures, then 2～10 P electrode holes are etched with HF corrosive liquid again, the degree of depth in etched P electrode hole is just the thickness of DBR layer, then cleaning of removing photoresist again dries, finally carry out gluing again, exposed and developed, deposited by electron beam evaporation platform is deposited with Cr/Al/Ti/Au successively as P electrode plug again, and guarantee that 2～10 the P electrode plugs formed are prepared on above-mentioned Ni/Ag metal current extending, the thickness of P electrode plug is identical with the thickness of DBR layer,
6th step, after the evaporation P electrode plug of the 5th step completes, with blue film by useless metal-stripping, clean after stripping and dry, then on the above-mentioned DBR layer prepared, it is deposited with bonding metal layer, additionally with an equal amount of silicon chip of Sapphire Substrate slice, thin piece or copper sheet on be deposited with the bonding metal layer of same thickness, to the 5th step process and be deposited with the Sapphire Substrate slice, thin piece of bonding metal layer and evaporation has an equal amount of silicon chip of same thickness bonding metal layer or copper sheet to be bonded together in Bonding machine by completing the first step;
7th step, in the Bonding machine of the 6th step after bonding, laser lift-off technique is used to be stripped down from epitaxial layer by the substrate of Sapphire Substrate slice, thin piece, carry out gluing again, exposed and developed, deposited by electron beam evaporation platform evaporation N electrode again, finally by useless metal removal, it is finally completed the preparation of vertical UV LED chip.
2. the preparation method of a kind of vertical UV LED chip according to claim 1, it is characterized in that: described deposited by electron beam evaporation platform is deposited with Cr/Al/Ti/Au successively as P electrode plug, formed Cr thickness is 10～100, Al thickness is 1000～3000, Ti thickness be 1000～3000 and the thickness of Au change along with the change of DBR layer thickness.
3. the preparation method of a kind of vertical UV LED chip according to claim 1, it is characterised in that: described bond wire is the thickness of Cr and Au, Cr is 10～100, and the thickness of Au is 1～5 μm.
4. the preparation method of a kind of vertical UV LED chip according to claim 1, it is characterized in that: described deposited by electron beam evaporation platform evaporation N electrode, that deposited by electron beam evaporation platform is deposited with Cr/Al/Ti/Au successively, formed Cr thickness be 10～100, Al thickness be 1000～3000, Ti thickness be 1000～3000 and Au thickness be the N electrode of 5000～10000.
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