CN105679773B - 阵列基板及阵列基板的制备方法 - Google Patents

阵列基板及阵列基板的制备方法 Download PDF

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CN105679773B
CN105679773B CN201610066589.4A CN201610066589A CN105679773B CN 105679773 B CN105679773 B CN 105679773B CN 201610066589 A CN201610066589 A CN 201610066589A CN 105679773 B CN105679773 B CN 105679773B
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徐向阳
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Abstract

本发明提供一种阵列基板及阵列基板的制备方法。阵列基板包括基板及设置在基板同侧的交错且绝缘设置的多个栅极线及多个数据线，以及多个与栅极线平行且与数据线绝缘的多个公共电极线，基板包括第一表面，栅极线设置在第一表面上，相邻的两条栅极线及相邻的两条数据线之间限定一个像素区域，像素区域内设置薄膜晶体管，公共电极，像素电极及存储电容，薄膜晶体管包括栅极、沟道层、源极及漏极，存储电容包括第一导电部及第二导电部，栅极、公共电极线、公共电极及第一导电部设置在第一表面，且公共电极与公共电极线电连接，沟道层、源极漏极、第二导电部及像素电极设置在第一绝缘层上且源极与漏极设置在沟道层相对的两端，且像素电极为金属层。

Description

阵列基板及阵列基板的制备方法
技术领域
本发明涉及显示领域，尤其涉及一种阵列基板及阵列基板的制备方法。
背景技术
显示设备，比如液晶显示器(Liquid Crystal Display,LCD)是一种常用的电子设备，由于其具有功耗低、体积小、重量轻等特点，因此备受用户的青睐。半透半反式液晶显示装置(Trans-flective Liquid Crystal Display)同时具有透射式和反射式特性，半透半反式液晶面板在一个像素域内包括有透明电极的透射区和有反射层的反射区。在黑暗的地方可以利用像素区域的透射区和背光源来显示画像，在明亮的地方利用像素区域的反射区和外光来显示画像。因此，半透半反式液晶显示装置可以适应不同的亮暗环境而得到广泛应用。现有技术中，所述半透半反式液晶显示装置中反射外来光线的能力较弱，从而导致半透半反式液晶显示装置在反射外来光线时显示画面时的显示质量较差。
发明内容
本发明提供一种阵列基板，所述阵列基板包括基板及设置在所述基板同侧的多个栅极线及多个数据线，所述基板包括第一表面，所述多个栅极线设置在所述第一表面上，且所述多个栅极线向第一方向延伸且沿第二方向间隔排布，所述多个数据线与所述多个栅极线通过第一绝缘层绝缘设置，且所述多个数据线向所述第二方向延伸且沿所述第一方向间隔排布，所述阵列基板还包括多个公共电极线，所述多个公共电极线与所述多个栅极线平行，一个公共电极线设置于相邻的两个栅极线之间，且所述公共电极线与所述数据线通过所述第一绝缘层绝缘设置，相邻的两条栅极线及相邻的两条数据线之间限定一个像素区域，所述阵列基板还包括设置在所述像素区域内的薄膜晶体管，公共电极，像素电极及存储电容，所述薄膜晶体管包括栅极、所述第一绝缘层、沟道层、源极及漏极，所述栅极设置在所述第一表面上，所述公共电极与所述公共电极线电连接且所述公共电极与所述公共电极线设置在所述第一表面上，所述存储电容包括第一导电部及第二导电部，所述第一导电部设置在所述第一表面上，所述第一导电部上设置所述第一绝缘层，所述第二导电部设置在所述第一绝缘层上且与所述第一导电部对应，所述沟道层、所述源极及所述漏极设置在所述第一绝缘层上且所述源极与所述漏极设置在所述沟道层相对的两端，所述像素电极设置在所述第一绝缘层上，且所述像素电极为金属层，用于反射入射至所述像素电极的光线，一第二绝缘层覆盖所述沟道层、所述源极、所述漏极、所述像素电极、所述第二导电部及所述数据线。
其中，所述公共电极线及所述公共电极为金属层，分别用于反射入射至所述公共电极线及所述公共电极的光线。
其中，所述第一导电部及所述第二导电部为金属层。
其中，所述薄膜晶体管还包括第一欧姆接触层，所述第一欧姆接触层设置在所述沟道层与所述源极之间，用于减小所述沟道层与所述源极之间的接触电阻。
其中，所述薄膜晶体管还包括第二欧姆接触层，所述第二欧姆接触层设置在所述沟道层与所述漏极之间，用于减小所述沟道层与所述漏极之间的接触电阻。
其中，所述第一绝缘层包括对应所述栅极线开设的第一贯孔，所述第二绝缘层包括对应所述第一贯孔开设的第二贯孔及对应所述数据线开设的第三贯孔，一栅极端子通过所述第一贯孔及所述第二贯孔电连接所述栅极线，一数据端子通过所述第三贯孔电连接所述数据线，其中，所述栅极端子及所述数据端子为导电的。
本发明还提供了一种阵列基板的制备方法，所述阵列基板的制备方法包括：
提供基板；
在所述基板的第一表面设置整层的第一金属层；
图案化所述第一金属层，以形成多个沿第一方向延伸且沿第二方向间隔排布的栅极线，以及设置在相邻的两条栅极线之间的且间隔设置的栅极、第一导电部、与每个栅极线对应且平行的公共电极线以及与公共电极线连接且朝远离所述栅极线延伸的公共电极；
形成覆盖所述栅极、所述第一导电部、所述栅极线、所述公共电极线及所述公共电极的第一绝缘层；
在所述第一绝缘层远离所述基板的表面形成与所述栅极对应设置的沟道层；
形成覆盖所述第一绝缘层及所述沟道层的第二金属层；
图案化所述第二金属层，以形成多个沿所述第二方向延伸且沿所述第一方向排布的数据线，以及设置在相邻的两条数据线之间且对应所述沟道层两端设置的源极及漏极、与所述漏极间隔的像素电极、与所述第一导电部对应的第二导电部；
形成覆盖所述沟道层、所述源极、所述漏极、所述像素电极、所述第二导电部及所述数据线的第二绝缘层。
其中，在所述步骤“在所述第一绝缘层远离所述基板的表面形成与所述栅极对应设置的沟道层”包括：
在所述第一绝缘层远离所述基板的表面形成整层的非晶硅层；
图案化所述非晶硅层，保留对应所述栅极设置的所述非晶硅层；
对保留的所述非晶硅层的两端进行离子掺杂，以分别形成第一欧姆接触层及第二欧姆接触层，未进行离子掺杂的所述非晶硅层为所述沟道层。
其中，所述阵列基板的制备方法还包括：
在所述第一绝缘层上开设对应所述栅极线的第一贯孔，在所述第二绝缘层上开设对应所述第一贯孔的第二贯孔及对应所述数据线的第三贯孔；
在所述第二绝缘层形成导电材料层；
图案化所述导电材料层，保留对应所述第二贯孔及所述第一贯孔的导电材料层以及对应所述第三贯孔的导电材料层，其中，对应所述第二贯孔及所述第一贯孔的导电材料层为栅极端子，对应所述第三贯孔的导电材料层为数据端子。
其中，所述离子掺杂为N型离子掺杂。
相较于现有技术，本发明的阵列基板的制备方法将像素电极与薄膜晶体管中的源极和漏极在一制备工序中制备，节约了制备工序，且像素电极为金属，可以反射入射至所述像素电极的光线，因此，制备出的所述阵列基板所应用的液晶显示面板处于明亮的地方时，能够利用所述像素电极反射的光线显示图像，从而提升液晶显示装置显示画面时的显示质量。
进一步地，所述公共电极线和所述公共电极与所述栅极在同一制备工序中制备，节约了制备工序。且所述公共电极线和所述公共电极为金属层，分别用于反射入射至所述公共电极线和所述公共电极的光线，因此，在所述阵列基板所应用的液晶显示面板处于明亮的地方时，能够利用所述像素电极反射的光线显示图像，从而提升液晶显示装置显示画面时的显示质量。
进一步地，所述存储电容的所述第一导电部与所述栅极在同一制备工序中制备，从而节约了制备工序。所述存储电容的第二导电部与所述源极及所述漏极在同一制备工序中制备，从而节约了制备工序。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明一较佳实施方式的阵列基板的俯视图。
图2为图1中沿I-I线的剖面结构示意图。
图3为本发明一较佳实施方式的阵列基板的制备方法的流程图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请参阅图1及图2，图1为本发明一较佳实施方式的阵列基板的俯视图；图2为图1中沿I-I线的剖面结构示意图。所述阵列基板100可应用于半透半反式平面转换(In-PlaneSwitching，IPS)面板装置。所述阵列基板10包括基板100及设置在所述基板100同侧的多个栅极线200及多个数据线300。所述基板100包括第一表面110，所述多个栅极线200设置在所述第一表面110上，且所述多个栅极线200向第一方向D1延伸且沿所述第二方向D2间隔排布。所述多个数据线300与所述多个栅极线200通过第一绝缘层820间隔设置，且所述多个数据线300向所述第二方向D2延伸且沿所述第一方向D1间隔排布。所述阵列基板10还包括多个公共电极线400，所述多个公共电极线400与所述多个栅极线200平行，一个公共电极线400设置于相邻的两个栅极线200之间，且所述公共电极线400与所述数据线300通过所述第一绝缘层820绝缘设置。相邻的两条栅极线200及相邻的两条数据线300之间限定一个像素区域。所述阵列基板10还包括设置在所述像素区域内的薄膜晶体管800、公共电极500、像素电极600及存储电容700。所述薄膜晶体管800包括栅极810、所述第一绝缘层820、沟道层830、源极840及漏极850。所述栅极810设置在所述第一表面110上，所述公共电极500与所述公共电极线400电连接且所述公共电极500与所述公共电极线400设置在所述第一表面110上。所述存储电容700包括第一导电部710和第二导电部720，所述第一导电部710设置在所述第一表面110上，所述第一导电部710上设置所述第一绝缘层820，所述第二导电部720设置在所述第一绝缘层820上且与所述第一导电部710对应。所述沟道层830、所述源极840及所述漏极850设置在所述第一绝缘层820上且所述源极840与所述漏极850设置在所述沟道层830相对的两端。所述像素电极600设置在所述第一绝缘层820上，且所述像素电极600为金属层，用于反射入射至所述像素电极600的光线。一第二绝缘层860覆盖所述沟道层830、所述源极840、所述像素电极600、所述第二导电部720及所述数据线300。其中，所述第一方向D1可以为X轴方向，所述第二方向D2可以为Y轴方向。
所述基板100可以为但不仅限于为玻璃基板或者为塑料基板等绝缘基板。
在本实施方式中，所述公共电极线400及所述公共电极500为金属层，分别用于反射入射至所述公共电极线400及所述公共电极500的光线。
在本实施方式中，所述第一导电部710与所述第二导电部720为金属层。
所述薄膜晶体管800还包括第一欧姆接触层870，所述第一欧姆接触层870设置在所述沟道层830与所述源极840之间，用于减小所述沟道层830与所述源极840之间的接触电阻。
所述薄膜晶体管800还包括第二欧姆接触层880，所述第二欧姆接触层880设置在所述沟道层830与所述漏极850之间，用于减小所述沟道层830与所述漏极850之间的接触电阻。
所述第一绝缘层820包括对应所述栅极线200开设的第一贯孔821，所述第二绝缘层860包括对应所述第一贯孔821开设的第二贯孔861及对应所述数据线300开设的第三贯孔862。一栅极端子210通过所述第一贯孔821及所述第二贯孔861连接所述栅极线200，一数据端子310通过所述第三贯孔862连接所述数据线300，其中，所述栅极端子210及所述数据端子310为导电的。所述栅极端子210及所述数据端子310可与一集成芯片电连接，以接收所述集成芯片的信号。
相较于现有技术，本发明的阵列基板10中的像素电极600为金属层，因此，能反射入射至所述像素电极600的光线，因此，在所述阵列基板10所应用的液晶显示装置处于明亮的地方时，能够利用所述像素电极600反射的光线显示图像，从而提升液晶显示装置显示画面时的显示质量。
进一步地，所述公共电极线400和所述公共电极500为金属层，分别用于反射入射至所述公共电极线400和所述公共电极500的光线，因此，在所述阵列基板10所应用的液晶显示面板处于明亮的地方时，能够利用所述像素电极600反射的光线显示图像，从而提升液晶显示装置显示画面时的显示质量。
下面结合图1和图2以及前面对所述阵列基板10的描述，对本发明的阵列基板的制备方法进行介绍。请一并参阅图3，图3为本发明一较佳实施方式的阵列基板的制备方法的流程图。所述阵列基板的制备方法包括但不仅限于以下步骤。
步骤S110，提供基板110。所述基板110可以为但不仅限于为玻璃基板或者为塑料基板等绝缘基板。
步骤S120，在所述基板110的第一表面111设置整层的第一金属层。所述第一金属层包括但不仅限于铝(Al)，钼(Mo)，铜(Cu)中的任意一种或者多种。所述第一金属层可以通过物理气相沉积(Physical Vapor Deposition，PVD)的方式形成，所述第一金属层的厚度可以为3000埃～6000埃。
步骤S130，图案化所述第一金属层，以形成多个沿第一方向D1延伸且沿第二方向D2间隔排布的栅极线200，以及设置在相邻的两条栅极线200之间的且间隔设置的栅极810、第一导电部710、与每个栅极线200对应且平行的公共电极线400以及与所述公共电极线400连接且朝远离所述栅极线200延伸的公共电极500。所述第一金属层的图案化可以通过掩膜板进行曝光，显影，蚀刻及玻璃的方式进行。
步骤S140，形成覆盖所述栅极810、所述第一导电部710、所述栅极线200、所述公共电极线400及所述公共电极500的第一绝缘层820。所述第一绝缘层820可以通过等离子体增强化学气相沉积法(Plasma Enhanced Chemical Vapor Deposition，PECVD)沉积一层膜厚为3000埃～6000埃的绝缘材料以形成所述第一绝缘层820，所述绝缘层材料可以为但不仅限于为氮化硅(SiNx)。
步骤S150，在所述第一绝缘层820远离所述基板110的表面形成与所述栅极810对应设置的沟道层830。具体地，所述步骤S150还包括如下步骤。
步骤S151，在所述第一绝缘层820远离所述基板110的表面形成整层的非晶硅层。所述非晶硅层可以通过等离子体增强化学气相沉积法形成膜厚为1500埃～3000埃的非晶硅材料以形成所述非晶硅层。
步骤S152，图案化所述非晶硅层，保留对应所述栅极810设置的所述非晶硅层。
步骤S153，对保留的所述非晶硅层的两端进行离子掺杂，以分别形成第一欧姆接触层870及第二欧姆接触层880，未进行离子掺杂的所述非晶硅层为所述沟道层830。在一实施方式中，所述离子掺杂为N型离子掺杂。
步骤S160，形成覆盖所述第一绝缘层820及所述沟道层830的第二金属层。所述第二金属层包括但不仅限于Al，Mo，Cu中的任意一种或者多种。所述第二金属层可以通过PVD的方式形成，所述第二金属层的厚度可以为3000埃～6000埃。
步骤S170，图案化所述第二金属层，以形成多个沿所述第二方向D2延伸且沿所述第一方向D1排布的数据线300，以及设置在相邻的两条数据线300之间且对应所述沟道层830两端设置的源极840及漏极850、与所述漏极850间隔的像素电极600、与所述第一导电部710对应的第二导电部720。所述第二金属层的图案化可以通过掩膜板进行曝光，显影，蚀刻及玻璃的方式进行。
步骤S180，形成覆盖所述沟道层830、所述源极840、所述漏极850、所述像素电极600、所述第二导电部720及所述数据线300的第二绝缘层860。所述第二绝缘层860可以通过PECVD沉积一层膜厚为2000埃～56000埃的绝缘材料以形成所述第二绝缘层860，所述绝缘层材料可以为但不仅限于为氮化硅(SiNx)。
所述薄膜晶体管阵列基板的制备方法还包括如下步骤。
步骤I，在所述第一绝缘层820上开设对应所述栅极线200的第一贯孔821，在所述第二绝缘层860上开设对应所述第一贯孔821的第二贯孔861及对应所述数据线300的第三贯孔862。
步骤II，在所述第二绝缘层860形成导电材料层。所述导电材料层为透明导电材料层，所述导电材料层可以为但不仅限于为氧化铟锡(Indium Tin Oxide，ITO)。所述导电材料层的厚度为400埃～1000埃。
步骤III，图案化所述导电材料层，保留对应所述第二贯孔861及所述第一贯孔821的导电材料层以及对应所述第三贯孔862的导电材料层，其中，对应所述第二贯孔861及所述第一贯孔821的导电材料层为栅极端子210，对应所述第三贯孔862的导电材料层为数据端子310。
相较于现有技术，本发明的阵列基板的制备方法将像素电极600与薄膜晶体管800中的源极840和漏极850在一制备工序中制备，节约了制备工序，且像素电极600为金属，可以反射入射至所述像素电极600的光线，因此，制备出的所述阵列基板所应用的液晶显示面板处于明亮的地方时，能够利用所述像素电极600反射的光线显示图像，从而提升液晶显示装置显示画面时的显示质量。
进一步地，所述公共电极线400和所述公共电极500与所述栅极810在同一制备工序中制备，节约了制备工序。且所述公共电极线400和所述公共电极500为金属层，分别用于反射入射至所述公共电极线400和所述公共电极500的光线，因此，在所述阵列基板10所应用的液晶显示面板处于明亮的地方时，能够利用所述像素电极600反射的光线显示图像，从而提升液晶显示装置显示画面时的显示质量。
进一步地，所述存储电容700的所述第一导电部710与所述栅极810在同一制备工序中制备，从而节约了制备工序。所述存储电容700的第二导电部720与所述源极840及所述漏极850在同一制备工序中制备，从而节约了制备工序。
以上所揭露的仅为本发明一种较佳实施例而已，当然不能以此来限定本发明之权利范围，本领域普通技术人员可以理解实现上述实施例的全部或部分流程，并依本发明权利要求所作的等同变化，仍属于发明所涵盖的范围。

Claims (9)

1.一种阵列基板，其特征在于，所述阵列基板包括基板及设置在所述基板同侧的多个栅极线及多个数据线，所述基板包括第一表面，所述多个栅极线设置在所述第一表面上，且所述多个栅极线向第一方向延伸且沿第二方向间隔排布，所述多个数据线与所述多个栅极线通过第一绝缘层绝缘设置，且所述多个数据线向所述第二方向延伸且沿所述第一方向间隔排布，所述阵列基板还包括多个公共电极线，所述多个公共电极线与所述多个栅极线平行，一个公共电极线设置于相邻的两个栅极线之间，且所述公共电极线与所述数据线通过所述第一绝缘层绝缘设置，相邻的两条栅极线及相邻的两条数据线之间限定一个像素区域，所述阵列基板还包括设置在所述像素区域内的薄膜晶体管，公共电极，像素电极及存储电容，所述薄膜晶体管包括栅极、所述第一绝缘层、沟道层、源极及漏极，所述栅极设置在所述第一表面上，所述公共电极与所述公共电极线电连接且所述公共电极与所述公共电极线设置在所述第一表面上，所述存储电容包括第一导电部及第二导电部，其中，所述第一导电部及所述第二导电部为金属层，所述第一导电部设置在所述第一表面上，所述第一导电部上设置所述第一绝缘层，所述第二导电部设置在所述第一绝缘层上且与所述第一导电部对应，所述沟道层、所述源极及所述漏极设置在所述第一绝缘层上且所述源极与所述漏极设置在所述沟道层相对的两端，所述像素电极设置在所述第一绝缘层上，且所述像素电极为金属层，用于反射入射至所述像素电极的光线，一第二绝缘层覆盖所述沟道层、所述源极、所述漏极、所述像素电极、所述第二导电部及所述数据线。
2.如权利要求1所述的阵列基板，其特征在于，所述公共电极线及所述公共电极为金属层，分别用于反射入射至所述公共电极线及所述公共电极的光线。
3.如权利要求1所述的阵列基板，其特征在于，所述薄膜晶体管还包括第一欧姆接触层，所述第一欧姆接触层设置在所述沟道层与所述源极之间，用于减小所述沟道层与所述源极之间的接触电阻。
4.如权利要求1所述的阵列基板，其特征在于，所述薄膜晶体管还包括第二欧姆接触层，所述第二欧姆接触层设置在所述沟道层与所述漏极之间，用于减小所述沟道层与所述漏极之间的接触电阻。
5.如权利要求1所述的阵列基板，其特征在于，所述第一绝缘层包括对应所述栅极线开设的第一贯孔，所述第二绝缘层包括对应所述第一贯孔开设的第二贯孔及对应所述数据线开设的第三贯孔，一栅极端子通过所述第一贯孔及所述第二贯孔电连接所述栅极线，一数据端子通过所述第三贯孔电连接所述数据线，其中，所述栅极端子及所述数据端子为导电的。
6.一种阵列基板的制备方法，其特征在于，所述阵列基板的制备方法包括：
提供基板；
在所述基板的第一表面设置整层的第一金属层；
图案化所述第一金属层，以形成多个沿第一方向延伸且沿第二方向间隔排布的栅极线，以及设置在相邻的两条栅极线之间的且间隔设置的栅极、第一导电部、与每个栅极线对应且平行的公共电极线以及与公共电极线连接且朝远离所述栅极线延伸的公共电极；
形成覆盖所述栅极、所述第一导电部、所述栅极线、所述公共电极线及所述公共电极的第一绝缘层，其中，所述第一导电部为金属层；
在所述第一绝缘层远离所述基板的表面形成与所述栅极对应设置的沟道层；
形成覆盖所述第一绝缘层及所述沟道层的第二金属层；
图案化所述第二金属层，以形成多个沿所述第二方向延伸且沿所述第一方向排布的数据线，以及设置在相邻的两条数据线之间且对应所述沟道层两端设置的源极及漏极、与所述漏极间隔的像素电极、与所述第一导电部对应的第二导电部，其中，所述第二导电部为金属层；
形成覆盖所述沟道层、所述源极、所述漏极、所述像素电极、所述第二导电部及所述数据线的第二绝缘层。
7.如权利要求6所述的阵列基板的制备方法，其特征在于，在所述步骤“在所述第一绝缘层远离所述基板的表面形成与所述栅极对应设置的沟道层”包括：
在所述第一绝缘层远离所述基板的表面形成整层的非晶硅层；
图案化所述非晶硅层，保留对应所述栅极设置的所述非晶硅层；
对保留的所述非晶硅层的两端进行离子掺杂，以分别形成第一欧姆接触层及第二欧姆接触层，未进行离子掺杂的所述非晶硅层为所述沟道层。
8.如权利要求6所述的阵列基板的制备方法，其特征在于，所述阵列基板的制备方法还包括：
在所述第一绝缘层上开设对应所述栅极线的第一贯孔，在所述第二绝缘层上开设对应所述第一贯孔的第二贯孔及对应所述数据线的第三贯孔；
在所述第二绝缘层形成导电材料层；
图案化所述导电材料层，保留对应所述第二贯孔及所述第一贯孔的导电材料层以及对应所述第三贯孔的导电材料层，其中，对应所述第二贯孔及所述第一贯孔的导电材料层为栅极端子，对应所述第三贯孔的导电材料层为数据端子。
9.如权利要求7所述的阵列基板的制备方法，其特征在于，所述离子掺杂为N型离子掺杂。
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