CN105577016B - SPM and air conditioner - Google Patents
SPM and air conditioner Download PDFInfo
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- CN105577016B CN105577016B CN201610126189.8A CN201610126189A CN105577016B CN 105577016 B CN105577016 B CN 105577016B CN 201610126189 A CN201610126189 A CN 201610126189A CN 105577016 B CN105577016 B CN 105577016B
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Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
Abstract
The invention provides a kind of SPM and air conditioner, the terminals for being respectively connecting to bridge arm signal input part under bridge arm signal input part and three-phase on three-phase, and the first port corresponding to current detecting end and the second port corresponding to PFC control signals are provided with HVIC pipes in SPM；The first input end of adaptive circuit and the second input are respectively connecting to first port and second port, the Enable Pin of the output end of adaptive circuit as HVIC pipes；Adaptive circuit exports the enable signal of corresponding level according to the magnitude relationship between the value of the input signal of first input end and the first setting value when IPM temperature is less than predetermined temperature value；And when IPM temperature is higher than predetermined temperature value, whether rising edge is according to the input signal of the second input, and the magnitude relationship between the value and the second setting value or the first setting value of the input signal of first input end exports the enable signal of corresponding level, the second setting value is more than the first setting value.
Description
Technical field
It is empty in particular to a kind of SPM and one kind the present invention relates to SPM technical field
Adjust device.
Background technology
SPM (Intelligent Power Module, abbreviation IPM) is a kind of by power electronics deviding device
The analog line driver that part and integrated circuit technique integrate, SPM include device for power switching and high drive
Circuit, and with failure detector circuits such as overvoltage, overcurrent and overheats.The logic input terminal of SPM receives master control
The control signal of device processed, output end driving compressor or subsequent conditioning circuit work, while the system status signal detected is sent back to
Master controller.Relative to traditional discrete scheme, SPM has high integration, high reliability, self-test and protection circuit
Etc. advantage, be particularly suitable for the frequency converter of motor and various inverters, be frequency control, metallurgical machinery, electric propulsion,
The desired power level electronic device of servo-drive, frequency-conversion domestic electric appliances.
The structural representation of existing Intelligent power module circuit as shown in figure 1, MTRIP ports as current detecting end,
To be protected according to the size of current detected to SPM 100.PFCIN ports are as SPM
PFC (Power Factor Correction, PFC) control signal.
In the SPM course of work, certain frequency frequent switching between low and high level is pressed at PFCINP ends, is made
IGBT pipes 127 are continuously on off state and FRD pipes 141 are continuously in freewheeling state, the frequency be generally LIN1~LIN3,
2~4 times of HIN1~HIN3 switching frequencies, and do not contacted directly with LIN1~LIN3, HIN1~HIN3 switching frequency.
As shown in Fig. 2 UN, VN, WN meet one end of milliohm resistance 138, another the termination GND, MTRIP of milliohm resistance 138
It is current detecting pin, connects one end of milliohm resistance 138, electric current is calculated by the pressure drop for detecting milliohm resistance, as shown in figure 3,
When current is excessive, SPM 100 is stopped, avoid after producing overheat because of excessively stream, to SPM 100
Produce permanent damage.
- VP, COM, UN, VN, WN have electrical connection in actual use.Therefore, 121~IGBT of IGBT pipes pipes 127 are opened
Current noise when voltage noise during pass and FRD 111~FRD of pipe pipes 116, FRD 131 afterflows of pipe can all intercouple, right
The input pin of each low-voltage area impacts.
In each input pin, HIN1~HIN3, LIN1~LIN3, PFCINP threshold value typically in 2.3V or so, and
ITRIP threshold voltage typically only has below 0.5V, and therefore, ITRIP is the pin for being most susceptible to interference.When ITRIP by
Triggering, SPM 100 will be stopped, and because excessively stream now really occurs, ITRIP now tactile
Hair belongs to false triggering.As shown in figure 4, it is high level in PFCIN, when IGBT pipes 127 open moment, because FRD pipes 131 is reverse
The presence of restoring current, is superimposed out I131Current waveform, the electric current has larger concussion noise, by-VP, COM, UN, VN,
Electrical connections of the WN in peripheral circuit, concussion noise close out certain voltage in MTRIP ends meeting lotus root and raised.If trigger MTRIP
Condition be：Voltage>Vth, and duration>Tth；In Fig. 4, if Ta<Tth<Tb is then too high in the voltage in first three cycle
It is insufficient to allow MTRIP to produce false triggering, to the 4th cycle, MTRIP will produce false triggering.
In fact, because the reverse recovery time of FRD pipes and reverse recovery current are positive temperature coefficients, temperature is higher, instead
It is longer to recovery time, so, with the continuous firing of system, the constant temperature of SPM 100 rises, MTRIP quilts
The probability of triggering is increasing, as shown in figure 5, at 25 DEG C, voltage pulsation caused by FRD Reverse recovery effect is not enough to draw
MTRIP triggerings are played, and as temperature raises, at 75 DEG C, MTRIP is triggered, and makes system stalls.Although this false triggering
It can recover to destroy without forming system over time, but undoubtedly user can be caused to perplex.Such as convertible frequency air-conditioner
The application scenario of device, it is exactly user when more need air-conditioning system continuous firing that environment temperature is higher, but high environment temperature
Can increase the reverse recovery time of FRD pipes, MTRIP is improved by the probability of false triggering, once MTRIP is by false triggering, air-conditioning system
System can make user can not during this period of time obtain cold wind, this is to make because being mistakenly considered to be stopped 3~5 minutes excessively stream occurs
Into air-conditioning system because refrigerating capacity deficiency is by one of the main reason for customer complaint.
Therefore, how to ensure that SPM can effectively reduce intelligence at normal temperatures on the premise of normal work
Power model turns into technical problem urgently to be resolved hurrily by the probability of false triggering at high temperature.
The content of the invention
It is contemplated that at least solves one of technical problem present in prior art or correlation technique.
Therefore, it is an object of the present invention to propose a kind of new SPM, intelligent work(can ensured
Rate module can effectively reduce SPM at high temperature by the several of false triggering at normal temperatures on the premise of normal work
Rate.
It is another object of the present invention to propose a kind of air conditioner.
To achieve the above object, embodiment according to the first aspect of the invention, it is proposed that a kind of SPM, bag
Include：Bridge arm signal input part, three-phase low reference voltage end, current detecting end and PFC under bridge arm signal input part, three-phase on three-phase
Control signal；HVIC (High Voltage Integrated Circuit, high voltage integrated circuit) is managed, on the HVIC pipes
The terminals for being respectively connecting to bridge arm signal input part under bridge arm signal input part and the three-phase on the three-phase are provided with, with
And the first port corresponding to the current detecting end and the second port corresponding to the PFC control signals, described first
Port is connected by connecting line with the current detecting end, and the second port passes through connecting line and the PFC control signals
It is connected；Sampling resistor, the three-phase low reference voltage end and the current detecting end are connected to the first of the sampling resistor
End, the second end of the sampling resistor is connected to the low-pressure area power supply negative terminal of the SPM；Adaptive circuit,
The power supply positive pole and negative pole of the adaptive circuit are respectively connecting to the low-pressure area power supply of the SPM
Anode and negative terminal, the first input end of the adaptive circuit are connected to the first port, and the second of the adaptive circuit
Input is connected to the second port, the Enable Pin of the output end of the adaptive circuit as the HVIC pipes；
Wherein, the adaptive circuit is when the temperature of the SPM is less than predetermined temperature value, according to described
Magnitude relationship between the value of the input signal of first input end and the first setting value exports the enable signal of corresponding level；It is described
Adaptive circuit is when the temperature of the SPM is higher than the predetermined temperature value, according to the defeated of second input
Enter signal and whether be in rising edge, and the value of the input signal of the first input end and the second setting value or described first set
Magnitude relationship between definite value exports the enable signal of corresponding level, and second setting value is more than first setting value.
SPM according to an embodiment of the invention, it is less than predetermined temperature value in the temperature of SPM
When, by the value of the input signal (i.e. first port, namely current detecting end) of the first input end according to adaptive circuit and
Magnitude relationship between first setting value exports the enable signal of corresponding level so that relatively low in the temperature of SPM
When, adaptive circuit can make a response according to the signal value that current detecting end detects, i.e., current detecting end detects
When signal value is larger, enable signal that timely output control HVIC pipes are stopped, the signal value that current detecting end detects compared with
Hour, the enable signal of output control HVIC pipes work, to ensure SPM in normal temperature (i.e. less than predetermined temperature value
When) under can normal work, and carry out overcurrent protection.
When the temperature of SPM is higher than predetermined temperature value, by according to the second input (i.e. second port,
That is PFC control signals) input signal whether be in rising edge, and the value of the input signal of first input end and second is set
Magnitude relationship between definite value or the first setting value exports the enable signal of corresponding level so that in the temperature of SPM
When higher, it is contemplated that the signal of PFC control signals input is in circuit noise caused by rising edge, while can be in PFC
The signal of control signal input is used as standard by the second larger setting value in rising edge (compared to the first setting value)
To determine whether enable signal that output control HVIC pipes are stopped, and then SPM can be effectively reduced in high temperature
By the probability of false triggering during lower work.
SPM according to the abovementioned embodiments of the present invention, there can also be following technical characteristic：
According to one embodiment of present invention, the adaptive circuit is less than described in the temperature of the SPM
During predetermined temperature value,
If the value of the input signal of the first input end is more than or equal to first setting value, the first level is exported
Enable signal, to forbid the HVIC pipes to work, and
If the value of the input signal of the first input end is less than first setting value, output second electrical level enables
Signal, to allow the HVIC pipes to work.
Wherein, the enable signal of the first level can be low level signal, and the enable signal of second electrical level can be high electricity
Ordinary mail number.
According to one embodiment of present invention, the adaptive circuit is higher than described in the temperature of the SPM
During predetermined temperature value,
When the input signal of second input be in it is non-increasing along when, if the input signal of the first input end
Value is more than or equal to first setting value, then exports the enable signal of first level；Otherwise, the second electrical level is exported
Enable signal, and
When the input signal of second input is in rising edge, if the value of the input signal of the first input end
More than or equal to second setting value and lasting scheduled duration, then the enable signal of first level is exported；Otherwise, export
The enable signal of the second electrical level.
According to one embodiment of present invention, the adaptive circuit includes：
The first NOT gate and the second NOT gate being connected in series, the input of first NOT gate is as the adaptive circuit
Second input, the output end of second NOT gate are connected to the first input end of the first NAND gate；
The 3rd NOT gate, the 4th NOT gate and the 5th NOT gate being connected in series, the input of the 3rd NOT gate are connected to described
The input of first NOT gate, the output end of the 5th NOT gate are connected to the second input of first NAND gate, and described
The output end of one NAND gate is connected to the input of the 6th NOT gate, and the output end of the 6th NOT gate is connected to the second NAND gate
First input end；
First electric capacity, be connected to the 4th NOT gate input and the adaptive circuit power supply negative pole it
Between；
Second electric capacity, be connected to the 5th NOT gate input and the adaptive circuit power supply negative pole it
Between；
First resistor, the first end of the first resistor is connected to the power supply positive pole of the adaptive circuit, described
Second end of first resistor is connected to the negative electrode of voltage-regulator diode, and the anode of the voltage-regulator diode is connected to the adaptive electricity
The power supply negative pole on road；
Second resistance, the first end of the second resistance are connected to the second end of the first resistor, the second resistance
The second end be connected to the positive input terminal of first voltage comparator；
Thermistor, the first end of the thermistor are connected to the second end of the second resistance, the thermistor
The second end be connected to the anode of the voltage-regulator diode；
First voltage source, the negative pole of the first voltage source are connected to the anode of the voltage-regulator diode, first electricity
The positive pole of potential source is connected to the negative input end of the first voltage comparator, and the output end of the first voltage comparator is connected to
Second input of second NAND gate, the output end of second NAND gate is connected to the input of the 7th NOT gate, described
The output end of 7th NOT gate is connected to the control terminal of analog switch；
Second voltage comparator, the positive input terminal of the second voltage comparator are first defeated as the adaptive circuit
Enter end, the negative input end of the second voltage comparator is connected to the positive pole of the second voltage source, the negative pole of the second voltage source
The power supply negative pole of the adaptive circuit is connected to, the output end of the second voltage comparator is connected to the simulation and opened
The first choice end of pass and the first input end of the 3rd NAND gate；
Tertiary voltage comparator, the positive input terminal of the tertiary voltage comparator are connected to the second voltage comparator
Positive input terminal, the negative input end of the tertiary voltage comparator are connected to the positive pole in tertiary voltage source, the tertiary voltage source
Negative pole is connected to the power supply negative pole of the adaptive circuit, and the output end of the tertiary voltage comparator is connected to described
Second input of three NAND gates；
4th voltage comparator, the positive input terminal of the 4th voltage comparator are connected to the second voltage comparator
Positive input terminal, the negative input end of the 4th voltage comparator are connected to the positive pole of the 4th voltage source, the 4th voltage source
Negative pole is connected to the power supply negative pole of the adaptive circuit, and the output end of the 4th voltage comparator is connected to described
3rd input of three NAND gates, the output end of the 3rd NAND gate are connected to the input of the 8th NOT gate, and the described 8th is non-
The output end of door is connected to the second selection end of the analog switch, and the fixing end of the analog switch is connected to the 9th NOT gate
Input, the output end of the output end of the 9th NOT gate as the adaptive circuit.
According to one embodiment of present invention, the signal output part of PFC drive circuits, institute are additionally provided with the HVIC pipes
Stating SPM also includes：
First power switch pipe and the first diode, the anode of first diode are connected to first power switch
The emitter stage of pipe, the negative electrode of first diode are connected to the colelctor electrode of first power switch pipe, first power
The colelctor electrode of switching tube is connected to the anode of the second diode, and the negative electrode of second diode is connected to the intelligent power mould
The high voltage input of block, the base stage of first power switch pipe are connected to the signal output part of the PFC drive circuits, institute
PFC low reference voltage end of the emitter stage as the SPM of the first power switch pipe is stated, first power is opened
Close PFC end of the colelctor electrode of pipe as the SPM.
Wherein, the first power switch pipe can be IGBT (Insulated Gate Bipolar Transistor, insulation
Grid bipolar transistor).
According to one embodiment of present invention, in addition to：Boostrap circuit, the boostrap circuit include：
First bootstrap diode, the anode of first bootstrap diode are connected to the low-pressure area of the SPM
Power supply anode, the negative electrode of first bootstrap diode are connected to the U phases higher-pressure region power supply electricity of the SPM
Source anode；Second bootstrap diode, the anode of second bootstrap diode are connected to the low-pressure area of the SPM
Power supply anode, the negative electrode of second bootstrap diode are connected to the V phases higher-pressure region power supply electricity of the SPM
Source anode；3rd bootstrap diode, the anode of the 3rd bootstrap diode are connected to the low-pressure area of the SPM
Power supply anode, the negative electrode of the 3rd bootstrap diode are connected to the W phases higher-pressure region power supply electricity of the SPM
Source anode.
According to one embodiment of present invention, in addition to：Bridge arm circuit on three-phase, it is every in bridge arm circuit on the three-phase
The input of bridge arm circuit is connected to the signal output part that phase is corresponded in the three-phase high-voltage area of the HVIC pipes in one phase；Under three-phase
Bridge arm circuit, the input of bridge arm circuit is connected to the three-phase of the HVIC pipes under each phase under the three-phase in bridge arm circuit
The signal output part of phase is corresponded in low-pressure area.
Wherein, bridge arm circuit includes on three-phase：Bridge arm circuit in U phases, bridge arm circuit in V phases, bridge arm circuit in W phases；Three
Bridge arm circuit includes under phase：Bridge arm circuit under bridge arm circuit, W phases under bridge arm circuit, V phases under U phases.
According to one embodiment of present invention, bridge arm circuit includes in each phase：Second power switch pipe and the 3rd
Diode, the anode of the 3rd diode are connected to the emitter stage of second power switch pipe, the 3rd diode
Negative electrode is connected to the colelctor electrode of second power switch pipe, and the colelctor electrode of second power switch pipe is connected to the intelligence
The high voltage input of power model, the input of the base stage of second power switch pipe as bridge arm circuit in each phase
End, the emitter stage of second power switch pipe, which is connected to the SPM and corresponds to the higher-pressure region power supply of phase, to be born
End.Wherein, the second power switch pipe can be IGBT.
According to one embodiment of present invention, bridge arm circuit includes under each phase：3rd power switch pipe and the 4th
Diode, the anode of the 4th diode are connected to the emitter stage of the 3rd power switch pipe, the 4th diode
Negative electrode is connected to the colelctor electrode of the 3rd power switch pipe, and the colelctor electrode of the 3rd power switch pipe is connected on corresponding
The anode of the 3rd diode in bridge arm circuit, the base stage of the 3rd power switch pipe is as bridge arm under each phase
The input of circuit, the emitter stage of the 3rd power switch pipe are joined as the low-voltage of the corresponding phase of the SPM
Examine end.Wherein, the 3rd power switch pipe can be IGBT.
According to one embodiment of present invention, the voltage of the high voltage input of the SPM is 300V.
According to one embodiment of present invention, the anode of each phase higher-pressure region power supply of the SPM and
Filter capacitor is connected between negative terminal.
Embodiment according to a second aspect of the present invention, it is also proposed that a kind of air conditioner, including：Any one embodiment as described above
Described in SPM.
The additional aspect and advantage of the present invention will be set forth in part in the description, and will partly become from the following description
Obtain substantially, or recognized by the practice of the present invention.
Brief description of the drawings
The above-mentioned and/or additional aspect and advantage of the present invention will become in the description from combination accompanying drawings below to embodiment
Substantially and it is readily appreciated that, wherein：
Fig. 1 shows the structural representation of the SPM in correlation technique；
Fig. 2 shows the external circuit schematic diagram of SPM；
Fig. 3 shows the waveform diagram that current signal triggering SPM is stopped；
Fig. 4 shows a kind of waveform diagram of noise caused by SPM in correlation technique；
Fig. 5 shows another waveform diagram of noise caused by SPM in correlation technique；
Fig. 6 shows the structural representation of SPM according to an embodiment of the invention；
Fig. 7 shows the internal structure schematic diagram of adaptive circuit according to an embodiment of the invention.
Embodiment
It is below in conjunction with the accompanying drawings and specific real in order to be more clearly understood that the above objects, features and advantages of the present invention
Mode is applied the present invention is further described in detail.It should be noted that in the case where not conflicting, the implementation of the application
Feature in example and embodiment can be mutually combined.
Many details are elaborated in the following description to facilitate a thorough understanding of the present invention, still, the present invention may be used also
To be different from other modes described here using other to implement, therefore, protection scope of the present invention is not by described below
Specific embodiment limitation.
Fig. 6 shows the structural representation of SPM according to an embodiment of the invention.
As shown in fig. 6, SPM according to an embodiment of the invention, including：HVIC pipes 1101 and adaptive electricity
Road 1105.
The VCC ends of HVIC pipes 1101 are general as low-pressure area power supply the anode VDD, VDD of SPM 1100
For 15V；
Inside HVIC pipes 1101：
ITRIP ends connect the first input end of adaptive circuit 1105；The of PININP ends connection adaptive circuit 1105
Two inputs；VCC ends connect the power supply anode of adaptive circuit 1105；GND ends connect the power supply of adaptive circuit 1105
Power supply negative terminal；The output end of adaptive circuit 1105 is designated as ICON, for controlling HIN1~HIN3, LIN1~LIN3, PFCINP
The validity of signal.
The inside of HVIC pipes 1101 also has boostrap circuit structure as follows：
VCC ends are connected with the anode of bootstrap diode 1102, bootstrap diode 1103, bootstrap diode 1104；Bootstrapping two
The negative electrode of pole pipe 1102 is connected with the VB1 of HVIC pipes 1101；The VB2 phases of the negative electrode of bootstrap diode 1103 and HVIC pipes 1101
Even；The negative electrode of bootstrap diode 1104 is connected with the VB3 of HVIC pipes 1101.
The HIN1 ends of HVIC pipes 1101 are bridge arm signal input part UHIN in the U phases of SPM 1100；HVIC is managed
1101 HIN2 ends are bridge arm signal input part VHIN in the V phases of SPM 1100；The HIN3 ends of HVIC pipes 1101 are
Bridge arm signal input part WHIN in the W phases of SPM 1100；The LIN1 ends of HVIC pipes 1101 are SPM
Bridge arm signal input part ULIN under 1100 U phases；The LIN2 ends of HVIC pipes 1101 are bridge arm under the V phases of SPM 1100
Signal input part VLIN；The LIN3 ends of HVIC pipes 1101 are bridge arm signal input part WLIN under the W phases of SPM 1100；
The ITRIP ends of HVIC pipes 1101 are the MTRIP ends of SPM 1100；The PFCINP ends of HVIC pipes 1101 are as intelligent work(
The PFC control signals PFCIN of rate module 100；The GND ends of HVIC pipes 1101 supply as the low-pressure area of SPM 1100
Electric power supply negative terminal COM.Wherein, SPM 1100 the tunnel of UHIN, VHIN, WHIN, ULIN, VLIN, WLIN six input and
PFCIN ends receive 0V or 5V input signal.
One end of the VB1 ends connection electric capacity 1131 of HVIC pipes 1101, and as the U phases higher-pressure region of SPM 1100
Power supply anode UVB；The HO1 ends of HVIC pipes 1101 are connected with the grid of bridge arm IGBT pipes 1121 in U phases；HVIC pipes 1101
VS1 ends and colelctor electrode, the FRD pipes 1114 of bridge arm IGBT pipes 1124 under the emitter-base bandgap grading of IGBT pipes 1121, the anode of FRD pipes 1111, U phases
Negative electrode, the other end of electric capacity 1131 be connected, and as the U phases higher-pressure region power supply negative terminal UVS of SPM 1100.
One end of the VB2 ends connection electric capacity 1132 of HVIC pipes 1101, and as the V phases higher-pressure region of SPM 1100
Power supply anode VVB；The HO2 ends of HVIC pipes 1101 are connected with the grid of bridge arm IGBT pipes 1123 in V phases；HVIC pipes 1101
VS2 ends and colelctor electrode, the FRD pipes 1115 of bridge arm IGBT pipes 1125 under the emitter-base bandgap grading of IGBT pipes 1122, the anode of FRD pipes 1112, V phases
Negative electrode, the other end of electric capacity 1132 be connected, and as the V phases higher-pressure region power supply negative terminal VVS of SPM 1100.
One end of the VB3 ends connection electric capacity 1133 of HVIC pipes 1101, the W phases higher-pressure region as SPM 1100 supplies
Electric power positive end WVB；The HO3 ends of HVIC pipes 1101 are connected with the grid of bridge arm IGBT pipes 1123 in W phases；HVIC pipes 1101
VS3 ends and colelctor electrode, the FRD pipes 1116 of bridge arm IGBT pipes 1126 under the emitter-base bandgap grading of IGBT pipes 1123, the anode of FRD pipes 1113, W phases
Negative electrode, the other end of electric capacity 1133 be connected, and as the W phases higher-pressure region power supply negative terminal WVS of SPM 1100.
The LO1 ends of HVIC pipes 1101 are connected with the grid of IGBT pipes 1124；The LO2 ends of HVIC pipes 1101 and IGBT pipes 1125
Grid be connected；The LO3 ends of HVIC pipes 1101 are connected with the grid of IGBT pipes 1126；The emitter-base bandgap grading of IGBT pipes 1124 is managed with FRD
1114 anode is connected, and as the U phase low reference voltages end UN of SPM 1100；The emitter-base bandgap grading of IGBT pipes 1125 with
The anode of FRD pipes 1115 is connected, and as the V phase low reference voltages end VN of SPM 1100；IGBT pipes 1126 are penetrated
Pole is connected with the anode of FRD pipes 1116, and as the W phase low reference voltages end WN of SPM 1100.
VDD is the power supply anode of HVIC pipes 1101, and GND is the power supply negative terminal of HVIC pipes 1101；VDD-GND voltages
Generally 15V；VB1 and VS1 is respectively the positive pole and negative pole of the power supply of U phases higher-pressure region, and HO1 is the output end of U phases higher-pressure region；
VB2 and VS2 is respectively the positive pole and negative pole of the power supply of V phases higher-pressure region, and HO2 is the output end of V phases higher-pressure region；VB3 and VS3 difference
For the positive pole and negative pole of the power supply of U phases higher-pressure region, HO3 is the output end of W phases higher-pressure region；LO1, LO2, LO3 are respectively U phases, V
The output end of phase, W phase low-pressure areas.
The PFCO ends of HVIC pipes 1101 are connected with the grid of IGBT pipes 1127；The emitter-base bandgap grading of IGBT pipes 1127 and FRD pipes 1117
Anode be connected, and as the PFC low reference voltages end-VP of SPM 1100；The colelctor electrode and FRD of IGBT pipes 1127
Negative electrode, the anode of FRD pipes 1141 of pipe 1117 are connected, and as the PFC ends of SPM 1100；
The colelctor electrode of IGBT pipes 1121, the negative electrode of FRD pipes 1111, the colelctor electrode of IGBT pipes 1122, the moon of FRD pipes 1112
Pole, the colelctor electrode of IGBT pipes 1123, the negative electrode of FRD pipes 1113, the negative electrode of FRD pipes 1141 are connected, and are used as SPM
1100 high voltage input P, P typically meets 300V.
The effect of HVIC pipes 1101 is：
When ICON is high level, the 0 of input HIN1, HIN2, HIN3 or 5V logic input signal are passed to respectively
Output end HO1, HO2, HO3, LIN1, LIN2, LIN3 signal are passed into output end LO1, LO2, LO3 respectively, by PFCINP's
Signal passes to output end PFCO, and wherein HO1 is that VS1 or VS1+15V logic output signal, HO2 are patrolling for VS2 or VS2+15V
Volume output signal, HO3 are VS3 or VS3+15V logic output signal, and LO1, LO2, LO3, PFCO are 0 or 15V logic output
Signal；
When ICON is low level, HO1, HO2, HO3, LO1, LO2, LO3, PFCO are all set to low level.
The effect of adaptive circuit 1105 is：
When temperature is less than a certain particular temperature value T1, if ITRIP real time value is more than or equal to a certain specific voltage
Value V1, then ICON export low level, otherwise ICON export high level；
When temperature is higher than a certain particular temperature value T1, PFCINP non-increasing edge and PFCINP rising edge the two
Different conditions, it is different to the processing method of ITRIP live signals, specifically：On PFCINP non-increasing edge, if ITRIP reality
When numerical value be more than or equal to a certain particular voltage level V1, then ICON export low level, otherwise ICON export high level；In PFCINP
Rising edge, if ITRIP real time value is more than or equal to a certain particular voltage level V2 more than V1 and continues for some time t1,
Then ICON exports low level, and otherwise ICON exports high level.
In one embodiment of the invention, the particular circuit configurations schematic diagram of adaptive circuit 1105 is as shown in fig. 7, tool
Body is：
The input of PFCINP connections NOT gate 2001 and NOT gate 2003；The output end of NOT gate 2001 connects the defeated of NOT gate 2002
Enter end；One end of output end connection electric capacity 2008 of NOT gate 2003 and the input of NOT gate 2004；The output end of NOT gate 2004 connects
Connect one end of electric capacity 2009 and the input of NOT gate 2005；Another termination GND of electric capacity 2008；Another termination of electric capacity 2009
GND；
One of input of the output termination NAND gate 2006 of NOT gate 2002；The output termination NAND gate of NOT gate 2005
2006 another input；The input of the output end NAND gate 2007 of NAND gate 2006 is connected；The output end of NOT gate 2007
Connect one of input of NAND gate 2017；
One termination VCC of resistance 2016；One end of another terminating resistor 2013 of resistance 2016 and voltage-regulator diode 2011
Negative electrode；Another termination PTC (Positive Temperature Coefficient, positive temperature coefficient) resistance of resistance 2013
2012 one end, the positive input terminal of voltage comparator 2015；Another termination GND of voltage-regulator diode 2011；PTC resistor 2012
Another termination GND；The anode of the negative input termination voltage source 2014 of voltage comparator 2015；The negative terminal of voltage source 2014 meets GND；
Another input of the output termination NAND gate 2017 of voltage comparator 2015；The output termination NOT gate 2027 of NAND gate 2017
Input；The control terminal of the output termination analog switch 2022 of NOT gate 2027；
ITRIP connects the positive input terminal of voltage comparator 2010, the positive input terminal of voltage comparator 2023, voltage comparator
2024 positive input terminal；The anode of the negative input termination voltage source 2018 of voltage comparator 2010；The negative terminal of voltage source 2018 connects
GND；
The anode of the negative input termination voltage source 2019 of voltage comparator 2023；The negative terminal of voltage source 2019 meets GND；Voltage
The anode of the negative input termination voltage source 2021 of comparator 2024；The negative terminal of voltage source 2021 meets GND；
0 choosing of the one of input and analog switch 2022 of the output termination NAND gate 2025 of voltage comparator 2010
Select end；One of input of the output termination NAND gate 2025 of voltage comparator 2023；The output of voltage comparator 2024
Terminate last input of NAND gate 2025；
The input of the output termination NOT gate 2026 of NAND gate 2025；The output termination analog switch 2022 of NOT gate 2026
1 selection end；The input of the fixed termination NOT gate 2020 of analog switch 2022；The output end of NOT gate 2020 is as ICON.
Illustrate the operation principle and key parameter value of above-described embodiment below：
In PFCINP rising edge, A points produce a pulse, and the width of the pulse is by NOT gate 2003, NOT gate 2004, NOT gate
2005 and electric capacity 2008, electric capacity 2009 value determine.
Wherein, NOT gate 2003 can choose the minimum dimension of technique permission, and NOT gate 2004, NOT gate 2005 are it is contemplated that choose
The value of allow 2 times of minimum dimension of technique, electric capacity 2008 and electric capacity 2009 is in 10pF~20pF, so, caused by A points
The pulse width of pulse is 400ns~550ns.
The clamp voltage design of voltage-regulator diode 2011 is 6.4V, and resistance 2016 is designed as 20k Ω, then produces one in B points
The 6.4V voltages not influenceed with VCC voltage pulsations of individual stabilization；PTC resistor 2012 is designed as 10k Ω at 25 DEG C, 20k at 100 DEG C
Ω；Resistance 2013 is designed as 44k Ω, and voltage source 2014 is designed as 2V, then below 100 DEG C, voltage comparator 2015 exports low
Level, more than 100 DEG C, voltage comparator 2015 exports high level.
So as to which and if only if, temperature is more than 100 DEG C and the preceding 400ns~550ns to be arrived in PFCINP rising edges, NOT gate
2027 export high level, and otherwise NOT gate 2027 exports low level.
Voltage source 2018 is designed as 0.5V, and voltage source 2019 is designed as 0.6V, and voltage source 2021 is designed as 0.7V；
When NOT gate 2027 exports low level, ITRIP voltage is with the voltage ratio of voltage source 2018 compared with when ITIRP voltages>
During 0.5V, voltage comparator 2010 exports high level and ICON is produced low level control SPM and is stopped；
When NOT gate 2027 exports high level, ITRIP is simultaneously with 0.5V, 0.6V, 0.7V voltage ratio compared with because voltage exists
It is incremented by, ITRIP voltage reaches 0.5V, it is necessary to which persistently rising a period of time can be only achieved 0.7V, therefore, even if ITRIP electricity
Pressure>0.5V, also to continue for some time can just make voltage comparator 2010, voltage comparator 2023, voltage comparator 2024 all
Output high level makes NAND gate 2025 export low level, and this duration is depending on the ITRIP rate of rise.NAND gate
2025 and allow 4 times of minimum dimension of the taking technique of NOT gate 2026,60~100ns delay can be produced, so as to add ICON
To ITRIP response time.
From the technical scheme of above-described embodiment, SPM of the invention and existing SPM are complete
Compatibility, directly it can be replaced with existing SPM.It is anti-because of FRD pipes 1117 (as shown in Figure 6) in normal temperature
Limited to recovery time, ITRIP monitoring voltage is more much bigger than noise voltage, and signal to noise ratio is sufficiently large, voltages of the ICON to ITRIP
Make a response in real time, be advantageous to protect SPM；It is reverse with FRD pipes 1117 when module is in high temperature
Recovery time increases, and ITRIP voltage noise and ITRIP detection voltage superposition are coupled to from ground wire, is detected at ITRIP ends
One bigger voltage and after the longer duration, ICON just make a response and can greatly reduce SPM and miss
The probability of action, ensure SPM normal work, this is satisfied with for maintaining the stability of a system and providing the user of product
Degree greatly facilitates effect.
Technical scheme is described in detail above in association with accompanying drawing, the present invention proposes a kind of new intelligent power mould
Block, it can effectively be reduced SPM at normal temperatures on the premise of normal work and exist ensuring SPM
By the probability of false triggering under high temperature.
The preferred embodiments of the present invention are the foregoing is only, are not intended to limit the invention, for the skill of this area
For art personnel, the present invention can have various modifications and variations.Within the spirit and principles of the invention, that is made any repaiies
Change, equivalent substitution, improvement etc., should be included in the scope of the protection.
Claims (7)
- A kind of 1. SPM, it is characterised in that including：Bridge arm signal input part under bridge arm signal input part, three-phase on three-phase, three-phase low reference voltage end, current detecting end and PFC control signals；HVIC is managed, and is provided with the HVIC pipes and is respectively connecting on the three-phase bridge under bridge arm signal input part and the three-phase The terminals of arm signal input part, and it is corresponding to the first port at the current detecting end and defeated corresponding to PFC controls Enter the second port at end, the first port is connected by connecting line with the current detecting end, and the second port passes through company Wiring is connected with the PFC control signals；Sampling resistor, the three-phase low reference voltage end and the current detecting end are connected to the first of the sampling resistor End, the second end of the sampling resistor is connected to the low-pressure area power supply negative terminal of the SPM；Adaptive circuit, the power supply positive pole and negative pole of the adaptive circuit are respectively connecting to the SPM Low-pressure area power supply anode and negative terminal, the first input end of the adaptive circuit are connected to the first port, it is described from Second input of adaptive circuit is connected to the second port, and the output end of the adaptive circuit is as the HVIC pipes Enable Pin；Wherein, the adaptive circuit is when the temperature of the SPM is less than predetermined temperature value, according to described first Magnitude relationship between the value of the input signal of input and the first setting value exports the enable signal of corresponding level；It is described adaptive Circuit is answered when the temperature of the SPM is higher than the predetermined temperature value, is believed according to the input of second input Number whether it is in rising edge, and the value of the input signal of the first input end and the second setting value or first setting value Between magnitude relationship export the enable signal of corresponding level, second setting value is more than first setting value；The adaptive circuit when the temperature of the SPM is less than the predetermined temperature value,If the value of the input signal of the first input end is more than or equal to first setting value, making for the first level is exported Energy signal, to forbid the HVIC pipes to work, andIf the value of the input signal of the first input end is less than first setting value, the enabled letter of second electrical level is exported Number, to allow the HVIC pipes to work；The adaptive circuit when the temperature of the SPM is higher than the predetermined temperature value,When second input input signal be in it is non-increasing along when, if the value of the input signal of the first input end is big In or equal to first setting value, then the enable signal of first level is exported；Otherwise, making for the second electrical level is exported Energy signal, andWhen the input signal of second input is in rising edge, if the value of the input signal of the first input end is more than Or equal to second setting value and lasting scheduled duration, then export the enable signal of first level；Otherwise, described in output The enable signal of second electrical level；The adaptive circuit includes：The first NOT gate and the second NOT gate being connected in series, the input of first NOT gate as the adaptive circuit second Input, the output end of second NOT gate are connected to the first input end of the first NAND gate；The 3rd NOT gate, the 4th NOT gate and the 5th NOT gate being connected in series, the input of the 3rd NOT gate are connected to described first The input of NOT gate, the output end of the 5th NOT gate are connected to the second input of first NAND gate, described first with The output end of NOT gate is connected to the input of the 6th NOT gate, and the output end of the 6th NOT gate is connected to the first of the second NAND gate Input；First electric capacity, it is connected between the input of the 4th NOT gate and the power supply negative pole of the adaptive circuit；Second electric capacity, it is connected between the input of the 5th NOT gate and the power supply negative pole of the adaptive circuit；First resistor, the first end of the first resistor are connected to the power supply positive pole of the adaptive circuit, and described first Second end of resistance is connected to the negative electrode of voltage-regulator diode, and the anode of the voltage-regulator diode is connected to the adaptive circuit Power supply negative pole；Second resistance, the first end of the second resistance are connected to the second end of the first resistor, and the of the second resistance Two ends are connected to the positive input terminal of first voltage comparator；Thermistor, the first end of the thermistor are connected to the second end of the second resistance, and the of the thermistor Two ends are connected to the anode of the voltage-regulator diode；First voltage source, the negative pole of the first voltage source are connected to the anode of the voltage-regulator diode, the first voltage source Positive pole be connected to the negative input end of the first voltage comparator, the output end of the first voltage comparator is connected to described Second input of the second NAND gate, the output end of second NAND gate are connected to the input of the 7th NOT gate, and the described 7th The output end of NOT gate is connected to the control terminal of analog switch；Second voltage comparator, the positive input terminal of the second voltage comparator input as the first of the adaptive circuit End, the negative input end of the second voltage comparator are connected to the positive pole of the second voltage source, and the negative pole of the second voltage source connects The power supply negative pole of the adaptive circuit is connected to, the output end of the second voltage comparator is connected to the analog switch First choice end and the 3rd NAND gate first input end；Tertiary voltage comparator, the positive input terminal of the tertiary voltage comparator are connected to the just defeated of the second voltage comparator Enter end, the negative input end of the tertiary voltage comparator is connected to the positive pole in tertiary voltage source, the negative pole in the tertiary voltage source Be connected to the power supply negative pole of the adaptive circuit, the output end of the tertiary voltage comparator be connected to the described 3rd with Second input of NOT gate；4th voltage comparator, the positive input terminal of the 4th voltage comparator are connected to the just defeated of the second voltage comparator Enter end, the negative input end of the 4th voltage comparator is connected to the positive pole of the 4th voltage source, the negative pole of the 4th voltage source Be connected to the power supply negative pole of the adaptive circuit, the output end of the 4th voltage comparator be connected to the described 3rd with 3rd input of NOT gate, the output end of the 3rd NAND gate are connected to the input of the 8th NOT gate, the 8th NOT gate Output end is connected to the second selection end of the analog switch, and the fixing end of the analog switch is connected to the input of the 9th NOT gate End, the output end of the output end of the 9th NOT gate as the adaptive circuit.
- 2. SPM according to claim 1, it is characterised in that PFC drivings are additionally provided with the HVIC pipes The signal output part of circuit, the SPM also include：First power switch pipe and the first diode, the anode of first diode are connected to first power switch pipe Emitter stage, the negative electrode of first diode are connected to the colelctor electrode of first power switch pipe, first power switch The colelctor electrode of pipe is connected to the anode of the second diode, and the negative electrode of second diode is connected to the SPM High voltage input, the base stage of first power switch pipe are connected to the signal output part of the PFC drive circuits, and described PFC low reference voltage end of the emitter stage of one power switch pipe as the SPM, first power switch pipe PFC end of the colelctor electrode as the SPM.
- 3. SPM according to claim 1 or 2, it is characterised in that also include：Boostrap circuit, the bootstrapping Circuit includes：First bootstrap diode, the anode of first bootstrap diode are connected to the low-pressure area power supply of the SPM Power positive end, the negative electrode of first bootstrap diode are being connected to the U phases higher-pressure region power supply of the SPM just End；Second bootstrap diode, the anode of second bootstrap diode are connected to the low-pressure area power supply of the SPM Power positive end, the negative electrode of second bootstrap diode are being connected to the V phases higher-pressure region power supply of the SPM just End；3rd bootstrap diode, the anode of the 3rd bootstrap diode are connected to the low-pressure area power supply of the SPM Power positive end, the negative electrode of the 3rd bootstrap diode are being connected to the W phases higher-pressure region power supply of the SPM just End.
- 4. SPM according to claim 1 or 2, it is characterised in that also include：Bridge arm circuit on three-phase, the input of bridge arm circuit is connected to described in each phase on the three-phase in bridge arm circuit The signal output part of phase is corresponded in the three-phase high-voltage area of HVIC pipes；Bridge arm circuit under three-phase, the input of bridge arm circuit is connected to described under each phase under the three-phase in bridge arm circuit The signal output part of phase is corresponded in the three-phase low-voltage area of HVIC pipes.
- 5. SPM according to claim 4, it is characterised in that bridge arm circuit includes in each phase：Second power switch pipe and the 3rd diode, the anode of the 3rd diode are connected to second power switch pipe Emitter stage, the negative electrode of the 3rd diode are connected to the colelctor electrode of second power switch pipe, second power switch The colelctor electrode of pipe is connected to the high voltage input of the SPM, and the base stage of second power switch pipe is as institute The input of bridge arm circuit in each phase is stated, the emitter stage of second power switch pipe is connected to the SPM pair Answer the higher-pressure region power supply negative terminal of phase.
- 6. SPM according to claim 5, it is characterised in that bridge arm circuit includes under each phase：3rd power switch pipe and the 4th diode, the anode of the 4th diode are connected to the 3rd power switch pipe Emitter stage, the negative electrode of the 4th diode are connected to the colelctor electrode of the 3rd power switch pipe, the 3rd power switch The colelctor electrode of pipe is connected to the anode of the 3rd diode in corresponding upper bridge arm circuit, the 3rd power switch pipe Input of the base stage as bridge arm circuit under each phase, the emitter stage of the 3rd power switch pipe is as the intelligent work( The low reference voltage end of the corresponding phase of rate module.
- A kind of 7. air conditioner, it is characterised in that including：SPM as any one of claim 1 to 6.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610126189.8A CN105577016B (en) | 2016-03-04 | 2016-03-04 | SPM and air conditioner |
| PCT/CN2016/097729 WO2017092448A1 (en) | 2015-11-30 | 2016-08-31 | Intelligent power module and air conditioner |
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|---|---|---|---|
| CN201610126189.8A CN105577016B (en) | 2016-03-04 | 2016-03-04 | SPM and air conditioner |
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| CN105577016B true CN105577016B (en) | 2017-12-19 |
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| WO2017092448A1 (en) * | 2015-11-30 | 2017-06-08 | 广东美的制冷设备有限公司 | Intelligent power module and air conditioner |
| CN105871190A (en) * | 2016-05-24 | 2016-08-17 | 深圳市鑫宇鹏电子科技有限公司 | Adaptive IPM (intelligent power module) with enhanced anti-static protection capacity |
| CN105896954B (en) * | 2016-05-24 | 2019-06-07 | 深圳市鑫宇鹏电子科技有限公司 | A kind of intelligent power module of adaptive antistatic enhancing |
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| US8044674B2 (en) * | 2009-11-06 | 2011-10-25 | Infineon Technologies Ag | Semiconductor device with thermal fault detection |
| CN202906834U (en) * | 2012-10-19 | 2013-04-24 | 华车（北京）交通装备有限公司 | Track traffic vehicle air-conditioning frequency converter based on digital signal processor (DSP) |
| CN205453538U (en) * | 2016-03-04 | 2016-08-10 | 广东美的制冷设备有限公司 | Intelligence power module and air conditioner |
| CN105356785B (en) * | 2015-11-30 | 2017-12-12 | 重庆美的制冷设备有限公司 | SPM and air conditioner |
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