CN105577017B - SPM and air conditioner - Google Patents
SPM and air conditioner Download PDFInfo
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- CN105577017B CN105577017B CN201610126190.0A CN201610126190A CN105577017B CN 105577017 B CN105577017 B CN 105577017B CN 201610126190 A CN201610126190 A CN 201610126190A CN 105577017 B CN105577017 B CN 105577017B
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
- H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
- H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Power Conversion In General (AREA)
- Inverter Devices (AREA)
Abstract
The invention provides a kind of SPM and air conditioner, the first port corresponding to current detecting end and the second port corresponding to PFC control signals are provided with the HVIC pipes in SPM；The first of adaptive circuit to the 3rd input is respectively connecting to bridge arm signal input part on three-phase, 4th to the 6th input is respectively connecting to bridge arm signal input part under three-phase, 7th input is connected to second port, 8th input is connected to first port, Enable Pin of the output end as HVIC pipes；Adaptive circuit is when the input signal of the first to the 7th input is all low level, according to the corresponding level signal of relation output between the input signal of the 8th input and the first setting value；When the input signal of at least one input is high level in the first to the 7th input, according to the corresponding level signal of relation output between the temperature of SPM, the input signal of the 8th input and the second setting value, the second setting value is more than the first setting value.
Description
Technical field
It is empty in particular to a kind of SPM and one kind the present invention relates to SPM technical field
Adjust device.
Background technology
SPM (Intelligent Power Module, abbreviation IPM) is a kind of by power electronics deviding device
The analog line driver that part and integrated circuit technique integrate, SPM include device for power switching and high drive
Circuit, and with failure detector circuits such as overvoltage, overcurrent and overheats.The logic input terminal of SPM receives master control
The control signal of device processed, output end driving compressor or subsequent conditioning circuit work, while the system status signal detected is sent back to
Master controller.Relative to traditional discrete scheme, SPM has high integration, high reliability, self-test and protection circuit
Etc. advantage, be particularly suitable for the frequency converter of motor and various inverters, be frequency control, metallurgical machinery, electric propulsion,
The desired power level electronic device of servo-drive, frequency-conversion domestic electric appliances.
The structural representation of existing Intelligent power module circuit as shown in figure 1, MTRIP ports as current detecting end,
To be protected according to the size of current detected to SPM 100.PFCIN ports are as SPM
PFC (Power Factor Correction, PFC) control signal.
In the SPM course of work, certain frequency frequent switching between low and high level is pressed at PFCINP ends, is made
IGBT pipes 127 are continuously on off state and FRD pipes 131 are continuously in freewheeling state, the frequency be generally LIN1~LIN3,
2~4 times of HIN1~HIN3 switching frequencies, and do not contacted directly with LIN1~LIN3, HIN1~HIN3 switching frequency.
ITRIP is current detecting end, typically by milliohm resistance eutral grounding, calculates electricity by the pressure drop for detecting milliohm resistance
Stream, when current is excessive, makes SPM 100 be stopped, and avoids after producing overheat because of excessively stream, to SPM
100 produce permanent damage.
- VP, COM, UN, VN, WN have electrical connection in actual use.Therefore, 121~IGBT of IGBT pipes pipes 127 are opened
Current noise when voltage noise during pass and FRD 111~FRD of pipe pipes 116, FRD 131 afterflows of pipe can all intercouple, right
The input pin of each low-voltage area impacts.
In each input pin, HIN1~HIN3, LIN1~LIN3, PFCINP threshold value typically in 2.3V or so, and
ITRIP threshold voltage typically only has below 0.5V, and therefore, ITRIP is the pin for being most susceptible to interference.When ITRIP by
Triggering, SPM 100 will be stopped, and because excessively stream now really occurs, ITRIP now tactile
Hair belongs to false triggering.
In general, the reverse recovery current spike of FRD pipes 111~116, FRD pipes 141 in Reverse recovery is coupled to ground
Voltage noise on line is easiest to cause such a false triggering.
As shown in Fig. 2 when HIN1~HIN3, LIN1~LIN3, PFCINP are high level, make respectively FRD pipes 114~
116th, FRD pipes 111~113, FRD pipes 141 produce reverse recovery current spike, and MTRIP ends produce voltage noise therewith, general next
Say, the duration of spike is longer, and reverse recovery time is longer, and MTRIP noise duration is longer, and the peak value of spike is got over
Greatly, i.e., reverse recovery current is bigger, and MTRIP noise amplitude is bigger.Also, because FRD pipes reverse recovery time and reversely
Restoring current increases against the rise of temperature.
If the condition for triggering MTRIP is：Voltage>Vth, and duration>Tth；In fig. 2, if Ta<Tth<Tb, then
At 25 DEG C, the reverse recovery current of FRD pipes is insufficient to allow MTRIP to produce false triggering, at 75 DEG C, first three week of FRD pipes
The high voltage duration of phase too it is short be insufficient to allow MTRIP produce false triggering, to the 4th cycle, MTRIP will produce false triggering.
The length of the reverse recovery time of FRD pipes is relevant with temperature, and temperature is higher, and reverse recovery time is longer.Also,
When temperature is higher, when usually the Converting Unit of SPM and power correction section switch more frequent, institute
Being risen with the constant temperature with the continuous firing of system, SPM 100, the probability that MTRIP is triggered is increasing,
In some severe application scenarios, false triggering is eventually produced, makes system stalls.Although this false triggering is in a period of time
After can recover to destroy without forming system, but undoubtedly user can be caused to perplex.Such as the applied field of transducer air conditioning
Close, it is exactly user when more need air-conditioning system continuous firing that environment temperature is higher, but high environment temperature can make FRD pipes
Reverse recovery time increases, and MTRIP is improved by the probability of false triggering, once MTRIP can be because being mistakenly considered by false triggering, air-conditioning system
Generation excessively stream and be stopped 3~5 minutes, user can not be during this period of time obtained cold wind, this be cause air-conditioning system because
Refrigerating capacity deficiency is by one of the main reason for customer complaint.
Therefore, how to ensure that SPM can effectively reduce intelligence at normal temperatures on the premise of normal work
Power model turns into technical problem urgently to be resolved hurrily by the probability of false triggering at high temperature.
The content of the invention
It is contemplated that at least solves one of technical problem present in prior art or correlation technique.
Therefore, it is an object of the present invention to propose a kind of new SPM, intelligent work(can ensured
Rate module can effectively reduce SPM at high temperature by the several of false triggering at normal temperatures on the premise of normal work
Rate.
It is another object of the present invention to propose a kind of air conditioner.
To achieve the above object, embodiment according to the first aspect of the invention, it is proposed that a kind of SPM, bag
Include：Bridge arm signal input part, three-phase low reference voltage end, current detecting end and PFC under bridge arm signal input part, three-phase on three-phase
Control signal；HVIC (High Voltage Integrated Circuit, high voltage integrated circuit) is managed, on the HVIC pipes
The terminals for being respectively connecting to bridge arm signal input part under bridge arm signal input part and the three-phase on the three-phase are provided with, with
And the first port corresponding to the current detecting end and the second port corresponding to the PFC control signals, described first
Port is connected by connecting line with the current detecting end, and the second port passes through connecting line and the PFC control signals
It is connected；Sampling resistor, the three-phase low reference voltage end and the current detecting end are connected to the first of the sampling resistor
End, the second end of the sampling resistor is connected to the low-pressure area power supply negative terminal of the SPM；Adaptive circuit,
The power supply positive pole and negative pole of the adaptive circuit are respectively connecting to the low-pressure area power supply of the SPM
Anode and negative terminal, the first input end of the adaptive circuit, the second input and the 3rd input are respectively connecting to described three
Corresponding end in phase in bridge arm signal input part, the 4th input, the 5th input and the 6th input of the adaptive circuit
End is respectively connecting to the corresponding end under the three-phase in bridge arm signal input part, the 7th input connection of the adaptive circuit
To the second port, the 8th input of the adaptive circuit is connected to the first port, the adaptive circuit
Enable Pin of the output end as the HVIC pipes；
Wherein, the adaptive circuit is all low electricity in the input signal of the first input end to the 7th input
Usually, according to the corresponding level of magnitude relationship output between the value and the first setting value of the input signal of the 8th input
Signal；Input signal of the adaptive circuit in the first input end at least one input into the 7th input
For high level when, according to the temperature of the SPM, the value of the input signal of the 8th input with second setting
Magnitude relationship between value exports corresponding level signal, and second setting value is more than first setting value.
SPM according to an embodiment of the invention, adaptive circuit is in first input end to the 7th input
The input signal of (bridge arm signal input part and PFC control signals under bridge arm signal input part, three-phase i.e. on three-phase) is all to be low
During level, closed by the size between the value and the first setting value of the input signal according to the 8th input (i.e. current detecting end)
System exports corresponding level signal so that when it is all low level that the first input end of adaptive circuit is to the 7th input (
When being not likely to produce noise signal), adaptive circuit can make real time reaction according to the signal value that current detecting end detects,
When the signal value that i.e. current detecting end detects is larger, enable signal that timely output control HVIC pipes are stopped, electric current inspection
When the signal value that survey end detects is smaller, the enable signal of output control HVIC pipes work, to ensure SPM normal
Under warm (when i.e. less than predetermined temperature value) can normal work, and carry out overcurrent protection.
It is high electricity in the input signal of first input end at least one input into the 7th input of adaptive circuit
Usually, by big between the temperature according to SPM, the value of the input signal at current detecting end and the second setting value
Small relation exports corresponding level signal so that when easily producing noise signal and causing false triggering, can pass through larger the
Two setting values (compared to the first setting value) determine whether enable signal that output control HVIC pipes are stopped as standard,
And then can effectively it reduce when SPM works at high temperature by the probability of false triggering.
SPM according to the abovementioned embodiments of the present invention, there can also be following technical characteristic：
According to one embodiment of present invention, the adaptive circuit is in the first input end to the 7th input
Input signal when being all low level, if the value of the input signal of the 8th input is more than or equal to the described first setting
Value, then the enable signal of the first level is exported, to forbid the HVIC pipes to work；Otherwise, the enable signal of second electrical level is exported,
To allow the HVIC pipes to work；
Input of the adaptive circuit in the first input end at least one input into the 7th input
When signal is high level, if the temperature of the SPM is higher than predetermined temperature value, and the input of the 8th input
The value of signal is more than or equal to second setting value, then exports the enable signal of first level；Otherwise, described the is exported
The enable signal of two level.
Wherein, the enable signal of the first level can be low level signal, and the enable signal of second electrical level can be high electricity
Ordinary mail number.
According to one embodiment of present invention, the adaptive circuit includes：
First OR gate, three inputs of first OR gate respectively as the adaptive circuit first input end,
Second input and the 3rd input；
Second OR gate, three inputs of second OR gate respectively as the adaptive circuit the 4th input,
5th input and the 6th input；
3rd OR gate, the output end of first OR gate are connected to the first input end of the 3rd OR gate, and described second
The output end of OR gate is connected to the second input of the 3rd OR gate, and the 3rd input conduct of the 3rd OR gate is described certainly
7th input of adaptive circuit, the output end of the 3rd OR gate are connected to the first input end of the first NAND gate；
First resistor, the first end of the first resistor is connected to the power supply positive pole of the adaptive circuit, described
Second end of first resistor is connected to the negative electrode of voltage-regulator diode, and the anode of the voltage-regulator diode is connected to the adaptive electricity
The power supply negative pole on road；
Second resistance, the first end of the second resistance are connected to the second end of the first resistor, the second resistance
The second end be connected to the positive input terminal of first voltage comparator；
Thermistor, the first end of the thermistor are connected to the second end of the second resistance, the thermistor
The second end be connected to the anode of the voltage-regulator diode；
First voltage source, the negative pole of the first voltage source are connected to the anode of the voltage-regulator diode, first electricity
The positive pole of potential source is connected to the negative input end of the first voltage comparator, and the output end of the first voltage comparator is connected to
Second input of first NAND gate, the output end of first NAND gate is connected to the input of the first NOT gate, described
The output end of first NOT gate is connected to the control terminal of analog switch；
Second voltage comparator, the positive input terminal of the second voltage comparator are the 8th defeated as the adaptive circuit
Enter end, the negative input end of the second voltage comparator is connected to the positive pole of the second voltage source, the negative pole of the second voltage source
The power supply negative pole of the adaptive circuit is connected to, the output end of the second voltage comparator is connected to the simulation and opened
The first choice end of pass and the first input end of the second NAND gate；
Tertiary voltage comparator, the positive input terminal of the tertiary voltage comparator are connected to the second voltage comparator
Positive input terminal, the negative input end of the tertiary voltage comparator are connected to the positive pole in tertiary voltage source, the tertiary voltage source
Negative pole is connected to the power supply negative pole of the adaptive circuit, and the output end of the tertiary voltage comparator is connected to described
Second input of two NAND gates, the output end of second NAND gate are connected to the input of the second NOT gate, and described second is non-
The output end of door is connected to the second selection end of the analog switch, and the fixing end of the analog switch is connected to the 3rd NOT gate
Input, the output end of the output end of the 3rd NOT gate as the adaptive circuit.
According to one embodiment of present invention, the signal output part of PFC drive circuits, institute are additionally provided with the HVIC pipes
Stating SPM also includes：First power switch pipe and the first diode, the anode of first diode are connected to institute
The emitter stage of the first power switch pipe is stated, the negative electrode of first diode is connected to the current collection of first power switch pipe
Pole, the colelctor electrode of first power switch pipe are connected to the anode of the second diode, the negative electrode connection of second diode
To the high voltage input of the SPM, the base stage of first power switch pipe is connected to the PFC drivings electricity
The signal output part on road, the PFC low reference voltages of the emitter stage of first power switch pipe as the SPM
End, the PFC ends of the colelctor electrode of first power switch pipe as the SPM.
Wherein, the first power switch pipe can be IGBT (Insulated Gate Bipolar Transistor, insulation
Grid bipolar transistor).
According to one embodiment of present invention, in addition to：Boostrap circuit, the boostrap circuit include：
First bootstrap diode, the anode of first bootstrap diode are connected to the low-pressure area of the SPM
Power supply anode, the negative electrode of first bootstrap diode are connected to the U phases higher-pressure region power supply electricity of the SPM
Source anode；Second bootstrap diode, the anode of second bootstrap diode are connected to the low-pressure area of the SPM
Power supply anode, the negative electrode of second bootstrap diode are connected to the V phases higher-pressure region power supply electricity of the SPM
Source anode；3rd bootstrap diode, the anode of the 3rd bootstrap diode are connected to the low-pressure area of the SPM
Power supply anode, the negative electrode of the 3rd bootstrap diode are connected to the W phases higher-pressure region power supply electricity of the SPM
Source anode.
According to one embodiment of present invention, in addition to：Bridge arm circuit on three-phase, it is every in bridge arm circuit on the three-phase
The input of bridge arm circuit is connected to the signal output part that phase is corresponded in the three-phase high-voltage area of the HVIC pipes in one phase；Under three-phase
Bridge arm circuit, the input of bridge arm circuit is connected to the three-phase of the HVIC pipes under each phase under the three-phase in bridge arm circuit
The signal output part of phase is corresponded in low-pressure area.
Wherein, bridge arm circuit includes on three-phase：Bridge arm circuit in U phases, bridge arm circuit in V phases, bridge arm circuit in W phases；Three
Bridge arm circuit includes under phase：Bridge arm circuit under bridge arm circuit, W phases under bridge arm circuit, V phases under U phases.
According to one embodiment of present invention, bridge arm circuit includes in each phase：Second power switch pipe and the 3rd
Diode, the anode of the 3rd diode are connected to the emitter stage of second power switch pipe, the 3rd diode
Negative electrode is connected to the colelctor electrode of second power switch pipe, and the colelctor electrode of second power switch pipe is connected to the intelligence
The high voltage input of power model, the input of the base stage of second power switch pipe as bridge arm circuit in each phase
End, the emitter stage of second power switch pipe, which is connected to the SPM and corresponds to the higher-pressure region power supply of phase, to be born
End.Wherein, the second power switch pipe can be IGBT.
According to one embodiment of present invention, bridge arm circuit includes under each phase：3rd power switch pipe and the 4th
Diode, the anode of the 4th diode are connected to the emitter stage of the 3rd power switch pipe, the 4th diode
Negative electrode is connected to the colelctor electrode of the 3rd power switch pipe, and the colelctor electrode of the 3rd power switch pipe is connected on corresponding
The anode of the 3rd diode in bridge arm circuit, the base stage of the 3rd power switch pipe is as bridge arm under each phase
The input of circuit, the emitter stage of the 3rd power switch pipe are joined as the low-voltage of the corresponding phase of the SPM
Examine end.Wherein, the 3rd power switch pipe can be IGBT.
According to one embodiment of present invention, the voltage of the high voltage input of the SPM is 300V.
According to one embodiment of present invention, the anode of each phase higher-pressure region power supply of the SPM and
Filter capacitor is connected between negative terminal.
Embodiment according to a second aspect of the present invention, it is also proposed that a kind of air conditioner, including：Any one embodiment as described above
Described in SPM.
The additional aspect and advantage of the present invention will be set forth in part in the description, and will partly become from the following description
Obtain substantially, or recognized by the practice of the present invention.
Brief description of the drawings
The above-mentioned and/or additional aspect and advantage of the present invention will become in the description from combination accompanying drawings below to embodiment
Substantially and it is readily appreciated that, wherein：
Fig. 1 shows the structural representation of the SPM in correlation technique；
Fig. 2 shows the waveform diagram of noise caused by SPM in correlation technique；
Fig. 3 shows the structural representation of SPM according to an embodiment of the invention；
Fig. 4 shows the external circuit schematic diagram of SPM according to an embodiment of the invention；
Fig. 5 shows the internal structure schematic diagram of adaptive circuit according to an embodiment of the invention.
Embodiment
It is below in conjunction with the accompanying drawings and specific real in order to be more clearly understood that the above objects, features and advantages of the present invention
Mode is applied the present invention is further described in detail.It should be noted that in the case where not conflicting, the implementation of the application
Feature in example and embodiment can be mutually combined.
Many details are elaborated in the following description to facilitate a thorough understanding of the present invention, still, the present invention may be used also
To be different from other modes described here using other to implement, therefore, protection scope of the present invention is not by described below
Specific embodiment limitation.
Fig. 3 shows the structural representation of SPM according to an embodiment of the invention.
As shown in figure 3, SPM according to an embodiment of the invention, including：HVIC pipes 1101 and adaptive electricity
Road 1105.
The VCC ends of HVIC pipes 1101 are general as low-pressure area power supply the anode VDD, VDD of SPM 1100
For 15V；
Inside HVIC pipes 1101：
HIN1 ends connect the first input end of adaptive circuit 1105；The second of HIN2 ends connection adaptive circuit 1105 is defeated
Enter end；HIN3 ends connect the 3rd input of adaptive circuit 1105；4th input of LIN1 ends connection adaptive circuit 1105
End；LIN2 ends connect the 5th input of adaptive circuit 1105；LIN3 ends connect the 6th input of adaptive circuit 1105；
PFCINP ends connect the 7th input of adaptive circuit 1105；ITRIP ends connect the 7th input of adaptive circuit 1105；
VCC ends connect the power supply anode of adaptive circuit 1105；GND ends connect the power supply negative terminal of adaptive circuit 1105；
The output end of adaptive circuit 1105 is designated as ICON, for control HIN1~HIN3, LIN1~LIN3, PFCINP signals it is effective
Property.
The inside of HVIC pipes 1101 also has boostrap circuit structure as follows：
VCC ends are connected with the anode of bootstrap diode 1102, bootstrap diode 1103, bootstrap diode 1104；Bootstrapping two
The negative electrode of pole pipe 1102 is connected with the VB1 of HVIC pipes 1101；The VB2 phases of the negative electrode of bootstrap diode 1103 and HVIC pipes 1101
Even；The negative electrode of bootstrap diode 1104 is connected with the VB3 of HVIC pipes 1101.
The HIN1 ends of HVIC pipes 1101 are bridge arm signal input part UHIN in the U phases of SPM 1100；HVIC is managed
1101 HIN2 ends are bridge arm signal input part VHIN in the V phases of SPM 1100；The HIN3 ends of HVIC pipes 1101 are
Bridge arm signal input part WHIN in the W phases of SPM 1100；The LIN1 ends of HVIC pipes 1101 are SPM
Bridge arm signal input part ULIN under 1100 U phases；The LIN2 ends of HVIC pipes 1101 are bridge arm under the V phases of SPM 1100
Signal input part VLIN；The LIN3 ends of HVIC pipes 1101 are bridge arm signal input part WLIN under the W phases of SPM 1100；
The ITRIP ends of HVIC pipes 1101 are the MTRIP ends of SPM 1100；The PFCINP ends of HVIC pipes 1101 are as intelligent work(
The PFC control signals PFCIN of rate module 100；The GND ends of HVIC pipes 1101 supply as the low-pressure area of SPM 1100
Electric power supply negative terminal COM.Wherein, SPM 1100 the tunnel of UHIN, VHIN, WHIN, ULIN, VLIN, WLIN six input and
PFCIN ends receive 0V or 5V input signal.
One end of the VB1 ends connection electric capacity 1131 of HVIC pipes 1101, and as the U phases higher-pressure region of SPM 1100
Power supply anode UVB；The HO1 ends of HVIC pipes 1101 are connected with the grid of bridge arm IGBT pipes 1121 in U phases；HVIC pipes 1101
VS1 ends and colelctor electrode, the FRD pipes 1114 of bridge arm IGBT pipes 1124 under the emitter-base bandgap grading of IGBT pipes 1121, the anode of FRD pipes 1111, U phases
Negative electrode, the other end of electric capacity 1131 be connected, and as the U phases higher-pressure region power supply negative terminal UVS of SPM 1100.
One end of the VB2 ends connection electric capacity 1132 of HVIC pipes 1101, and as the V phases higher-pressure region of SPM 1100
Power supply anode VVB；The HO2 ends of HVIC pipes 1101 are connected with the grid of bridge arm IGBT pipes 1123 in V phases；HVIC pipes 1101
VS2 ends and colelctor electrode, the FRD pipes 1115 of bridge arm IGBT pipes 1125 under the emitter-base bandgap grading of IGBT pipes 1122, the anode of FRD pipes 1112, V phases
Negative electrode, the other end of electric capacity 1132 be connected, and as the V phases higher-pressure region power supply negative terminal VVS of SPM 1100.
One end of the VB3 ends connection electric capacity 1133 of HVIC pipes 1101, the W phases higher-pressure region as SPM 1100 supplies
Electric power positive end WVB；The HO3 ends of HVIC pipes 1101 are connected with the grid of bridge arm IGBT pipes 1123 in W phases；HVIC pipes 1101
VS3 ends and colelctor electrode, the FRD pipes 1116 of bridge arm IGBT pipes 1126 under the emitter-base bandgap grading of IGBT pipes 1123, the anode of FRD pipes 1113, W phases
Negative electrode, the other end of electric capacity 1133 be connected, and as the W phases higher-pressure region power supply negative terminal WVS of SPM 1100.
The LO1 ends of HVIC pipes 1101 are connected with the grid of IGBT pipes 1124；The LO2 ends of HVIC pipes 1101 and IGBT pipes 1125
Grid be connected；The LO3 ends of HVIC pipes 1101 are connected with the grid of IGBT pipes 1126；The emitter-base bandgap grading of IGBT pipes 1124 is managed with FRD
1114 anode is connected, and as the U phase low reference voltages end UN of SPM 1100；The emitter-base bandgap grading of IGBT pipes 1125 with
The anode of FRD pipes 1115 is connected, and as the V phase low reference voltages end VN of SPM 1100；IGBT pipes 1126 are penetrated
Pole is connected with the anode of FRD pipes 1116, and as the W phase low reference voltages end WN of SPM 1100.
VDD is the power supply anode of HVIC pipes 1101, and GND is the power supply negative terminal of HVIC pipes 1101；VDD-GND voltages
Generally 15V；VB1 and VS1 is respectively the positive pole and negative pole of the power supply of U phases higher-pressure region, and HO1 is the output end of U phases higher-pressure region；
VB2 and VS2 is respectively the positive pole and negative pole of the power supply of V phases higher-pressure region, and HO2 is the output end of V phases higher-pressure region；VB3 and VS3 difference
For the positive pole and negative pole of the power supply of U phases higher-pressure region, HO3 is the output end of W phases higher-pressure region；LO1, LO2, LO3 are respectively U phases, V
The output end of phase, W phase low-pressure areas.
The PFCO ends of HVIC pipes 1101 are connected with the grid of IGBT pipes 1127；The emitter-base bandgap grading of IGBT pipes 1127 and FRD pipes 1117
Anode be connected, and as the PFC low reference voltages end-VP of SPM 1100；The colelctor electrode and FRD of IGBT pipes 1127
Negative electrode, the anode of FRD pipes 1141 of pipe 1117 are connected, and as the PFC ends of SPM 1100；
The colelctor electrode of IGBT pipes 1121, the negative electrode of FRD pipes 1111, the colelctor electrode of IGBT pipes 1122, the moon of FRD pipes 1112
Pole, the colelctor electrode of IGBT pipes 1123, the negative electrode of FRD pipes 1113, the negative electrode of FRD pipes 1141 are connected, and are used as SPM
1100 high voltage input P, P typically meets 300V.
In the outside of SPM 1100, as shown in figure 4, UN (the U phase low reference voltages of SPM 1100
End), VN (V phase low reference voltages end), WN (the W phase low reference voltages end) SPM 1100 that is connected MTRIP ends and
One end of sampling resistor 1138, the other end ground connection of sampling resistor 1138.
The effect of HVIC pipes 1101 is：
When ICON is high level, the 0 of input HIN1, HIN2, HIN3 or 5V logic input signal are passed to respectively
Output end HO1, HO2, HO3, LIN1, LIN2, LIN3 signal are passed into output end LO1, LO2, LO3 respectively, by PFCINP's
Signal passes to output end PFCO, and wherein HO1 is that VS1 or VS1+15V logic output signal, HO2 are patrolling for VS2 or VS2+15V
Volume output signal, HO3 are VS3 or VS3+15V logic output signal, and LO1, LO2, LO3, PFCO are 0 or 15V logic output
Signal；
When ICON is low level, HO1, HO2, HO3, LO1, LO2, LO3, PFCO are all set to low level.
The effect of adaptive circuit 1105 is：
All it is the low level moment in HIN1~3 of the HVIC pipes 1101, LIN1~LIN3, PFCINP, ITRIP electricity
Pressure value works as ITRIP compared with the voltage V1 set>During V1, ICON exports low level at once, and otherwise ICON keeps high level
It is constant；
It is high level and intelligent work(in HIN1~3 of the HVIC pipes 1101, LIN1~LIN3, PFCINP at least one
When the temperature of rate module is higher than a certain particular value T1, for ITRIP magnitude of voltage compared with certain voltage V2, V2 is one bigger than V1
Magnitude of voltage, work as ITRIP>During V2, ICON exports low level at once, and otherwise ICON keeps high level constant.
In one embodiment of the invention, the particular circuit configurations schematic diagram of adaptive circuit 1105 is as shown in figure 5, tool
Body is：
HIN1 connects one of input of OR gate 2001；HIN2 connects one of input of OR gate 2001；HIN3 connects
One of input of OR gate 2001；
LIN1 connects one of input of OR gate 2002；LIN2 connects one of input of OR gate 2002；LIN3 connects
One of input of OR gate 2002；
PFCINP connects one of input of OR gate 2003；The output end of OR gate 2001, the output termination of OR gate 2002
Two other input of OR gate 2003；One of input of the output termination NAND gate 2014 of OR gate 2003；
One termination VCC of resistance 2004；One end of another terminating resistor 2007 of resistance 2004 and voltage-regulator diode 2005
Negative electrode；The anode of voltage-regulator diode 2005 meets GND；
The positive input terminal and PTC (Positive Temperature of another termination voltage comparator 2009 of resistance 2007
Coefficient, positive temperature coefficient) resistance 2006 one end；Another termination GND of PTC resistor 2006；
The anode of the negative input termination voltage source 2008 of voltage comparator 2009；The negative terminal of voltage source 2008 meets GND；Voltage
Another input of the output termination NAND gate 2014 of comparator 2009；The input of the output termination NOT gate 2015 of NAND gate 2014
End；The control terminal of the output termination analog switch 2018 of NOT gate 2015；
ITRIP connects the positive input terminal of voltage comparator 2010 and the positive input terminal of voltage comparator 2013；Voltage source 2011
Positive termination voltage comparator 2010 negative input end；The negative terminal of voltage source 2011 meets GND；The positive termination voltage of voltage source 2012
The negative input end of comparator 2013；The negative terminal of voltage source 2012 meets GND；The output termination analog switch of voltage comparator 2010
2018 0 selection end and one of input of NAND gate 2016；
Another input of the output termination NAND gate 2016 of voltage comparator 2013；The output termination of NAND gate 2016
The input of NOT gate 2017；1 selection end of the output termination analog switch 2018 of NOT gate 2017；The fixing end of analog switch 2018
Connect the input of NOT gate 2019；The output end of NOT gate 2019 is as ICON.
Illustrate the operation principle and key parameter value of above-described embodiment below：
Unless HIN1, HIN2, HIN3, LIN1, LIN2, LIN3 and PFCINP are low level, otherwise the output of A points is high electric
It is flat；When D points voltage is more than the voltage of voltage source 2008, C exports high level, otherwise C points output low level；
The clamp voltage design of voltage-regulator diode 2005 is 6.4V, and resistance 2004 is designed as 20k Ω, then produces one in B points
The 6.4V voltages not influenceed with VCC voltage pulsations of individual stabilization；PTC resistor 2006 is designed as 10k Ω at 25 DEG C, 20k at 100 DEG C
Ω；Resistance 2007 is designed as 44k Ω, and voltage source 2008 is designed as 2V, then below 100 DEG C, voltage comparator 2009 exports low
Level, more than 100 DEG C, voltage comparator 2009 exports high level；According to practical application needs, regulation resistance can be passed through
2007 value, the temperature of the exporting change of control trigger voltage comparator 2009；
When A points and C points are simultaneously high level, the control terminal of analog switch 2018 is high level, otherwise analog switch
2018 control terminal is low level；
Voltage source 2011 is designed as 0.5V, and voltage source 2012 is designed as 0.7V, is also designed to the voltage higher than 0.5V, such as
0.6V；
When the control terminal of analog switch 2018 is high level, if ITRIP voltage makes ICON defeated higher than 0.5V at once
Go out low level, otherwise ICON keeps high level constant；
When the control terminal of analog switch 2018 is low level, ITRIP voltage necessarily be greater than 0.7V, and by with it is non-
After the delay of door 2016 and NOT gate 2017, ICON can be just set to export low level, otherwise ICON keeps high level constant；NAND gate
2016 and the size of NOT gate 2017 can be designed as technique and allow 3~5 times of minimum dimension, be delayed for adjusting.
From the technical scheme of above-described embodiment, SPM proposed by the present invention and existing SPM
It is completely compatible, directly it can be replaced with existing SPM, and pass through the temperature of automatic decision SPM
Degree, after the temperature spot for being easiest to generation false triggering is reached, in the threshold value for having an opportunity to cause the period of false triggering to improve ITRIP
Voltage, so as to which ITRIP be greatly reduced at high temperature by the probability of false triggering, pass through above mechanism so that intelligence proposed by the present invention
Can power model equal energy reliably working in the range of total temperature.
Technical scheme is described in detail above in association with accompanying drawing, the present invention proposes a kind of new intelligent power mould
Block, it can effectively be reduced SPM at normal temperatures on the premise of normal work and exist ensuring SPM
By the probability of false triggering under high temperature.
The preferred embodiments of the present invention are the foregoing is only, are not intended to limit the invention, for the skill of this area
For art personnel, the present invention can have various modifications and variations.Within the spirit and principles of the invention, that is made any repaiies
Change, equivalent substitution, improvement etc., should be included in the scope of the protection.
Claims (9)
- A kind of 1. SPM, it is characterised in that including：Bridge arm signal input part under bridge arm signal input part, three-phase on three-phase, three-phase low reference voltage end, current detecting end and PFC control signals；HVIC is managed, and is provided with the HVIC pipes and is respectively connecting on the three-phase bridge under bridge arm signal input part and the three-phase The terminals of arm signal input part, and it is corresponding to the first port at the current detecting end and defeated corresponding to PFC controls Enter the second port at end, the first port is connected by connecting line with the current detecting end, and the second port passes through company Wiring is connected with the PFC control signals；Sampling resistor, the three-phase low reference voltage end and the current detecting end are connected to the first of the sampling resistor End, the second end of the sampling resistor is connected to the low-pressure area power supply negative terminal of the SPM；Adaptive circuit, the power supply positive pole and negative pole of the adaptive circuit are respectively connecting to the SPM Low-pressure area power supply anode and negative terminal, the first input end of the adaptive circuit, the second input and the 3rd input point It is not connected to the corresponding end in bridge arm signal input part on the three-phase, it is the 4th input of the adaptive circuit, the 5th defeated Enter end and the 6th input is respectively connecting to corresponding end under the three-phase in bridge arm signal input part, the adaptive circuit 7th input is connected to the second port, and the 8th input of the adaptive circuit is connected to the first port, institute State Enable Pin of the output end of adaptive circuit as the HVIC pipes；Wherein, the adaptive circuit is all low level in the input signal of the first input end to the 7th input When, believed according to the corresponding level of magnitude relationship output between the value and the first setting value of the input signal of the 8th input Number；In the first input end, the input signal of at least one input into the 7th input is the adaptive circuit During high level, according to the temperature of the SPM, the value of the input signal of the 8th input and the second setting value Between magnitude relationship export corresponding level signal, second setting value is more than first setting value；Wherein, the adaptive circuit is all low level in the input signal of the first input end to the 7th input When, if the value of the input signal of the 8th input is more than or equal to first setting value, export making for the first level Energy signal, to forbid the HVIC pipes to work；Otherwise, the enable signal of second electrical level is exported, to allow the HVIC pipes to work；Input signal of the adaptive circuit in the first input end at least one input into the 7th input For high level when, if the temperature of the SPM is higher than predetermined temperature value, and the input signal of the 8th input Value be more than or equal to second setting value, then export the enable signal of first level；Otherwise, second electricity is exported Flat enable signal.
- 2. SPM according to claim 1, it is characterised in that the adaptive circuit includes：First OR gate, three inputs of first OR gate respectively as the adaptive circuit first input end, second Input and the 3rd input；Second OR gate, three inputs of second OR gate respectively as the adaptive circuit the 4th input, the 5th Input and the 6th input；3rd OR gate, the output end of first OR gate are connected to the first input end of the 3rd OR gate, second OR gate Output end be connected to the second input of the 3rd OR gate, the 3rd input of the 3rd OR gate is as described adaptive 7th input of circuit, the output end of the 3rd OR gate are connected to the first input end of the first NAND gate；First resistor, the first end of the first resistor are connected to the power supply positive pole of the adaptive circuit, and described first Second end of resistance is connected to the negative electrode of voltage-regulator diode, and the anode of the voltage-regulator diode is connected to the adaptive circuit Power supply negative pole；Second resistance, the first end of the second resistance are connected to the second end of the first resistor, and the of the second resistance Two ends are connected to the positive input terminal of first voltage comparator；Thermistor, the first end of the thermistor are connected to the second end of the second resistance, and the of the thermistor Two ends are connected to the anode of the voltage-regulator diode；First voltage source, the negative pole of the first voltage source are connected to the anode of the voltage-regulator diode, the first voltage source Positive pole be connected to the negative input end of the first voltage comparator, the output end of the first voltage comparator is connected to described Second input of the first NAND gate, the output end of first NAND gate are connected to the input of the first NOT gate, and described first The output end of NOT gate is connected to the control terminal of analog switch；Second voltage comparator, the positive input terminal of the second voltage comparator input as the 8th of the adaptive circuit End, the negative input end of the second voltage comparator are connected to the positive pole of the second voltage source, and the negative pole of the second voltage source connects The power supply negative pole of the adaptive circuit is connected to, the output end of the second voltage comparator is connected to the analog switch First choice end and the second NAND gate first input end；Tertiary voltage comparator, the positive input terminal of the tertiary voltage comparator are connected to the just defeated of the second voltage comparator Enter end, the negative input end of the tertiary voltage comparator is connected to the positive pole in tertiary voltage source, the negative pole in the tertiary voltage source Be connected to the power supply negative pole of the adaptive circuit, the output end of the tertiary voltage comparator be connected to described second with Second input of NOT gate, the output end of second NAND gate are connected to the input of the second NOT gate, second NOT gate Output end is connected to the second selection end of the analog switch, and the fixing end of the analog switch is connected to the input of the 3rd NOT gate End, the output end of the output end of the 3rd NOT gate as the adaptive circuit.
- 3. SPM according to claim 1, it is characterised in that PFC drivings are additionally provided with the HVIC pipes The signal output part of circuit, the SPM also include：First power switch pipe and the first diode, the anode of first diode are connected to first power switch pipe Emitter stage, the negative electrode of first diode are connected to the colelctor electrode of first power switch pipe, first power switch The colelctor electrode of pipe is connected to the anode of the second diode, and the negative electrode of second diode is connected to the SPM High voltage input, the base stage of first power switch pipe are connected to the signal output part of the PFC drive circuits, and described PFC low reference voltage end of the emitter stage of one power switch pipe as the SPM, first power switch pipe PFC end of the colelctor electrode as the SPM.
- 4. SPM according to any one of claim 1 to 3, it is characterised in that also include：Boostrap circuit, The boostrap circuit includes：First bootstrap diode, the anode of first bootstrap diode are connected to the low-pressure area power supply of the SPM Power positive end, the negative electrode of first bootstrap diode are being connected to the U phases higher-pressure region power supply of the SPM just End；Second bootstrap diode, the anode of second bootstrap diode are connected to the low-pressure area power supply of the SPM Power positive end, the negative electrode of second bootstrap diode are being connected to the V phases higher-pressure region power supply of the SPM just End；3rd bootstrap diode, the anode of the 3rd bootstrap diode are connected to the low-pressure area power supply of the SPM Power positive end, the negative electrode of the 3rd bootstrap diode are being connected to the W phases higher-pressure region power supply of the SPM just End.
- 5. SPM according to any one of claim 1 to 3, it is characterised in that also include：Bridge arm circuit on three-phase, the input of bridge arm circuit is connected to described in each phase on the three-phase in bridge arm circuit The signal output part of phase is corresponded in the three-phase high-voltage area of HVIC pipes；Bridge arm circuit under three-phase, the input of bridge arm circuit is connected to described under each phase under the three-phase in bridge arm circuit The signal output part of phase is corresponded in the three-phase low-voltage area of HVIC pipes.
- 6. SPM according to claim 5, it is characterised in that bridge arm circuit includes in each phase：Second power switch pipe and the 3rd diode, the anode of the 3rd diode are connected to second power switch pipe Emitter stage, the negative electrode of the 3rd diode are connected to the colelctor electrode of second power switch pipe, second power switch The colelctor electrode of pipe is connected to the high voltage input of the SPM, and the base stage of second power switch pipe is as institute The input of bridge arm circuit in each phase is stated, the emitter stage of second power switch pipe is connected to the SPM pair Answer the higher-pressure region power supply negative terminal of phase.
- 7. SPM according to claim 6, it is characterised in that bridge arm circuit includes under each phase：3rd power switch pipe and the 4th diode, the anode of the 4th diode are connected to the 3rd power switch pipe Emitter stage, the negative electrode of the 4th diode are connected to the colelctor electrode of the 3rd power switch pipe, the 3rd power switch The colelctor electrode of pipe is connected to the anode of the 3rd diode in corresponding upper bridge arm circuit, the 3rd power switch pipe Input of the base stage as bridge arm circuit under each phase, the emitter stage of the 3rd power switch pipe is as the intelligent work( The low reference voltage end of the corresponding phase of rate module.
- 8. the SPM according to claim 6 or 7, it is characterised in that the high voltage of the SPM The voltage of input is 300V, is connected between the anode and negative terminal of each phase higher-pressure region power supply of the SPM There is filter capacitor.
- A kind of 9. air conditioner, it is characterised in that including：SPM as any one of claim 1 to 8.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610126190.0A CN105577017B (en) | 2016-03-04 | 2016-03-04 | SPM and air conditioner |
| PCT/CN2016/097738 WO2017092449A1 (en) | 2015-11-30 | 2016-08-31 | Intelligent power module and air conditioner |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610126190.0A CN105577017B (en) | 2016-03-04 | 2016-03-04 | SPM and air conditioner |
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| Publication Number | Publication Date |
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| CN105577017A CN105577017A (en) | 2016-05-11 |
| CN105577017B true CN105577017B (en) | 2017-12-19 |
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| CN201610126190.0A Expired - Fee Related CN105577017B (en) | 2015-11-30 | 2016-03-04 | SPM and air conditioner |
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| WO2017092449A1 (en) * | 2015-11-30 | 2017-06-08 | 广东美的制冷设备有限公司 | Intelligent power module and air conditioner |
| CN105790565B (en) * | 2016-05-30 | 2017-11-24 | 广东美的制冷设备有限公司 | SPM and air conditioner |
| CN106329901B (en) * | 2016-11-21 | 2018-10-16 | 广东美的制冷设备有限公司 | Overcurrent protection peripheral circuit and electrical equipment |
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| US7183740B2 (en) * | 2003-06-05 | 2007-02-27 | Toyota Jidosha Kabushiki Kaisha | Motor drive apparatus, vehicle having the same mounted therein, and computer readable storage medium having a program stored therein to cause computer to control voltage conversion |
| CN202602544U (en) * | 2012-06-18 | 2012-12-12 | 珠海格力电器股份有限公司 | Power conversion module of frequency conversion air conditioner |
| CN105356786B (en) * | 2015-11-30 | 2018-03-27 | 重庆美的制冷设备有限公司 | SPM and air conditioner |
| CN205453539U (en) * | 2016-03-04 | 2016-08-10 | 广东美的制冷设备有限公司 | Intelligence power module and air conditioner |
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