CN105577018B - SPM and air conditioner - Google Patents
SPM and air conditioner Download PDFInfo
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- CN105577018B CN105577018B CN201610128259.3A CN201610128259A CN105577018B CN 105577018 B CN105577018 B CN 105577018B CN 201610128259 A CN201610128259 A CN 201610128259A CN 105577018 B CN105577018 B CN 105577018B
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
- H02H7/122—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for inverters, i.e. dc/ac converters
Abstract
Description
Technical field
It is empty in particular to a kind of SPM and one kind the present invention relates to SPM technical field Adjust device.
Background technology
SPM (Intelligent Power Module, abbreviation IPM) is a kind of by power electronics deviding device The analog line driver that part and integrated circuit technique integrate, SPM include device for power switching and high drive Circuit, and with failure detector circuits such as overvoltage, overcurrent and overheats.The logic input terminal of SPM receives master control The control signal of device processed, output end driving compressor or subsequent conditioning circuit work, while the system status signal detected is sent back to Master controller.Relative to traditional discrete scheme, SPM has high integration, high reliability, self-test and protection circuit Etc. advantage, be particularly suitable for the frequency converter of motor and various inverters, be frequency control, metallurgical machinery, electric propulsion, The desired power level electronic device of servo-drive, frequency-conversion domestic electric appliances.
The structural representation of existing Intelligent power module circuit as shown in figure 1, MTRIP ports as current detecting end, To be protected according to the size of current detected to SPM 100.PFCIN ports are as SPM PFC (Power Factor Correction, PFC) control signal.
In the SPM course of work, certain frequency frequent switching between low and high level is pressed at PFCINP ends, is made IGBT pipes 127 are continuously on off state and FRD pipes 131 are continuously in freewheeling state, the frequency be generally LIN1~LIN3, 2~4 times of HIN1~HIN3 switching frequencies, and do not contacted directly with LIN1~LIN3, HIN1~HIN3 switching frequency.
As shown in Fig. 2 UN, VN, WN meet one end of milliohm resistance 138, another the termination GND, MTRIP of milliohm resistance 138 It is current detecting pin, connects one end of milliohm resistance 138, electric current is calculated by the pressure drop for detecting milliohm resistance, as shown in figure 3, When current is excessive, SPM 100 is stopped, avoid after producing overheat because of excessively stream, to SPM 100 Produce permanent damage.
- VP, COM, UN, VN, WN have electrical connection in actual use.Therefore, 121~IGBT of IGBT pipes pipes 127 are opened Current noise when voltage noise during pass and FRD 111~FRD of pipe pipes 116, FRD 131 afterflows of pipe can all intercouple, right The input pin of each low-voltage area impacts.
In each input pin, HIN1~HIN3, LIN1~LIN3, PFCINP threshold value typically in 2.3V or so, and ITRIP threshold voltage typically only has below 0.5V, and therefore, ITRIP is the pin for being most susceptible to interference.When ITRIP by Triggering, SPM 100 will be stopped, and because excessively stream now really occurs, ITRIP now tactile Hair belongs to false triggering.As shown in figure 4, it is high level in PFCIN, when IGBT pipes 127 open moment, because FRD pipes 131 is reverse The presence of restoring current, is superimposed out I131Current waveform, the electric current has larger concussion noise, by-VP, COM, UN, VN, Electrical connections of the WN in peripheral circuit, concussion noise close out certain voltage in MTRIP ends meeting lotus root and raised.If trigger MTRIP Condition be:Voltage>Vth, and duration>Tth;In Fig. 4, if Ta<Tth<Tb is then too high in the voltage in first three cycle It is insufficient to allow MTRIP to produce false triggering, to the 4th cycle, MTRIP will produce false triggering.
Managed for the FRD of special process, forward conduction voltage drop is that inverse proportion closes with reverse recovery time/reverse recovery current System, forward conduction voltage drop bigger reverse recovery time/reverse recovery current is smaller, during the smaller Reverse recovery of forward conduction voltage drop Between/reverse recovery current is bigger.Under conditions of the non-generation technique lifting of flow technique, only by shortening reverse recovery time Mode reduces the influence to busbar voltage, necessarily brings the raising of forward conduction voltage drop, so as to cause below 25kHz frequency ranges Power consumption increase, and PFC switching frequency is fixed, and frequency is between 20kHz~40kHz, at present the frequency of the product main flow of volume production Rate is 20kHz, and 40kHz is still in the research demonstration stage.In fact, as shown in figure 5, at 25 DEG C, FRD Reverse recovery effect Caused voltage pulsation is not enough to cause MTRIP to trigger, and as temperature raises, at 75 DEG C, MTRIP is triggered, and makes system It is stopped.Because reverse recovery current is positive temperature coefficient, this characteristic makes such a false triggering probability higher at high temperature.Though Right this false triggering can recover to destroy without forming system over time, but undoubtedly user can be caused to perplex.Such as For the application scenario of transducer air conditioning, once MTRIP can be because being mistakenly considered to stop work excessively stream occurs by false triggering, air-conditioning system Make 3~5 minutes, user can not be during this period of time obtained cold wind, this is to cause air-conditioning system because refrigerating capacity deficiency is by visitor One of the main reason for family is complained.
Therefore, how to ensure that SPM can be at normal temperatures on the premise of low-power consumption normal work, effective drop Low SPM turns into technical problem urgently to be resolved hurrily by the probability of false triggering at high temperature.
The content of the invention
It is contemplated that at least solves one of technical problem present in prior art or correlation technique.
Therefore, it is an object of the present invention to propose a kind of new SPM, intelligent work(can ensured Rate module can effectively reduce SPM at high temperature by false triggering at normal temperatures on the premise of low-power consumption normal work Probability.
It is another object of the present invention to propose a kind of air conditioner.
To achieve the above object, embodiment according to the first aspect of the invention, it is proposed that a kind of SPM, bag Include:Bridge arm signal input part, three-phase low reference voltage end, current detecting end, PFC under bridge arm signal input part, three-phase on three-phase Control signal and PFC ends;HVIC (High Voltage Integrated Circuit, high voltage integrated circuit) is managed, described It is provided with HVIC pipes and is respectively connecting on the three-phase bridge arm signal input part under bridge arm signal input part and the three-phase Terminals, and the first port corresponding to the current detecting end and the second port corresponding to the PFC control signals, The first port is connected by connecting line with the current detecting end, and the second port is controlled by connecting line and the PFC Input processed is connected;Sampling resistor, the three-phase low reference voltage end and the current detecting end are connected to the sampling electricity The first end of resistance, the second end of the sampling resistor are connected to the low-pressure area power supply negative terminal of the SPM;From Adaptive circuit, the first input end of the adaptive circuit and the second input are connected respectively to the first port and institute State second port, the Enable Pin of the first output end of the adaptive circuit as the HVIC pipes;
PFC freewheeling circuits, first input end, the second input, the first input/output terminal and of the PFC freewheeling circuits Two input/output terminals are connected respectively to the 3rd output of the second output end of the adaptive circuit, the adaptive circuit The high voltage input at end, the PFC ends and the SPM, the PFC freewheeling circuits are according to PFC afterflows electricity The level signal of two inputs input on road, realizes function of the forward conduction voltage drop less than the fly-wheel diode of predetermined pressure drop value Or realize the function of the controlled fly-wheel diode of reverse recovery current;
Wherein, the adaptive circuit according to the temperature of the SPM, the adaptive circuit it is first defeated Enter the size of the input signal at end, and whether the input signal of the second input of the adaptive circuit is in rising edge, The signal of corresponding level is exported by first output end, the second output end and the 3rd output end.
SPM according to an embodiment of the invention, PFC freewheeling circuits pass through two according to PFC freewheeling circuits The level signal of input input, realize function of the forward conduction voltage drop less than the fly-wheel diode of predetermined pressure drop value or realize anti- The function of the fly-wheel diode controlled to restoring current so that, can when the temperature of SPM is less than predetermined temperature value To realize function of the forward conduction voltage drop less than the fly-wheel diode of predetermined pressure drop value, to reduce SPM in normal temperature Power consumption when being worked under (when i.e. temperature is less than predetermined temperature value);Pre- constant temperature can be higher than in the temperature of SPM simultaneously During angle value, if the signal of PFC control signals input is in rising edge, the controlled afterflow two of reverse recovery current can be realized The function of pole pipe, to suppress its influence to busbar voltage, and then reduce when SPM works at high temperature by false touch The probability of hair.
Adaptive circuit passes through the temperature according to SPM, the input signal of the first input end of adaptive circuit Size, and whether the input signal of the second input of adaptive circuit be in rising edge, passes through the first output end, second Output end and the 3rd output end export the enable signal of corresponding level so that adaptive when the temperature of SPM is relatively low Circuit is answered to be made a response according to the signal value that current detecting end detects, to ensure SPM in normal temperature (i.e. During less than predetermined temperature value) under can normal work, and carry out overcurrent protection.And SPM temperature higher than predetermined During temperature value, standard can be used as to determine whether output control (more than standard value of temperature when relatively low) by larger standard value The enable signal that HVIC pipes processed are stopped, and then can effectively reduce when SPM works at high temperature by false triggering Probability.
SPM according to the abovementioned embodiments of the present invention, there can also be following technical characteristic:
According to one embodiment of present invention, the adaptive circuit is less than predetermined in the temperature of the SPM During temperature value, the signal of the first level is exported by second output end, and is higher than in the temperature of the SPM During the predetermined temperature value, the signal of second electrical level is exported by second output end;
The adaptive circuit is pre- after rising edge occurs in the input signal of the second input of the adaptive circuit In timing is long, the signal of the second electrical level is exported by the 3rd output end;Otherwise, exported by the 3rd output end The signal of first level;
The adaptive circuit is when the temperature of the SPM is less than predetermined temperature value, if the adaptive electricity The value of the input signal of the first input end on road is more than or equal to the first setting value, then by described in first output end output The enable signal of first level, to forbid the HVIC pipes to work;Otherwise, second electricity is exported by first output end Flat enable signal, to allow the HVIC pipes to work;
The adaptive circuit is when the temperature of the SPM is higher than the predetermined temperature value, if described adaptive Answer the value of the input signal of the first input end of circuit to be more than or equal to the second setting value, then exported by first output end The enable signal of first level;Otherwise, the enable signal of the second electrical level is exported by first output end;
Wherein, second setting value is more than first setting value.
According to one embodiment of present invention, the adaptive circuit includes:
The first NOT gate and the second NOT gate being connected in series, the input of first NOT gate is as the adaptive circuit Second input, the output end of second NOT gate are connected to the first input end of the first NAND gate;
The 3rd NOT gate, the 4th NOT gate and the 5th NOT gate being connected in series, the input of the 3rd NOT gate are connected to described The input of first NOT gate, the output end of the 5th NOT gate are connected to the second input of first NAND gate, and described The output end of one NAND gate is connected to the input of the 6th NOT gate, and the output end of the 6th NOT gate is as the adaptive circuit The 3rd output end;
First electric capacity, be connected to the 4th NOT gate input and the adaptive circuit power supply negative pole it Between;
Second electric capacity, be connected to the 5th NOT gate input and the adaptive circuit power supply negative pole it Between;
First resistor, the first end of the first resistor is connected to the power supply positive pole of the adaptive circuit, described Second end of first resistor is connected to the negative electrode of voltage-regulator diode, and the anode of the voltage-regulator diode is connected to the adaptive electricity The power supply negative pole on road, the power supply positive pole and negative pole of the adaptive circuit are respectively connecting to the SPM Low-pressure area power supply anode and negative terminal;
Second resistance, the first end of the second resistance are connected to the second end of the first resistor, the second resistance The second end be connected to the positive input terminal of first voltage comparator;
Thermistor, the first end of the thermistor are connected to the second end of the second resistance, the thermistor The second end be connected to the anode of the voltage-regulator diode;
First voltage source, the negative pole of the first voltage source are connected to the anode of the voltage-regulator diode, first electricity The positive pole of potential source is connected to the negative input end of the first voltage comparator, and the output end of the first voltage comparator is connected to The input of 7th NOT gate, the output end of the 7th NOT gate are connected to the input of the 8th NOT gate, the 8th NOT gate it is defeated Go out the control terminal that end is connected to the first analog switch, and as the second output end of the adaptive circuit;
Second voltage comparator, the positive input terminal of the second voltage comparator are first defeated as the adaptive circuit Enter end, the negative input end of the second voltage comparator is connected to the positive pole of the second voltage source, the negative pole of the second voltage source The power supply negative pole of the adaptive circuit is connected to, the output end of the second voltage comparator is connected to first mould Intend the first choice end of switch and the first input end of the second NAND gate;
Tertiary voltage comparator, the positive input terminal of the tertiary voltage comparator are connected to the second voltage comparator Positive input terminal, the negative input end of the tertiary voltage comparator are connected to the positive pole in tertiary voltage source, the tertiary voltage source Negative pole is connected to the power supply negative pole of the adaptive circuit, and the output end of the tertiary voltage comparator is connected to described Second input of two NAND gates, the output end of second NAND gate are connected to the input of the 9th NOT gate, and the described 9th is non- The output end of door is connected to the second selection end of first analog switch, and the fixing end of first analog switch is connected to the The input of ten NOT gates, the first output end of the output end of the tenth NOT gate as the adaptive circuit.
According to one embodiment of present invention, the PFC freewheeling circuits are in two inputs of the PFC freewheeling circuits When at least one input inputs the signal of first level, realize that forward conduction voltage drop is less than the afterflow two of predetermined pressure drop value The function of pole pipe;And the PFC freewheeling circuits all input the second electrical level in two inputs of the PFC freewheeling circuits Signal when, realize the function of the controlled fly-wheel diode of reverse recovery current.
According to one embodiment of present invention, the PFC freewheeling circuits include:
3rd NAND gate, two inputs of the 3rd NAND gate are defeated respectively as two of the PFC freewheeling circuits Enter end, the output end of the 3rd NAND gate is connected to the input of the 11st NOT gate, and the output end of the 11st NOT gate connects It is connected to the control terminal of the second analog switch, the fixing end of second analog switch is first defeated as the PFC freewheeling circuits Enter output end;
3rd resistor, the first end of the 3rd resistor is connected to the first choice end of second analog switch, described Second selection end of the second end of 3rd resistor and second analog switch is connected, and as the of the PFC freewheeling circuits Two input/output terminals.
According to one embodiment of present invention, the signal output part of PFC drive circuits, institute are additionally provided with the HVIC pipes Stating SPM also includes:First power switch pipe and the first diode, the anode of first diode are connected to institute The emitter stage of the first power switch pipe is stated, the negative electrode of first diode is connected to the current collection of first power switch pipe Pole, the base stage of first power switch pipe are connected to the signal output part of the PFC drive circuits, first power switch PFC low reference voltage end of the emitter stage of pipe as the SPM, the colelctor electrode of first power switch pipe are made For the PFC ends.
Wherein, the first power switch pipe can be IGBT (Insulated Gate Bipolar Transistor, insulation Grid bipolar transistor).
According to one embodiment of present invention, in addition to:Boostrap circuit, the boostrap circuit include:
First bootstrap diode, the anode of first bootstrap diode are connected to the low-pressure area of the SPM Power supply anode, the negative electrode of first bootstrap diode are connected to the U phases higher-pressure region power supply electricity of the SPM Source anode;Second bootstrap diode, the anode of second bootstrap diode are connected to the low-pressure area of the SPM Power supply anode, the negative electrode of second bootstrap diode are connected to the V phases higher-pressure region power supply electricity of the SPM Source anode;3rd bootstrap diode, the anode of the 3rd bootstrap diode are connected to the low-pressure area of the SPM Power supply anode, the negative electrode of the 3rd bootstrap diode are connected to the W phases higher-pressure region power supply electricity of the SPM Source anode.
According to one embodiment of present invention, in addition to:Bridge arm circuit on three-phase, it is every in bridge arm circuit on the three-phase The input of bridge arm circuit is connected to the signal output part that phase is corresponded in the three-phase high-voltage area of the HVIC pipes in one phase;Under three-phase Bridge arm circuit, the input of bridge arm circuit is connected to the three-phase of the HVIC pipes under each phase under the three-phase in bridge arm circuit The signal output part of phase is corresponded in low-pressure area.
Wherein, bridge arm circuit includes on three-phase:Bridge arm circuit in U phases, bridge arm circuit in V phases, bridge arm circuit in W phases;Three Bridge arm circuit includes under phase:Bridge arm circuit under bridge arm circuit, W phases under bridge arm circuit, V phases under U phases.
According to one embodiment of present invention, bridge arm circuit includes in each phase:Second power switch pipe and second Diode, the anode of second diode are connected to the emitter stage of second power switch pipe, second diode Negative electrode is connected to the colelctor electrode of second power switch pipe, and the colelctor electrode of second power switch pipe is connected to the intelligence The high voltage input of power model, the input of the base stage of second power switch pipe as bridge arm circuit in each phase End, the emitter stage of second power switch pipe, which is connected to the SPM and corresponds to the higher-pressure region power supply of phase, to be born End.Wherein, the second power switch pipe can be IGBT.
According to one embodiment of present invention, bridge arm circuit includes under each phase:3rd power switch pipe and the 3rd Diode, the anode of the 3rd diode are connected to the emitter stage of the 3rd power switch pipe, the 3rd diode Negative electrode is connected to the colelctor electrode of the 3rd power switch pipe, and the colelctor electrode of the 3rd power switch pipe is connected on corresponding The anode of second diode in bridge arm circuit, the base stage of the 3rd power switch pipe is as bridge arm under each phase The input of circuit, the emitter stage of the 3rd power switch pipe are joined as the low-voltage of the corresponding phase of the SPM Examine end.Wherein, the 3rd power switch pipe can be IGBT.
According to one embodiment of present invention, the voltage of the high voltage input of the SPM is 300V.
According to one embodiment of present invention, the anode of each phase higher-pressure region power supply of the SPM and Filter capacitor is connected between negative terminal.
Embodiment according to a second aspect of the present invention, it is also proposed that a kind of air conditioner, including:Any one embodiment as described above Described in SPM.
The additional aspect and advantage of the present invention will be set forth in part in the description, and will partly become from the following description Obtain substantially, or recognized by the practice of the present invention.
Brief description of the drawings
The above-mentioned and/or additional aspect and advantage of the present invention will become in the description from combination accompanying drawings below to embodiment Substantially and it is readily appreciated that, wherein:
Fig. 1 shows the structural representation of the SPM in correlation technique;
Fig. 2 shows the external circuit schematic diagram of SPM;
Fig. 3 shows the waveform diagram that current signal triggering SPM is stopped;
Fig. 4 shows a kind of waveform diagram of noise caused by SPM in correlation technique;
Fig. 5 shows another waveform diagram of noise caused by SPM in correlation technique;
Fig. 6 shows the structural representation of SPM according to an embodiment of the invention;
Fig. 7 shows the internal structure schematic diagram of adaptive circuit according to an embodiment of the invention;
Fig. 8 shows the internal structure schematic diagram of PFC freewheeling circuits according to an embodiment of the invention.
Embodiment
It is below in conjunction with the accompanying drawings and specific real in order to be more clearly understood that the above objects, features and advantages of the present invention Mode is applied the present invention is further described in detail.It should be noted that in the case where not conflicting, the implementation of the application Feature in example and embodiment can be mutually combined.
Many details are elaborated in the following description to facilitate a thorough understanding of the present invention, still, the present invention may be used also To be different from other modes described here using other to implement, therefore, protection scope of the present invention is not by described below Specific embodiment limitation.
Fig. 6 shows the structural representation of SPM according to an embodiment of the invention.
As shown in fig. 6, SPM according to an embodiment of the invention, including:HVIC pipes 1101 and adaptive electricity Road 1105.
The VCC ends of HVIC pipes 1101 are general as low-pressure area power supply the anode VDD, VDD of SPM 1100 For 15V;
Inside HVIC pipes 1101:
ITRIP ends connect the first input end of adaptive circuit 1105;The of PFCINP ends connection adaptive circuit 1105 Two inputs;VCC ends connect the power supply anode of adaptive circuit 1105;GND ends connect the power supply of adaptive circuit 1105 Power supply negative terminal;First output end of adaptive circuit 1105 is designated as ICON, for control HIN1~HIN3, LIN1~LIN3, The validity of PFCINP signals;Second output end of adaptive circuit 1105 is connected to the PFCC1 ends of HVIC pipes 1101;Adaptively 3rd output end of circuit 1105 is connected to the PFCC2 ends of HVIC pipes 1101.
The inside of HVIC pipes 1101 also has boostrap circuit structure as follows:
VCC ends are connected with the anode of bootstrap diode 1102, bootstrap diode 1103, bootstrap diode 1104;Bootstrapping two The negative electrode of pole pipe 1102 is connected with the VB1 of HVIC pipes 1101;The VB2 phases of the negative electrode of bootstrap diode 1103 and HVIC pipes 1101 Even;The negative electrode of bootstrap diode 1104 is connected with the VB3 of HVIC pipes 1101.
The HIN1 ends of HVIC pipes 1101 are bridge arm signal input part UHIN in the U phases of SPM 1100;HVIC is managed 1101 HIN2 ends are bridge arm signal input part VHIN in the V phases of SPM 1100;The HIN3 ends of HVIC pipes 1101 are Bridge arm signal input part WHIN in the W phases of SPM 1100;The LIN1 ends of HVIC pipes 1101 are SPM Bridge arm signal input part ULIN under 1100 U phases;The LIN2 ends of HVIC pipes 1101 are bridge arm under the V phases of SPM 1100 Signal input part VLIN;The LIN3 ends of HVIC pipes 1101 are bridge arm signal input part WLIN under the W phases of SPM 1100; The ITRIP ends of HVIC pipes 1101 are the MTRIP ends of SPM 1100;The PFCINP ends of HVIC pipes 1101 are as intelligent work( The PFC control signals PFCIN of rate module 100;The GND ends of HVIC pipes 1101 supply as the low-pressure area of SPM 1100 Electric power supply negative terminal COM.Wherein, SPM 1100 the tunnel of UHIN, VHIN, WHIN, ULIN, VLIN, WLIN six input and PFCIN ends receive 0V or 5V input signal.
One end of the VB1 ends connection electric capacity 1131 of HVIC pipes 1101, and as the U phases higher-pressure region of SPM 1100 Power supply anode UVB;The HO1 ends of HVIC pipes 1101 are connected with the grid of bridge arm IGBT pipes 1121 in U phases;HVIC pipes 1101 VS1 ends and colelctor electrode, the FRD pipes 1114 of bridge arm IGBT pipes 1124 under the emitter-base bandgap grading of IGBT pipes 1121, the anode of FRD pipes 1111, U phases Negative electrode, the other end of electric capacity 1131 be connected, and as the U phases higher-pressure region power supply negative terminal UVS of SPM 1100.
One end of the VB2 ends connection electric capacity 1132 of HVIC pipes 1101, and as the V phases higher-pressure region of SPM 1100 Power supply anode VVB;The HO2 ends of HVIC pipes 1101 are connected with the grid of bridge arm IGBT pipes 1123 in V phases;HVIC pipes 1101 VS2 ends and colelctor electrode, the FRD pipes 1115 of bridge arm IGBT pipes 1125 under the emitter-base bandgap grading of IGBT pipes 1122, the anode of FRD pipes 1112, V phases Negative electrode, the other end of electric capacity 1132 be connected, and as the V phases higher-pressure region power supply negative terminal VVS of SPM 1100.
One end of the VB3 ends connection electric capacity 1133 of HVIC pipes 1101, the W phases higher-pressure region as SPM 1100 supplies Electric power positive end WVB;The HO3 ends of HVIC pipes 1101 are connected with the grid of bridge arm IGBT pipes 1123 in W phases;HVIC pipes 1101 VS3 ends and colelctor electrode, the FRD pipes 1116 of bridge arm IGBT pipes 1126 under the emitter-base bandgap grading of IGBT pipes 1123, the anode of FRD pipes 1113, W phases Negative electrode, the other end of electric capacity 1133 be connected, and as the W phases higher-pressure region power supply negative terminal WVS of SPM 1100.
The LO1 ends of HVIC pipes 1101 are connected with the grid of IGBT pipes 1124;The LO2 ends of HVIC pipes 1101 and IGBT pipes 1125 Grid be connected;The LO3 ends of HVIC pipes 1101 are connected with the grid of IGBT pipes 1126;The emitter-base bandgap grading of IGBT pipes 1124 is managed with FRD 1114 anode is connected, and as the U phase low reference voltages end UN of SPM 1100;The emitter-base bandgap grading of IGBT pipes 1125 with The anode of FRD pipes 1115 is connected, and as the V phase low reference voltages end VN of SPM 1100;IGBT pipes 1126 are penetrated Pole is connected with the anode of FRD pipes 1116, and as the W phase low reference voltages end WN of SPM 1100.
VDD is the power supply anode of HVIC pipes 1101, and GND is the power supply negative terminal of HVIC pipes 1101;VDD-GND voltages Generally 15V;VB1 and VS1 is respectively the positive pole and negative pole of the power supply of U phases higher-pressure region, and HO1 is the output end of U phases higher-pressure region; VB2 and VS2 is respectively the positive pole and negative pole of the power supply of V phases higher-pressure region, and HO2 is the output end of V phases higher-pressure region;VB3 and VS3 difference For the positive pole and negative pole of the power supply of U phases higher-pressure region, HO3 is the output end of W phases higher-pressure region;LO1, LO2, LO3 are respectively U phases, V The output end of phase, W phase low-pressure areas.
The PFCO ends of HVIC pipes 1101 are PFC drive circuit output ends, are connected with the grid of IGBT pipes 1127;IGBT is managed 1127 emitter-base bandgap grading is connected with the anode of FRD pipes 1117, and as the PFC low reference voltages end-VP of SPM 1100; The colelctor electrode of IGBT pipes 1127 and the negative electrode of FRD pipes 1117, the first input/output terminal phase of adaptive PFC freewheeling circuits 1141 Even, and as the PFC ends of SPM 1100, PFCC1 ends connect the first input of adaptive PFC freewheeling circuits 1141 End;PFCC2 ends connect the second input of adaptive PFC freewheeling circuits 1141.
Second input/output terminal of adaptive PFC freewheeling circuits 1141, the colelctor electrode of IGBT pipes 1121, FRD pipes 1111 Negative electrode, the colelctor electrode of IGBT pipes 1122, the negative electrode of FRD pipes 1112, the colelctor electrode of IGBT pipes 1123, the negative electrode phase of FRD pipes 1113 Even, and 300V is typically met as high voltage the input P, P of SPM 1100.
The effect of HVIC pipes 1101 is:
When ICON is high level, the 0 of input HIN1, HIN2, HIN3 or 5V logic input signal are passed to respectively Output end HO1, HO2, HO3, LIN1, LIN2, LIN3 signal are passed into output end LO1, LO2, LO3 respectively, by PFCINP's Signal passes to output end PFCO, and wherein HO1 is that VS1 or VS1+15V logic output signal, HO2 are patrolling for VS2 or VS2+15V Volume output signal, HO3 are VS3 or VS3+15V logic output signal, and LO1, LO2, LO3, PFCO are 0 or 15V logic output Signal;
When ICON is low level, HO1, HO2, HO3, LO1, LO2, LO3, PFCO are all set to low level.
The effect of adaptive circuit 1105 is:
When temperature is less than a certain particular temperature value T1, PFCC1 is low level, and if ITRIP real time value be more than A certain particular voltage level V1, then ICON export low level, otherwise ICON export high level;
When temperature is higher than a certain particular temperature value T1, PFCC1 is high level, and if ITRIP real time value be more than A certain particular voltage level V2, then ICON export low level, otherwise ICON export high level;Wherein, V2>V1;
Within one section of short time after PFCINP rising edge occurs, PFCC2 output high level;
Remaining time after PFCINP rising edge arrives, PFCC2 output low levels.
The effect of adaptive PFC freewheeling circuits 1141 is:
When as PFCC1 and PFCC2, at least one is low level, adaptive PFC freewheeling circuits 1141 have forward conduction Pressure drop is very low and the characteristic of FRD pipes that reverse recovery current is larger;
When PFCC1 and PFCC2 simultaneously be high level when, adaptive PFC freewheeling circuits 1141 with reverse recovery current by The characteristic of the high pressure resistant FRD pipes of control.
In one embodiment of the invention, the particular circuit configurations of adaptive circuit 1105 are as shown in fig. 7, be specially:
PFCINP connections NOT gate 2001, the input of NOT gate 2003;The output end of NOT gate 2001 connects the defeated of NOT gate 2002 Enter end;One end of the output end connection electric capacity 2008 of NOT gate 2003, the input of NOT gate 2004;The output end connection of NOT gate 2004 One end of electric capacity 2009, the input of NOT gate 2005;Another termination GND of electric capacity 2008;Another termination GND of electric capacity 2009;
One of input of the output termination NAND gate 2006 of NOT gate 2002;The output termination NAND gate of NOT gate 2005 2006 another input;The input of the output end NAND gate 2007 of NAND gate 2006 is connected;The output end of NOT gate 2007 Connect the PFCC2 ends of the 3rd output end as adaptive circuit 1105, i.e. HVIC pipes 1101;
One termination VCC of resistance 2016;One end of another terminating resistor 2013 of resistance 2016 and voltage-regulator diode 2011 Negative electrode;Another termination PTC (Positive Temperature Coefficient, positive temperature coefficient) resistance of resistance 2013 2012 one end, the positive input terminal of voltage comparator 2015;Another termination GND of voltage-regulator diode 2011;PTC resistor 2012 Another termination GND;The anode of the negative input termination voltage source 2014 of voltage comparator 2015;The negative terminal of voltage source 2014 meets GND; Another input of the output termination NOT gate 2017 of voltage comparator 2015;The input of the output termination NOT gate 2027 of NOT gate 2017 End;The control terminal of the output termination analog switch 2022 of NOT gate 2027 and as the second output end of adaptive circuit 1105, i.e., The PFCC1 ends of HVIC pipes 1101;
ITRIP connects the positive input terminal of voltage comparator 2010, the positive input terminal of voltage comparator 2023;Voltage comparator The anode of 2010 negative input termination voltage source 2018;The negative terminal of voltage source 2018 meets GND;
The anode of the negative input termination voltage source 2019 of voltage comparator 2023;The negative terminal of voltage source 2019 meets GND;
0 choosing of the one of input and analog switch 2022 of the output termination NAND gate 2025 of voltage comparator 2010 Select end;One of input of the output termination NAND gate 2025 of voltage comparator 2023;The output termination of NAND gate 2025 The input of NOT gate 2026;1 selection end of the output termination analog switch 2022 of NOT gate 2026;The fixing end of analog switch 2022 Connect the input of NOT gate 2020;First output end of the output end of NOT gate 2020 as ICON, i.e. adaptive circuit 1105;
Wherein, PFCC1 ends are connected with the first input end of PFC freewheeling circuits 1141, PFCC2 ends and PFC freewheeling circuits 1141 the second input is connected.
In one embodiment of the invention, the particular circuit configurations of PFC freewheeling circuits 1141 are as shown in figure 8, be specially:
One of input of the first input end connection NAND gate 2030 of PFC freewheeling circuits 1141;PFC freewheeling circuits Another input of 1141 the second input connection NAND gate 2030;The output end connection NOT gate 2029 of NAND gate 2030 Input;The control terminal of the output end connection analog switch 2024 of NOT gate 2029;
One end of 1 selection end connection resistance 2028 of analog switch 2024 is simultaneously first defeated as PFC freewheeling circuits 1141 Enter output end;The other end of 0 selection end connection resistance 2028 of analog switch 2024;The fixed termination FRD of analog switch 2004 The negative electrode of pipe 2021;The anode of FRD pipes 2021 is the second input/output terminal of PFC freewheeling circuits 1141.
Illustrate the operation principle and key parameter value of above-described embodiment below:
In PFCINP rising edge, A points produce a pulse, and the width of the pulse is by NOT gate 2003, NOT gate 2004, NOT gate 2005 and electric capacity 2008, electric capacity 2009 value determine;
NOT gate 2003 can choose the minimum dimension of technique permission, and NOT gate 2004, NOT gate 2005 are it is contemplated that choose technique The value of 2 times of the minimum dimension of permission, electric capacity 2008 and electric capacity 2009 is in 5pF~10pF, so, in pulse caused by A points Pulse width be 200ns~250ns.
The clamp voltage design of voltage-regulator diode 2011 is 6.4V, and resistance 2016 is designed as 20k Ω, then produces one in B points The 6.4V voltages not influenceed with VCC voltage pulsations of individual stabilization;PTC resistor 2012 is designed as 10k Ω at 25 DEG C, 20k at 100 DEG C Ω;Resistance 2013 is designed as 44k Ω, and voltage source 2014 is designed as 2V, then below 100 DEG C, voltage comparator 2015 exports low Level, more than 100 DEG C, voltage comparator 2015 exports high level.
When being more than 100 DEG C so as to and if only if temperature, NOT gate 2027 exports high level, and otherwise NOT gate 2027 exports low electricity It is flat.
Voltage source 2018 is designed as 0.5V, and voltage source 2019 is designed as 0.6V;
When NOT gate 2027 exports low level, ITRIP voltage is with the voltage ratio of voltage source 2018 compared with when ITIRP voltages> During 0.5V, voltage comparator 2010, which exports high level and ICON is produced low level, makes module from service;
When NOT gate 2027 exports high level, ITRIP simultaneously with 0.5V, 0.6V voltage ratio compared with because voltage is being incremented by, ITRIP voltage reaches 0.5V, it is necessary to which persistently rising a period of time can be only achieved 0.6V, therefore, even if ITRIP voltage> 0.5V, also to continue for some time, which can just make voltage comparator 2010, voltage comparator 2023 all export high level, makes NAND gate 2025 output low levels, this duration is depending on the ITRIP rate of rise;
When in PFCINP rising edge arrivings 200ns~250ns time, NOT gate 2007 exports high level, when temperature this moment When more than 100 DEG C:One end of the connected resistance 2028 of the negative electrode of FRD pipes 2021, the other end connection PFC afterflow electricity of resistance 2028 First input/output terminal on road 1141, the second input/output terminal of the anode connection PFC freewheeling circuits 1141 of FRD pipes 2021;Electricity The ohm level resistance that power are more than 50W can be used in resistance 2028, and the intervention of resistance 2028, extending reverse recovery time but limits Reverse recovery current, inhibitory action is played to bus induced voltage, the power consumption increase in 200ns~250ns very short time, no The performance of SPM proposed by the present invention can be influenceed;
After PFCINP rising edges, or when temperature is below 100 DEG C, the negative electrodes of FRD pipes 2021 directly with PFC afterflows First input/output terminal of circuit 1141 is connected, the second input and output of the anode connection PFC freewheeling circuits 1141 of FRD pipes 2021 End, is general FRD pipes characteristic.
From the technical scheme of above-described embodiment, SPM proposed by the present invention and existing SPM It is completely compatible, directly it can be replaced with existing SPM.When the temperature is low, ITRIP and relatively low electricity Pressure ratio compared with, it is ensured that to the sensitivity of SPM overcurrent protection, when temperature is higher, ITRIP and higher voltage Compare, take into account the stability of SPM work;Also, when the temperature is low, pfc circuit uses forward conduction voltage drop more Low FRD pipes obtain lower power consumption, when temperature is higher, in PFCINP rising edge, PFC reverse recovery current size by Control, suppresses its influence to busbar voltage;So that what the SPM of the present invention persistently came into force in normal protective mechanisms Under the premise of, the stability of system is maintained, while improve the user satisfaction of product.
Technical scheme is described in detail above in association with accompanying drawing, the present invention proposes a kind of new intelligent power mould Block, at normal temperatures on the premise of low-power consumption normal work, it can effectively reduce intelligent power ensuring SPM Module is at high temperature by the probability of false triggering.
The preferred embodiments of the present invention are the foregoing is only, are not intended to limit the invention, for the skill of this area For art personnel, the present invention can have various modifications and variations.Within the spirit and principles of the invention, that is made any repaiies Change, equivalent substitution, improvement etc., should be included in the scope of the protection.
Claims (8)
- A kind of 1. SPM, it is characterised in that including:Bridge arm signal input part, three-phase low reference voltage end, current detecting end, PFC under bridge arm signal input part, three-phase on three-phase Control signal and PFC ends;HVIC is managed, and is provided with the HVIC pipes and is respectively connecting on the three-phase bridge under bridge arm signal input part and the three-phase The terminals of arm signal input part, and it is corresponding to the first port at the current detecting end and defeated corresponding to PFC controls Enter the second port at end, the first port is connected by connecting line with the current detecting end, and the second port passes through company Wiring is connected with the PFC control signals;Sampling resistor, the three-phase low reference voltage end and the current detecting end are connected to the first of the sampling resistor End, the second end of the sampling resistor is connected to the low-pressure area power supply negative terminal of the SPM;Adaptive circuit, the first input end of the adaptive circuit and the second input are connected respectively to the first end Mouthful and the second port, the Enable Pin of the first output end of the adaptive circuit as the HVIC pipes;PFC freewheeling circuits, the first input ends of the PFC freewheeling circuits, the second input, the first input/output terminal and second are defeated Enter output end be connected respectively to the second output end of the adaptive circuit, the 3rd output end of the adaptive circuit, The PFC ends and the high voltage input of the SPM, the PFC freewheeling circuits are according to the PFC freewheeling circuits Two inputs input level signal, realize forward conduction voltage drop less than predetermined pressure drop value fly-wheel diode function or Realize the function of the controlled fly-wheel diode of reverse recovery current;Wherein, the adaptive circuit is according to the temperature of the SPM, the first input end of the adaptive circuit Input signal size, and whether the input signal of the second input of the adaptive circuit be in rising edge, passes through First output end, the second output end and the 3rd output end export the signal of corresponding level;The adaptive circuit passes through second output end when the temperature of the SPM is less than predetermined temperature value The signal of the first level is exported, and when the temperature of the SPM is higher than the predetermined temperature value, passes through described Two output ends export the signal of second electrical level;Pre- timing of the adaptive circuit after rising edge occurs in the input signal of the second input of the adaptive circuit In length, the signal of the second electrical level is exported by the 3rd output end;Otherwise, by described in the 3rd output end output The signal of first level;The adaptive circuit is when the temperature of the SPM is less than predetermined temperature value, if the adaptive circuit The value of the input signal of first input end is more than or equal to the first setting value, then exports described first by first output end The enable signal of level, to forbid the HVIC pipes to work;Otherwise, the second electrical level is exported by first output end Enable signal, to allow the HVIC pipes to work;The adaptive circuit is when the temperature of the SPM is higher than the predetermined temperature value, if the adaptive electricity The value of the input signal of the first input end on road is more than or equal to the second setting value, then by described in first output end output The enable signal of first level;Otherwise, the enable signal of the second electrical level is exported by first output end;Wherein, second setting value is more than first setting value;The PFC freewheeling circuits at least one input input described first in two inputs of the PFC freewheeling circuits During the signal of level, function of the forward conduction voltage drop less than the fly-wheel diode of predetermined pressure drop value is realized;AndThe PFC freewheeling circuits are real when two inputs of the PFC freewheeling circuits all input the signal of the second electrical level The function of the controlled fly-wheel diode of existing reverse recovery current.
- 2. SPM according to claim 1, it is characterised in that the adaptive circuit includes:The first NOT gate and the second NOT gate being connected in series, the input of first NOT gate as the adaptive circuit second Input, the output end of second NOT gate are connected to the first input end of the first NAND gate;The 3rd NOT gate, the 4th NOT gate and the 5th NOT gate being connected in series, the input of the 3rd NOT gate are connected to described first The input of NOT gate, the output end of the 5th NOT gate are connected to the second input of first NAND gate, described first with The output end of NOT gate is connected to the input of the 6th NOT gate, the output end of the 6th NOT gate as the adaptive circuit Three output ends;First electric capacity, it is connected between the input of the 4th NOT gate and the power supply negative pole of the adaptive circuit;Second electric capacity, it is connected between the input of the 5th NOT gate and the power supply negative pole of the adaptive circuit;First resistor, the first end of the first resistor are connected to the power supply positive pole of the adaptive circuit, and described first Second end of resistance is connected to the negative electrode of voltage-regulator diode, and the anode of the voltage-regulator diode is connected to the adaptive circuit Power supply negative pole, the power supply positive pole and negative pole of the adaptive circuit are respectively connecting to the low of the SPM Nip power supply anode and negative terminal;Second resistance, the first end of the second resistance are connected to the second end of the first resistor, and the of the second resistance Two ends are connected to the positive input terminal of first voltage comparator;Thermistor, the first end of the thermistor are connected to the second end of the second resistance, and the of the thermistor Two ends are connected to the anode of the voltage-regulator diode;First voltage source, the negative pole of the first voltage source are connected to the anode of the voltage-regulator diode, the first voltage source Positive pole be connected to the negative input end of the first voltage comparator, the output end of the first voltage comparator is connected to the 7th The input of NOT gate, the output end of the 7th NOT gate are connected to the input of the 8th NOT gate, the output end of the 8th NOT gate The control terminal of the first analog switch is connected to, and as the second output end of the adaptive circuit;Second voltage comparator, the positive input terminal of the second voltage comparator input as the first of the adaptive circuit End, the negative input end of the second voltage comparator are connected to the positive pole of the second voltage source, and the negative pole of the second voltage source connects The power supply negative pole of the adaptive circuit is connected to, the output end of the second voltage comparator is connected to first simulation The first choice end of switch and the first input end of the second NAND gate;Tertiary voltage comparator, the positive input terminal of the tertiary voltage comparator are connected to the just defeated of the second voltage comparator Enter end, the negative input end of the tertiary voltage comparator is connected to the positive pole in tertiary voltage source, the negative pole in the tertiary voltage source Be connected to the power supply negative pole of the adaptive circuit, the output end of the tertiary voltage comparator be connected to described second with Second input of NOT gate, the output end of second NAND gate are connected to the input of the 9th NOT gate, the 9th NOT gate Output end is connected to the second selection end of first analog switch, and it is non-that the fixing end of first analog switch is connected to the tenth The input of door, the first output end of the output end of the tenth NOT gate as the adaptive circuit.
- 3. SPM according to claim 1, it is characterised in that the PFC freewheeling circuits include:3rd NAND gate, two inputs of the 3rd NAND gate respectively as the PFC freewheeling circuits two inputs, The output end of 3rd NAND gate is connected to the input of the 11st NOT gate, and the output end of the 11st NOT gate is connected to The control terminal of two analog switches, the first input and output of the fixing end of second analog switch as the PFC freewheeling circuits End;3rd resistor, the first end of the 3rd resistor are connected to the first choice end of second analog switch, and the described 3rd Second end of resistance is connected with the second selection end of second analog switch, and second as the PFC freewheeling circuits is defeated Enter output end.
- 4. SPM according to claim 1, it is characterised in that PFC drivings are additionally provided with the HVIC pipes The signal output part of circuit, the SPM also include:First power switch pipe and the first diode, the anode of first diode are connected to first power switch pipe Emitter stage, the negative electrode of first diode are connected to the colelctor electrode of first power switch pipe, first power switch The base stage of pipe is connected to the signal output part of the PFC drive circuits, described in the emitter stage of first power switch pipe is used as The PFC low reference voltages end of SPM, the colelctor electrode of first power switch pipe is as the PFC ends.
- 5. SPM according to any one of claim 1 to 4, it is characterised in that also include:Bridge arm circuit on three-phase, the input of bridge arm circuit is connected to described in each phase on the three-phase in bridge arm circuit The signal output part of phase is corresponded in the three-phase high-voltage area of HVIC pipes;Bridge arm circuit under three-phase, the input of bridge arm circuit is connected to described under each phase under the three-phase in bridge arm circuit The signal output part of phase is corresponded in the three-phase low-voltage area of HVIC pipes.
- 6. SPM according to claim 5, it is characterised in that bridge arm circuit includes in each phase:Second power switch pipe and the second diode, the anode of second diode are connected to second power switch pipe Emitter stage, the negative electrode of second diode are connected to the colelctor electrode of second power switch pipe, second power switch The colelctor electrode of pipe is connected to the high voltage input of the SPM, and the base stage of second power switch pipe is as institute The input of bridge arm circuit in each phase is stated, the emitter stage of second power switch pipe is connected to the SPM pair Answer the higher-pressure region power supply negative terminal of phase.
- 7. SPM according to claim 6, it is characterised in that bridge arm circuit includes under each phase:3rd power switch pipe and the 3rd diode, the anode of the 3rd diode are connected to the 3rd power switch pipe Emitter stage, the negative electrode of the 3rd diode are connected to the colelctor electrode of the 3rd power switch pipe, the 3rd power switch The colelctor electrode of pipe is connected to the anode of second diode in corresponding upper bridge arm circuit, the 3rd power switch pipe Input of the base stage as bridge arm circuit under each phase, the emitter stage of the 3rd power switch pipe is as the intelligent work( The low reference voltage end of the corresponding phase of rate module.
- A kind of 8. air conditioner, it is characterised in that including:SPM as any one of claim 1 to 7.
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